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pinctrl: qcom: Modify MSM_PULL_MASK to accurately represent PULL bits

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MSM_PULL_MASK currently spans bits [2:0], but the GPIO_PULL field in the
GPIO_CFG register only occupies bits [1:0]. Bit 2 belongs to
FUNC_SEL.

MSM_PULL_MASK is used to isolate the GPIO_PULL bits before writing the
pull configuration (PULL_DOWN: 0x1, PULL_UP: 0x3) to the GPIO_CFG
register. Narrow it to bits [1:0] to prevent unintended modification of
the FUNC_SEL field.

This causes no functional change since the driver currently does not
modify the FUNC_SEL bit, but align the mask with hardware configuration
nonetheless.

Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Sneh Mankad
2026-05-29 18:25:44 +05:30
committed by Linus Walleij
parent b719ede389
commit ba80761235
1 changed files with 1 additions and 1 deletions
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2
drivers/pinctrl/qcom/tlmm-test.c
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@@ -33,7 +33,7 @@
* dynamically, rather then relying on e.g. Devicetree and phandles.
*/
#define MSM_PULL_MASK GENMASK(2, 0)
#define MSM_PULL_MASK GENMASK(1, 0)
#define MSM_PULL_DOWN 1
#define MSM_PULL_UP 3
#define TLMM_REG_SIZE 0x1000