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dt-bindings: pinctrl: mediatek: Add MT6858
Add new DT bindings for the pin controller found in the MT6858 (MediaTek Dimensity 7100) SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Nikolai Burov <nikolai.burov@jolla.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Nikolai Burov
committed by
Linus Walleij
Linus Walleij
parent
e9c086239f
commit
ba6bf288b4
@@ -0,0 +1,190 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6858-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek MT6858 Pin Controller
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maintainers:
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- Nikolai Burov <nikolai.burov@jolla.com>
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description:
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The MediaTek's MT6858 Pin controller is used to control SoC pins.
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properties:
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compatible:
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const: mediatek,mt6858-pinctrl
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reg:
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items:
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- description: gpio base
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- description: lm group IO
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- description: rb group IO
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- description: bm2 group IO
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- description: bm group IO
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- description: bm1 group IO
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- description: lt group IO
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- description: lt1 group IO
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- description: rt group IO
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- description: rt1 group IO
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- description: eint south group IO
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- description: eint west group IO
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- description: eint east group IO
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- description: eint center group IO
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reg-names:
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items:
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- const: base
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- const: lm
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- const: rb
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- const: bm2
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- const: bm
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- const: bm1
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- const: lt
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- const: lt1
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- const: rt
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- const: rt1
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- const: eint0
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- const: eint1
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- const: eint2
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- const: eint3
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interrupts:
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maxItems: 1
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interrupt-controller: true
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'#interrupt-cells':
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const: 2
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gpio-controller: true
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'#gpio-cells':
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const: 2
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gpio-ranges:
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maxItems: 1
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gpio-line-names: true
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# PIN CONFIGURATION NODES
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patternProperties:
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'-pins$':
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type: object
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additionalProperties: false
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patternProperties:
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'^pins':
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type: object
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$ref: /schemas/pinctrl/pincfg-node.yaml
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additionalProperties: false
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description:
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A pinctrl node should contain at least one subnodes representing the
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pinctrl groups available on the machine. Each subnode will list the
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pins it needs, and how they should be configured, with regard to muxer
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configuration, pullups, drive strength, input enable/disable and input
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schmitt.
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properties:
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pinmux:
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description:
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Integer array, represents gpio pin number and mux setting.
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Supported pin number and mux varies for different SoCs, and are
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defined as macros in arch/arm64/boot/dts/mediatek/mt6858-pinfunc.h
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for this SoC.
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drive-strength:
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enum: [2, 4, 6, 8, 10, 12, 14, 16]
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bias-pull-down:
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oneOf:
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- type: boolean
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description: normal pull down.
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- enum: [100, 101, 102, 103]
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description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_
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defines in dt-bindings/pinctrl/mt65xx.h.
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- enum: [200, 201, 202, 203]
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description: RSEL pull down type. See MTK_PULL_SET_RSEL_ defines
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in dt-bindings/pinctrl/mt65xx.h.
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bias-pull-up:
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oneOf:
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- type: boolean
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description: normal pull up.
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- enum: [100, 101, 102, 103]
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description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_
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defines in dt-bindings/pinctrl/mt65xx.h.
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- enum: [200, 201, 202, 203]
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description: RSEL pull up type. See MTK_PULL_SET_RSEL_ defines
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in dt-bindings/pinctrl/mt65xx.h.
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bias-disable: true
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output-high: true
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output-low: true
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input-enable: true
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input-disable: true
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input-schmitt-enable: true
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input-schmitt-disable: true
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required:
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- pinmux
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-controller
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- '#interrupt-cells'
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- gpio-controller
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- '#gpio-cells'
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- gpio-ranges
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#define PINMUX_GPIO149__FUNC_SCL5 (MTK_PIN_NO(149) | 1)
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#define PINMUX_GPIO150__FUNC_SDA5 (MTK_PIN_NO(150) | 1)
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pio: pinctrl@10005000 {
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compatible = "mediatek,mt6858-pinctrl";
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reg = <0x10005000 0x1000>,
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<0x11b20000 0x1000>,
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<0x11c10000 0x1000>,
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<0x11d10000 0x1000>,
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<0x11d30000 0x1000>,
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<0x11d40000 0x1000>,
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<0x11e20000 0x1000>,
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<0x11e30000 0x1000>,
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<0x11ed0000 0x1000>,
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<0x11ee0000 0x1000>,
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<0x11b00000 0x1000>,
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<0x11e60000 0x1000>,
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<0x11e80000 0x1000>,
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<0x1c01e000 0x1000>;
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reg-names = "base", "lm", "rb", "bm2", "bm", "bm1", "lt", "lt1",
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"rt", "rt1", "eint0", "eint1", "eint2", "eint3";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pio 0 0 197>;
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interrupt-controller;
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interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH 0>;
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#interrupt-cells = <2>;
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i2c5-pins {
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pins {
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pinmux = <PINMUX_GPIO149__FUNC_SCL5>,
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<PINMUX_GPIO150__FUNC_SDA5>;
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bias-disable;
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};
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};
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};
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