drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

Enable PIPEDMC_ERROR interrupt bit for display version 35+.

Changes in v2:
- Move PIPEDMC_ERROR interrupt enable to a separate patch (Ville Syrjala)
Changes in v3:
- Add Bspec reference (Suraj Kandpal)
Changes in v4:
- Add TODO to check the enablement of PIPEDMC_ERROR for PTL (Suraj Kandpal)
Changes in v5:
- Move TODO to the beginning of pipedmc_interrupt_mask() (Suraj Kandpal)

Bspec: 70296
Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260327064453.2241523-3-dibin.moolakadan.subrahmanian@intel.com
This commit is contained in:
Dibin Moolakadan Subrahmanian
2026-03-27 12:14:53 +05:30
committed by Suraj Kandpal
parent e2d48e8395
commit ba48541c82

View File

@@ -505,8 +505,13 @@ static void pipedmc_clock_gating_wa(struct intel_display *display, bool enable)
static u32 pipedmc_interrupt_mask(struct intel_display *display)
{
/*
* TODO: Check if PIPEDMC_ERROR bit enabling causes errors
* on PTL, enable it if validation passes
*/
if (DISPLAY_VER(display) >= 35)
return PIPEDMC_FLIPQ_PROG_DONE;
return PIPEDMC_FLIPQ_PROG_DONE |
PIPEDMC_ERROR;
/*
* FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B