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synced 2026-05-09 06:41:06 -04:00
wifi: iwlwifi: cfg: unify num_rbds config
This should depend on both the RF (VHT/HE/EHT support) and the MAC (<=22000 can put multiple frames into one buffer), so unify the config in the struct iwl_cfg to just have it sized according to the RF, and then double it for all the MACs starting from AX210 (So/Ty). Signed-off-by: Johannes Berg <johannes.berg@intel.com> Link: https://patch.msgid.link/20250509104454.2582160-3-miriam.rachel.korenblit@intel.com Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
This commit is contained in:
committed by
Miri Korenblit
parent
03e433545c
commit
b8eee90f0b
@@ -131,16 +131,6 @@ const struct iwl_mac_cfg iwl_qu_long_latency_mac_cfg = {
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.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
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};
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/*
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* If the device doesn't support HE, no need to have that many buffers.
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* 22000 devices can split multiple frames into a single RB, so fewer are
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* needed; AX210 cannot (but use smaller RBs by default) - these sizes
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* were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with
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* additional overhead to account for processing time.
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*/
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#define IWL_NUM_RBDS_NON_HE 512
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#define IWL_NUM_RBDS_22000_HE 2048
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/*
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* All JF radio modules are part of the 9000 series, but the MAC part
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* looks more like 22000. That's why this device is here, but called
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@@ -182,17 +172,17 @@ const char iwl_ax201_killer_1650i_name[] =
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const struct iwl_cfg iwl_qu_hr1 = {
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IWL_DEVICE_22500,
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.tx_with_siso_diversity = true,
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.num_rbds = IWL_NUM_RBDS_22000_HE,
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.num_rbds = IWL_NUM_RBDS_HE,
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};
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const struct iwl_cfg iwl_qu_hr = {
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IWL_DEVICE_22500,
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.num_rbds = IWL_NUM_RBDS_22000_HE,
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.num_rbds = IWL_NUM_RBDS_HE,
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};
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const struct iwl_cfg iwl_qu_hr_80mhz = {
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IWL_DEVICE_22500,
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.num_rbds = IWL_NUM_RBDS_22000_HE,
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.num_rbds = IWL_NUM_RBDS_HE,
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.bw_limit = 80,
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};
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@@ -105,7 +105,7 @@ static const struct iwl_tt_params iwl9000_tt_params = {
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.dccm2_offset = IWL9000_DCCM2_OFFSET, \
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.dccm2_len = IWL9000_DCCM2_LEN, \
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.thermal_params = &iwl9000_tt_params, \
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.num_rbds = 512, \
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.num_rbds = IWL_NUM_RBDS_NON_HE, \
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.vht_mu_mimo_supported = true, \
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.nvm_type = IWL_NVM_EXT, \
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.ht_params = { \
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@@ -141,16 +141,6 @@ const struct iwl_mac_cfg iwl_so_long_latency_imr_mac_cfg = {
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.imr_enabled = true,
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};
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/*
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* If the device doesn't support HE, no need to have that many buffers.
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* AX210 devices can split multiple frames into a single RB, so fewer are
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* needed; AX210 cannot (but use smaller RBs by default) - these sizes
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* were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with
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* additional overhead to account for processing time.
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*/
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#define IWL_NUM_RBDS_NON_HE 512
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#define IWL_NUM_RBDS_AX210_HE 4096
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const struct iwl_mac_cfg iwl_ma_mac_cfg = {
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.device_family = IWL_DEVICE_FAMILY_AX210,
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.base = &iwl_ax210_base,
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@@ -193,17 +183,17 @@ const char iwl_ax210_name[] = "Intel(R) Wi-Fi 6 AX210 160MHz";
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const struct iwl_cfg iwl_cfg_ma = {
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.uhb_supported = true,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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.num_rbds = IWL_NUM_RBDS_HE,
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};
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const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = {
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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.num_rbds = IWL_NUM_RBDS_HE,
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};
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const struct iwl_cfg iwl_cfg_so_a0_hr_a0_80mhz = {
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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.num_rbds = IWL_NUM_RBDS_HE,
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.bw_limit = 80,
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};
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@@ -106,12 +106,6 @@ static const struct iwl_family_base_params iwl_bz_base = {
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.nvm_ver = IWL_BZ_NVM_VERSION, \
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.nvm_type = IWL_NVM_EXT
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/*
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* This size was picked according to 8 MSDUs inside 512 A-MSDUs in an
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* A-MPDU, with additional overhead to account for processing time.
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*/
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#define IWL_NUM_RBDS_BZ_EHT (512 * 16)
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const struct iwl_mac_cfg iwl_bz_mac_cfg = {
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.device_family = IWL_DEVICE_FAMILY_BZ,
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.base = &iwl_bz_base,
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@@ -142,13 +136,13 @@ const char iwl_mtp_name[] = "Intel(R) Wi-Fi 7 BE202 160MHz";
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const struct iwl_cfg iwl_cfg_bz = {
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.uhb_supported = true,
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IWL_DEVICE_BZ,
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.num_rbds = IWL_NUM_RBDS_BZ_EHT,
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.num_rbds = IWL_NUM_RBDS_EHT,
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};
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const struct iwl_cfg iwl_cfg_bz_160mhz = {
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.uhb_supported = true,
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IWL_DEVICE_BZ,
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.num_rbds = IWL_NUM_RBDS_BZ_EHT,
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.num_rbds = IWL_NUM_RBDS_EHT,
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.bw_limit = 160,
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};
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@@ -93,7 +93,7 @@ static const struct iwl_family_base_params iwl_dr_base = {
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.nvm_ver = IWL_DR_NVM_VERSION, \
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.nvm_type = IWL_NVM_EXT, \
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.uhb_supported = true, \
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.num_rbds = IWL_NUM_RBDS_DR_EHT, \
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.num_rbds = IWL_NUM_RBDS_EHT, \
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.ht_params = { \
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.stbc = true, \
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.ldpc = true, \
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@@ -101,12 +101,6 @@ static const struct iwl_family_base_params iwl_dr_base = {
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BIT(NL80211_BAND_5GHZ), \
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}
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/*
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* This size was picked according to 8 MSDUs inside 512 A-MSDUs in an
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* A-MPDU, with additional overhead to account for processing time.
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*/
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#define IWL_NUM_RBDS_DR_EHT (512 * 16)
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const struct iwl_mac_cfg iwl_dr_mac_cfg = {
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.device_family = IWL_DEVICE_FAMILY_DR,
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.base = &iwl_dr_base,
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@@ -100,7 +100,7 @@ static const struct iwl_family_base_params iwl_sc_base = {
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.nvm_ver = IWL_SC_NVM_VERSION, \
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.nvm_type = IWL_NVM_EXT, \
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.uhb_supported = true, \
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.num_rbds = IWL_NUM_RBDS_SC_EHT, \
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.num_rbds = IWL_NUM_RBDS_EHT, \
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.ht_params = { \
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.stbc = true, \
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.ldpc = true, \
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@@ -108,12 +108,6 @@ static const struct iwl_family_base_params iwl_sc_base = {
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BIT(NL80211_BAND_5GHZ), \
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}
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/*
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* This size was picked according to 8 MSDUs inside 512 A-MSDUs in an
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* A-MPDU, with additional overhead to account for processing time.
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*/
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#define IWL_NUM_RBDS_SC_EHT (512 * 16)
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const struct iwl_mac_cfg iwl_sc_mac_cfg = {
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.device_family = IWL_DEVICE_FAMILY_SC,
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.base = &iwl_sc_base,
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@@ -342,6 +342,16 @@ struct iwl_mac_cfg {
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imr_enabled:1;
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};
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/*
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* These sizes were picked according to 8 MSDUs inside 64/256/612 A-MSDUs
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* in an A-MPDU, with additional overhead to account for processing time.
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* They will be doubled for MACs starting from So/Ty that don't support
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* putting multiple frames into a single buffer.
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*/
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#define IWL_NUM_RBDS_NON_HE (64 * 8)
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#define IWL_NUM_RBDS_HE (256 * 8)
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#define IWL_NUM_RBDS_EHT (512 * 8)
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/**
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* struct iwl_cfg
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* @fw_name_pre: Firmware filename prefix. The api version and extension
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@@ -1214,6 +1214,19 @@ static inline bool iwl_trans_is_hw_error_value(u32 val)
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void iwl_trans_free_restart_list(void);
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static inline u16 iwl_trans_get_num_rbds(struct iwl_trans *trans)
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{
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u16 result = trans->cfg->num_rbds;
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/*
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* Since AX210 family (So/Ty) the device cannot put mutliple
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* frames into the same buffer, so double the value for them.
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*/
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if (trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
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return 2 * result;
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return result;
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}
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/*****************************************************
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* PCIe handling
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*****************************************************/
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@@ -256,7 +256,7 @@ int iwl_pcie_ctxt_info_gen3_alloc(struct iwl_trans *trans,
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ctxt_info_gen3->mtr_size =
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cpu_to_le16(TFD_QUEUE_CB_SIZE(cmdq_size));
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ctxt_info_gen3->mcr_size =
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cpu_to_le16(RX_QUEUE_CB_SIZE(trans->cfg->num_rbds));
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cpu_to_le16(RX_QUEUE_CB_SIZE(iwl_trans_get_num_rbds(trans)));
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trans_pcie->ctxt_info_gen3 = ctxt_info_gen3;
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trans_pcie->prph_info = prph_info;
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@@ -202,10 +202,10 @@ int iwl_pcie_ctxt_info_init(struct iwl_trans *trans,
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rb_size = IWL_CTXT_INFO_RB_SIZE_4K;
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}
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WARN_ON(RX_QUEUE_CB_SIZE(trans->cfg->num_rbds) > 12);
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WARN_ON(RX_QUEUE_CB_SIZE(iwl_trans_get_num_rbds(trans)) > 12);
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control_flags = IWL_CTXT_INFO_TFD_FORMAT_LONG;
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control_flags |=
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u32_encode_bits(RX_QUEUE_CB_SIZE(trans->cfg->num_rbds),
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u32_encode_bits(RX_QUEUE_CB_SIZE(iwl_trans_get_num_rbds(trans)),
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IWL_CTXT_INFO_RB_CB_SIZE);
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control_flags |= u32_encode_bits(rb_size, IWL_CTXT_INFO_RB_SIZE);
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ctxt_info->control.control_flags = cpu_to_le32(control_flags);
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@@ -1864,7 +1864,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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ret = -EINVAL;
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goto out_free_trans;
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}
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trans_pcie->num_rx_bufs = iwl_trans->cfg->num_rbds;
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trans_pcie->num_rx_bufs = iwl_trans_get_num_rbds(iwl_trans);
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} else {
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trans_pcie->num_rx_bufs = RX_QUEUE_SIZE;
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}
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@@ -722,7 +722,7 @@ static int iwl_pcie_alloc_rxq_dma(struct iwl_trans *trans,
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spin_lock_init(&rxq->lock);
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if (trans->mac_cfg->mq_rx_supported)
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rxq->queue_size = trans->cfg->num_rbds;
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rxq->queue_size = iwl_trans_get_num_rbds(trans);
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else
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rxq->queue_size = RX_QUEUE_SIZE;
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