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staging: rtl8192e: Join constants MACPHY_Array_PGLength with ..LengthPciE

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Join constants MACPHY_Array_PGLength with MACPHY_Array_PGLengthPciE to
RTL8192E_MACPHY_ARR_PG_LEN to improve readability.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/6d86257ddf3fecbf2bb104f1eeedbf09a56e0861.1678814935.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Philipp Hortmann
2023-03-14 19:43:24 +01:00
committed by Greg Kroah-Hartman
parent ae9cb21964
commit b89dd56751
3 changed files with 3 additions and 4 deletions
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2
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
View File

@@ -287,7 +287,7 @@ void rtl92e_config_mac(struct net_device *dev)
struct r8192_priv *priv = rtllib_priv(dev);
if (priv->tx_pwr_data_read_from_eeprom) {
dwArrayLen = MACPHY_Array_PGLength;
dwArrayLen = RTL8192E_MACPHY_ARR_PG_LEN;
pdwArray = Rtl819XMACPHY_Array_PG;
} else {

1
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
View File

@@ -9,7 +9,6 @@
#define MAX_DOZE_WAITING_TIMES_9x 64
#define MACPHY_Array_PGLength MACPHY_Array_PGLengthPciE
#define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPciE
#define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG

4
drivers/staging/rtl8192e/rtl8192e/table.h
View File

@@ -19,8 +19,8 @@ extern u32 Rtl8192PciERadioA_Array[RTL8192E_RADIO_A_ARR_LEN];
extern u32 Rtl8192PciERadioB_Array[RTL8192E_RADIO_B_ARR_LEN];
#define RTL8192E_MACPHY_ARR_LEN 18
extern u32 Rtl8192PciEMACPHY_Array[RTL8192E_MACPHY_ARR_LEN];
#define MACPHY_Array_PGLengthPciE 30
extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE];
#define RTL8192E_MACPHY_ARR_PG_LEN 30
extern u32 Rtl8192PciEMACPHY_Array_PG[RTL8192E_MACPHY_ARR_PG_LEN];
#define RTL8192E_AGCTAB_ARR_LEN 384
extern u32 Rtl8192PciEAGCTAB_Array[RTL8192E_AGCTAB_ARR_LEN];