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arm64: dts: add NXP i.MX8MM-EVKB support
Add the i.MX8MM-EVKB [1] devicetree support. The EVKB is basically the same device except for the different used PMIC. [1] https://www.nxp.com/design/development-boards/ \ i-mx-evaluation-and-development-boards/ \ evaluation-kit-for-the-i-mx-8m-mini-applications-processor:8MMINILPD4-EVK Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com> [m.felsch@pengutronix.de: Adapt the commit message] [m.felsch@pengutronix.de: Include Shawns feedback] [m.felsch@pengutronix.de: Fix the regulator settings] Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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committed by
Shawn Guo
parent
4088f98e25
commit
b87f4ff57d
@@ -55,6 +55,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-evkb.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-innocomm-wb15-evk.dtb
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128
arch/arm64/boot/dts/freescale/imx8mm-evkb.dts
Normal file
128
arch/arm64/boot/dts/freescale/imx8mm-evkb.dts
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@@ -0,0 +1,128 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2019-2020 NXP
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*/
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/dts-v1/;
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#include "imx8mm-evk.dtsi"
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/ {
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model = "FSL i.MX8MM EVKB";
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compatible = "fsl,imx8mm-evkb", "fsl,imx8mm";
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};
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&i2c1 {
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/delete-node/ pmic@4b;
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pmic@25 {
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compatible = "nxp,pca9450a";
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reg = <0x25>;
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pinctrl-0 = <&pinctrl_pmic>;
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pinctrl-names = "default";
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interrupt-parent = <&gpio1>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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/* VDD_SOC with PCIe */
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buck1_reg: BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <850000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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/* VDD_ARM */
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buck2_reg: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1000000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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nxp,dvs-standby-voltage = <850000>;
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};
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/* VDD_GPU, VDD_VPU, VDD_DRAM */
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buck3_reg: BUCK3 {
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regulator-name = "BUCK3";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* NVCC_3V3 */
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buck4_reg: BUCK4 {
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regulator-name = "BUCK4";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* VDD_1V8, NVCC_1V8, NVCC_ENET */
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buck5_reg: BUCK5 {
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regulator-name = "BUCK5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* NVCC_DRAM for LPDDR4 */
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buck6_reg: BUCK6 {
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regulator-name = "BUCK6";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* NVCC_SNVS_1P8 */
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ldo1_reg: LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* VDD_SNVS_0P8 */
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ldo2_reg: LDO2 {
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regulator-name = "LDO2";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* VDD_*_1V8 */
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ldo3_reg: LDO3 {
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regulator-name = "LDO3";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* VDD_PHY_0V9 */
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ldo4_reg: LDO4 {
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regulator-name = "LDO4";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* NVCC_SD2 */
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ldo5_reg: LDO5 {
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regulator-name = "LDO5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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};
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};
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