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wifi: rtw89: 8922d: set ANA CLK enter to 500KHz

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To power save, change the clock of ANA hardware from 12MHz to 500KHz.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260707091056.42771-11-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih
2026-07-07 17:10:51 +08:00
parent 47ad03f1ec
commit b7911466b6
2 changed files with 14 additions and 0 deletions
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1
drivers/net/wireless/realtek/rtw89/mac.h
View File

@@ -1680,6 +1680,7 @@ enum rtw89_mac_xtal_si_offset {
XTAL_SI_PWR_CUT = 0x10,
#define XTAL_SI_SMALL_PWR_CUT BIT(0)
#define XTAL_SI_BIG_PWR_CUT BIT(1)
XTAL_SI_AONLDO_CTRL = 0x10,
XTAL_SI_XTAL_DRV = 0x15,
#define XTAL_SI_DRV_LATCH BIT(4)
XTAL_SI_XTAL_PLL = 0x16,

13
drivers/net/wireless/realtek/rtw89/rtw8922d.c
View File

@@ -535,6 +535,19 @@ static int rtw8922d_pwr_on_func(struct rtw89_dev *rtwdev)
rtw89_write32_set(rtwdev, R_BE_SYS_PW_CTRL, B_BE_EN_WLON);
rtw89_write32_set(rtwdev, R_BE_WLRESUME_CTRL, B_BE_LPSROP_CMAC0 |
B_BE_LPSROP_CMAC1);
if (hal->aid == RTL8922D_AID7102) {
ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_AONLDO_CTRL, 0, 0x20);
if (ret)
return ret;
udelay(1);
ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_AONLDO_CTRL, 0, 0x40);
if (ret)
return ret;
}
rtw89_write32_set(rtwdev, R_BE_SYS_PW_CTRL, B_BE_APFN_ONMAC);
ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_BE_APFN_ONMAC),