coresight: cti: Rename cti_active() to cti_is_active()

Rename cti_active() to cti_is_active() to clarify that it checks whether
the CTI device is active.

Reviewed-by: Mike Leach <mike.leach@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20260226-arm_coresight_cti_refactor_v1-v2-5-b30fada3cfec@arm.com
This commit is contained in:
Leo Yan
2026-02-26 09:23:53 +00:00
committed by Suzuki K Poulose
parent 59213b4be5
commit b727e7bba3
3 changed files with 12 additions and 12 deletions

View File

@@ -155,7 +155,7 @@ void cti_write_intack(struct device *dev, u32 ackval)
guard(raw_spinlock_irqsave)(&drvdata->spinlock);
/* write if enabled */
if (cti_active(config))
if (cti_is_active(config))
cti_write_single_reg(drvdata, CTIINTACK, ackval);
}
@@ -342,7 +342,7 @@ int cti_channel_trig_op(struct device *dev, enum cti_chan_op op,
config->ctiouten[trigger_idx] = reg_value;
/* write through if enabled */
if (cti_active(config))
if (cti_is_active(config))
cti_write_single_reg(drvdata, reg_offset, reg_value);
return 0;
@@ -380,7 +380,7 @@ int cti_channel_gate_op(struct device *dev, enum cti_chan_gate_op op,
}
if (err == 0) {
config->ctigate = reg_value;
if (cti_active(config))
if (cti_is_active(config))
cti_write_single_reg(drvdata, CTIGATE, reg_value);
}
@@ -429,7 +429,7 @@ int cti_channel_setop(struct device *dev, enum cti_chan_set_op op,
break;
}
if ((err == 0) && cti_active(config))
if ((err == 0) && cti_is_active(config))
cti_write_single_reg(drvdata, reg_offset, reg_value);
return err;

View File

@@ -268,7 +268,7 @@ static ssize_t cti_reg32_show(struct device *dev, char *buf,
struct cti_config *config = &drvdata->config;
scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) {
if ((reg_offset >= 0) && cti_active(config)) {
if ((reg_offset >= 0) && cti_is_active(config)) {
val = cti_read_single_reg(drvdata, reg_offset);
if (pcached_val)
*pcached_val = val;
@@ -301,7 +301,7 @@ static ssize_t cti_reg32_store(struct device *dev, const char *buf,
*pcached_val = (u32)val;
/* write through if offset and enabled */
if ((reg_offset >= 0) && cti_active(config))
if ((reg_offset >= 0) && cti_is_active(config))
cti_write_single_reg(drvdata, reg_offset, val);
}
@@ -393,7 +393,7 @@ static ssize_t inen_store(struct device *dev,
config->ctiinen[index] = val;
/* write through if enabled */
if (cti_active(config))
if (cti_is_active(config))
cti_write_single_reg(drvdata, CTIINEN(index), val);
return size;
@@ -434,7 +434,7 @@ static ssize_t outen_store(struct device *dev,
config->ctiouten[index] = val;
/* write through if enabled */
if (cti_active(config))
if (cti_is_active(config))
cti_write_single_reg(drvdata, CTIOUTEN(index), val);
return size;
@@ -476,7 +476,7 @@ static ssize_t appclear_store(struct device *dev,
config->ctiappset &= ~val;
/* write through if enabled */
if (cti_active(config))
if (cti_is_active(config))
cti_write_single_reg(drvdata, CTIAPPCLEAR, val);
return size;
@@ -497,7 +497,7 @@ static ssize_t apppulse_store(struct device *dev,
guard(raw_spinlock_irqsave)(&drvdata->spinlock);
/* write through if enabled */
if (cti_active(config))
if (cti_is_active(config))
cti_write_single_reg(drvdata, CTIAPPPULSE, val);
return size;
@@ -763,7 +763,7 @@ static ssize_t chan_xtrigs_reset_store(struct device *dev,
config->xtrig_rchan_sel = 0;
/* if enabled then write through */
if (cti_active(config))
if (cti_is_active(config))
cti_write_all_hw_regs(drvdata);
return size;

View File

@@ -236,7 +236,7 @@ coresight_cti_get_platform_data(struct device *dev);
const char *cti_plat_get_node_name(struct fwnode_handle *fwnode);
/* cti powered and enabled */
static inline bool cti_active(struct cti_config *cfg)
static inline bool cti_is_active(struct cti_config *cfg)
{
return cfg->hw_powered && cfg->hw_enabled;
}