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drm/amd/display: RV stereo support

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Re-organize 3d declarations

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Vitaly Prosyak
2017-06-12 11:03:26 -05:00
committed by Alex Deucher
parent c8210d5ae3
commit b6d6103bbb
3 changed files with 33 additions and 27 deletions
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8
drivers/gpu/drm/amd/display/dc/dc.h
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@@ -787,13 +787,7 @@ struct dc_container_id {
unsigned short productCode;
};
struct stereo_3d_features {
bool supported ;
bool allTimings ;
bool cloneMode ;
bool scaling ;
bool singleFrameSWPacked;
};
/*
* The sink structure contains EDID and other display device properties

43
drivers/gpu/drm/amd/display/dc/dc_hw_types.h
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@@ -551,27 +551,7 @@ enum dc_timing_standard {
TIMING_STANDARD_MAX
};
enum dc_timing_3d_format {
TIMING_3D_FORMAT_NONE,
TIMING_3D_FORMAT_FRAME_ALTERNATE, /* No stereosync at all*/
TIMING_3D_FORMAT_INBAND_FA, /* Inband Frame Alternate (DVI/DP)*/
TIMING_3D_FORMAT_DP_HDMI_INBAND_FA, /* Inband FA to HDMI Frame Pack*/
/* for active DP-HDMI dongle*/
TIMING_3D_FORMAT_SIDEBAND_FA, /* Sideband Frame Alternate (eDP)*/
TIMING_3D_FORMAT_HW_FRAME_PACKING,
TIMING_3D_FORMAT_SW_FRAME_PACKING,
TIMING_3D_FORMAT_ROW_INTERLEAVE,
TIMING_3D_FORMAT_COLUMN_INTERLEAVE,
TIMING_3D_FORMAT_PIXEL_INTERLEAVE,
TIMING_3D_FORMAT_SIDE_BY_SIDE,
TIMING_3D_FORMAT_TOP_AND_BOTTOM,
TIMING_3D_FORMAT_SBS_SW_PACKED,
/* Side-by-side, packed by application/driver into 2D frame*/
TIMING_3D_FORMAT_TB_SW_PACKED,
/* Top-and-bottom, packed by application/driver into 2D frame*/
TIMING_3D_FORMAT_MAX,
};
enum dc_color_depth {
COLOR_DEPTH_UNDEFINED,
@@ -643,6 +623,29 @@ struct dc_crtc_timing_flags {
};
enum dc_timing_3d_format {
TIMING_3D_FORMAT_NONE,
TIMING_3D_FORMAT_FRAME_ALTERNATE, /* No stereosync at all*/
TIMING_3D_FORMAT_INBAND_FA, /* Inband Frame Alternate (DVI/DP)*/
TIMING_3D_FORMAT_DP_HDMI_INBAND_FA, /* Inband FA to HDMI Frame Pack*/
/* for active DP-HDMI dongle*/
TIMING_3D_FORMAT_SIDEBAND_FA, /* Sideband Frame Alternate (eDP)*/
TIMING_3D_FORMAT_HW_FRAME_PACKING,
TIMING_3D_FORMAT_SW_FRAME_PACKING,
TIMING_3D_FORMAT_ROW_INTERLEAVE,
TIMING_3D_FORMAT_COLUMN_INTERLEAVE,
TIMING_3D_FORMAT_PIXEL_INTERLEAVE,
TIMING_3D_FORMAT_SIDE_BY_SIDE,
TIMING_3D_FORMAT_TOP_AND_BOTTOM,
TIMING_3D_FORMAT_SBS_SW_PACKED,
/* Side-by-side, packed by application/driver into 2D frame*/
TIMING_3D_FORMAT_TB_SW_PACKED,
/* Top-and-bottom, packed by application/driver into 2D frame*/
TIMING_3D_FORMAT_MAX,
};
struct dc_crtc_timing {
uint32_t h_total;

9
drivers/gpu/drm/amd/display/dc/dc_types.h
View File

@@ -272,6 +272,15 @@ enum dc_timing_source {
TIMING_SOURCE_COUNT
};
struct stereo_3d_features {
bool supported ;
bool allTimings ;
bool cloneMode ;
bool scaling ;
bool singleFrameSWPacked;
};
enum dc_timing_support_method {
TIMING_SUPPORT_METHOD_UNDEFINED,
TIMING_SUPPORT_METHOD_EXPLICIT,