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Merge tag 'arm-soc/for-4.20/devicetree-arm64' of https://github.com/Broadcom/stblinux into next/dt

Browse Source 
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 4.20, please pull the following:

- Stefan provides a reference to the Compute Module IO Board V3 such
  that we can reference the arm counterpart and still build it for arm64

- Rob fixes I2C and SPI bus warnings which are going to show up with his
  update to DTC scheduled for 4.20

* tag 'arm-soc/for-4.20/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: Fix I2C and SPI bus warnings
  arm64: dts: broadcom: Add reference to Compute Module IO Board V3

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2018-09-23 06:28:19 -07:00
parent 6125a690fa 7cdbe45da1
commit b610209c5d
5 changed files with 9 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm64/boot/dts/broadcom/Makefile
View File

@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb \
bcm2837-rpi-3-b-plus.dtb
bcm2837-rpi-3-b-plus.dtb \
bcm2837-rpi-cm3-io3.dts
subdir-y += northstar2
subdir-y += stingray

2
arch/arm64/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts Normal file
View File

@@ -0,0 +1,2 @@
// SPDX-License-Identifier: GPL-2.0
#include "arm/bcm2837-rpi-cm3-io3.dts"

4
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
View File

@@ -639,7 +639,7 @@ uart3: serial@66130000 {
status = "disabled";
};
ssp0: ssp@66180000 {
ssp0: spi@66180000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x66180000 0x1000>;
interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
@@ -650,7 +650,7 @@ ssp0: ssp@66180000 {
status = "disabled";
};
ssp1: ssp@66190000 {
ssp1: spi@66190000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x66190000 0x1000>;
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi
View File

@@ -138,7 +138,7 @@ pca9505: pca9505@20 {
&i2c1 {
status = "okay";
pcf8574: pcf8574@20 {
pcf8574: pcf8574@27 {
compatible = "nxp,pcf8574a";
gpio-controller;
#gpio-cells = <2>;

4
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
View File

@@ -521,7 +521,7 @@ uart3: uart@130000 {
status = "disabled";
};
ssp0: ssp@180000 {
ssp0: spi@180000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x00180000 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
@@ -533,7 +533,7 @@ ssp0: ssp@180000 {
status = "disabled";
};
ssp1: ssp@190000 {
ssp1: spi@190000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x00190000 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;