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drm/i915/cx0: Add PLL information for MTL+

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Start bringing MTL+ platforms as part of PLL framework.
The work is started by adding PLL information and related
function hooks.

BSpec: 55726

v2: Revise commit message and add BSpec ID (Suraj)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20251117104602.2363671-17-mika.kahola@intel.com
This commit is contained in:
Mika Kahola
2025-11-17 12:45:46 +02:00
parent ac34237211
commit b5c0256a58
1 changed files with 19 additions and 0 deletions
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19
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
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@@ -4305,6 +4305,25 @@ static const struct intel_dpll_mgr adlp_pll_mgr = {
.compare_hw_state = icl_compare_hw_state,
};
static const struct intel_dpll_funcs mtl_pll_funcs = {
};
static const struct dpll_info mtl_plls[] = {
{ .name = "DPLL 0", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_DPLL0, },
{ .name = "DPLL 1", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_DPLL1, },
/* TODO: Add TBT PLL */
{ .name = "TC PLL 1", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_MGPLL1, },
{ .name = "TC PLL 2", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_MGPLL2, },
{ .name = "TC PLL 3", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_MGPLL3, },
{ .name = "TC PLL 4", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_MGPLL4, },
{}
};
__maybe_unused
static const struct intel_dpll_mgr mtl_pll_mgr = {
.dpll_info = mtl_plls,
};
/**
* intel_dpll_init - Initialize DPLLs
* @display: intel_display device