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drm/i915: Extract intel_crtc_scanline_offset()
Pull the scanline_offset calculation into its own function. Might have further use for this later with DSB scanline waits. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230310235828.17439-4-ville.syrjala@linux.intel.com
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@@ -441,6 +441,53 @@ void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc)
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wait_for_pipe_scanline_moving(crtc, true);
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}
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static int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
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const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
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/*
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* The scanline counter increments at the leading edge of hsync.
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*
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* On most platforms it starts counting from vtotal-1 on the
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* first active line. That means the scanline counter value is
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* always one less than what we would expect. Ie. just after
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* start of vblank, which also occurs at start of hsync (on the
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* last active line), the scanline counter will read vblank_start-1.
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*
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* On gen2 the scanline counter starts counting from 1 instead
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* of vtotal-1, so we have to subtract one (or rather add vtotal-1
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* to keep the value positive), instead of adding one.
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*
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* On HSW+ the behaviour of the scanline counter depends on the output
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* type. For DP ports it behaves like most other platforms, but on HDMI
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* there's an extra 1 line difference. So we need to add two instead of
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* one to the value.
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*
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* On VLV/CHV DSI the scanline counter would appear to increment
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* approx. 1/3 of a scanline before start of vblank. Unfortunately
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* that means we can't tell whether we're in vblank or not while
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* we're on that particular line. We must still set scanline_offset
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* to 1 so that the vblank timestamps come out correct when we query
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* the scanline counter from within the vblank interrupt handler.
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* However if queried just before the start of vblank we'll get an
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* answer that's slightly in the future.
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*/
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if (DISPLAY_VER(i915) == 2) {
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int vtotal;
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vtotal = adjusted_mode->crtc_vtotal;
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if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
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vtotal /= 2;
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return vtotal - 1;
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} else if (HAS_DDI(i915) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
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return 2;
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} else {
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return 1;
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}
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}
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void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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@@ -479,47 +526,7 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state)
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crtc->mode_flags = crtc_state->mode_flags;
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/*
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* The scanline counter increments at the leading edge of hsync.
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*
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* On most platforms it starts counting from vtotal-1 on the
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* first active line. That means the scanline counter value is
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* always one less than what we would expect. Ie. just after
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* start of vblank, which also occurs at start of hsync (on the
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* last active line), the scanline counter will read vblank_start-1.
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*
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* On gen2 the scanline counter starts counting from 1 instead
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* of vtotal-1, so we have to subtract one (or rather add vtotal-1
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* to keep the value positive), instead of adding one.
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*
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* On HSW+ the behaviour of the scanline counter depends on the output
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* type. For DP ports it behaves like most other platforms, but on HDMI
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* there's an extra 1 line difference. So we need to add two instead of
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* one to the value.
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*
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* On VLV/CHV DSI the scanline counter would appear to increment
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* approx. 1/3 of a scanline before start of vblank. Unfortunately
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* that means we can't tell whether we're in vblank or not while
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* we're on that particular line. We must still set scanline_offset
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* to 1 so that the vblank timestamps come out correct when we query
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* the scanline counter from within the vblank interrupt handler.
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* However if queried just before the start of vblank we'll get an
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* answer that's slightly in the future.
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*/
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if (DISPLAY_VER(i915) == 2) {
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int vtotal;
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vtotal = adjusted_mode.crtc_vtotal;
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if (adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
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vtotal /= 2;
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crtc->scanline_offset = vtotal - 1;
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} else if (HAS_DDI(i915) &&
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intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
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crtc->scanline_offset = 2;
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} else {
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crtc->scanline_offset = 1;
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}
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crtc->scanline_offset = intel_crtc_scanline_offset(crtc_state);
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spin_unlock(&i915->uncore.lock);
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spin_unlock_irqrestore(&i915->drm.vblank_time_lock, irqflags);
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