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arm64: dts: apple: t8112: Add nodes for integrated USB Type-C ports

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Add device nodes and connections to support USB 3.x on the SoC's
integrated USBi Type-C ports of M2-based devices.
Each Type-C port has an Apple Type-C PHY for USB 2.0, USB 3.x,
USB4/Thunderbolt, and DisplayPort, a Synopsys Designware USB 3.x
controller, two DART iommu instances and a CD321x USB PD controller.
The port labels use Apple's established naming scheme for the ports.

Signed-off-by: Hector Martin <marcan@marcan.st>
Co-developed-by: Janne Grunau <j@jannau.net>
Signed-off-by: Janne Grunau <j@jannau.net>
Tested-by: Sven Peter <sven@kernel.org> # M1 mac mini and macbook air
Reviewed-by: Sven Peter <sven@kernel.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Link: https://patch.msgid.link/20260109-apple-dt-usb-c-atc-dwc3-v1-2-ce0e92c1a016@jannau.net
Signed-off-by: Sven Peter <sven@kernel.org>
This commit is contained in:
Hector Martin
2026-01-09 15:07:05 +01:00
committed by Sven Peter
parent 2b737cc5be
commit b4f4054864
6 changed files with 287 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm64/boot/dts/apple/t8112-j413.dts
View File

@@ -60,6 +60,18 @@ bluetooth0: bluetooth@0,1 {
};
};
/*
* Provide labels for the USB type C ports.
*/
&typec0 {
label = "USB-C Left-back";
};
&typec1 {
label = "USB-C Left-front";
};
&i2c0 {
/* MagSafe port */
hpm5: usb-pd@3a {

12
arch/arm64/boot/dts/apple/t8112-j415.dts
View File

@@ -60,6 +60,18 @@ bluetooth0: bluetooth@0,1 {
};
};
/*
* Provide labels for the USB type C ports.
*/
&typec0 {
label = "USB-C Left-back";
};
&typec1 {
label = "USB-C Left-front";
};
&i2c0 {
/* MagSafe port */
hpm5: usb-pd@3a {

12
arch/arm64/boot/dts/apple/t8112-j473.dts
View File

@@ -52,3 +52,15 @@ &pcie1_dart {
&pcie2_dart {
status = "okay";
};
/*
* Provide labels for the USB type C ports.
*/
&typec0 {
label = "USB-C Back-left";
};
&typec1 {
label = "USB-C Back-right";
};

12
arch/arm64/boot/dts/apple/t8112-j493.dts
View File

@@ -108,6 +108,18 @@ bluetooth0: bluetooth@0,1 {
};
};
/*
* Provide labels for the USB type C ports.
*/
&typec0 {
label = "USB-C Left-back";
};
&typec1 {
label = "USB-C Left-front";
};
&i2c4 {
status = "okay";
};

134
arch/arm64/boot/dts/apple/t8112-jxxx.dtsi
View File

@@ -11,6 +11,8 @@
/ {
aliases {
atcphy0 = &atcphy0;
atcphy1 = &atcphy1;
serial0 = &serial0;
serial2 = &serial2;
};
@@ -53,6 +55,29 @@ hpm0: usb-pd@38 {
interrupt-parent = <&pinctrl_ap>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec0: connector {
compatible = "usb-c-connector";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec0_connector_hs: endpoint {
remote-endpoint = <&dwc3_0_hs>;
};
};
port@1 {
reg = <1>;
typec0_connector_ss: endpoint {
remote-endpoint = <&atcphy0_typec_lanes>;
};
};
};
};
};
hpm1: usb-pd@3f {
@@ -61,6 +86,115 @@ hpm1: usb-pd@3f {
interrupt-parent = <&pinctrl_ap>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
typec1: connector {
compatible = "usb-c-connector";
power-role = "dual";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
typec1_connector_hs: endpoint {
remote-endpoint = <&dwc3_1_hs>;
};
};
port@1 {
reg = <1>;
typec1_connector_ss: endpoint {
remote-endpoint = <&atcphy1_typec_lanes>;
};
};
};
};
};
};
/* USB controllers */
&dwc3_0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_0_hs: endpoint {
remote-endpoint = <&typec0_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_0_ss: endpoint {
remote-endpoint = <&atcphy0_usb3>;
};
};
};
};
&dwc3_1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dwc3_1_hs: endpoint {
remote-endpoint = <&typec1_connector_hs>;
};
};
port@1 {
reg = <1>;
dwc3_1_ss: endpoint {
remote-endpoint = <&atcphy1_usb3>;
};
};
};
};
/* Type-C PHYs */
&atcphy0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy0_typec_lanes: endpoint {
remote-endpoint = <&typec0_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy0_usb3: endpoint {
remote-endpoint = <&dwc3_0_ss>;
};
};
};
};
&atcphy1 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
atcphy1_typec_lanes: endpoint {
remote-endpoint = <&typec1_connector_ss>;
};
};
port@1 {
reg = <1>;
atcphy1_usb3: endpoint {
remote-endpoint = <&dwc3_1_ss>;
};
};
};
};

105
arch/arm64/boot/dts/apple/t8112.dtsi
View File

@@ -11,6 +11,7 @@
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/spmi/spmi.h>
/ {
@@ -1010,6 +1011,110 @@ nvme@27bcc0000 {
resets = <&ps_ans>;
};
dwc3_0: usb@382280000 {
compatible = "apple,t8112-dwc3", "apple,t8103-dwc3";
reg = <0x3 0x82280000 0x0 0xcd00>, <0x3 0x8228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 1031 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
power-domains = <&ps_atc0_usb>;
resets = <&atcphy0>;
phys = <&atcphy0 PHY_TYPE_USB2>, <&atcphy0 PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
dwc3_0_dart_0: iommu@382f00000 {
compatible = "apple,t8110-dart";
reg = <0x3 0x82f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 1035 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
power-domains = <&ps_atc0_usb>;
};
dwc3_0_dart_1: iommu@382f80000 {
compatible = "apple,t8110-dart";
reg = <0x3 0x82f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 1035 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
power-domains = <&ps_atc0_usb>;
};
atcphy0: phy@383000000 {
compatible = "apple,t8112-atcphy", "apple,t8103-atcphy";
reg = <0x3 0x83000000 0x0 0x4c000>,
<0x3 0x83050000 0x0 0x8000>,
<0x3 0x80000000 0x0 0x4000>,
<0x3 0x82a90000 0x0 0x4000>,
<0x3 0x82a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&ps_atc0_usb>;
};
dwc3_1: usb@502280000 {
compatible = "apple,t8112-dwc3", "apple,t8103-dwc3";
reg = <0x5 0x02280000 0x0 0xcd00>, <0x5 0x0228cd00 0x0 0x3200>;
reg-names = "dwc3-core", "dwc3-apple";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 1112 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
power-domains = <&ps_atc1_usb>;
resets = <&atcphy1>;
phys = <&atcphy1 PHY_TYPE_USB2>, <&atcphy1 PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
dwc3_1_dart_0: iommu@502f00000 {
compatible = "apple,t8110-dart";
reg = <0x5 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 1116 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
power-domains = <&ps_atc1_usb>;
};
dwc3_1_dart_1: iommu@502f80000 {
compatible = "apple,t8110-dart";
reg = <0x5 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 1116 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
power-domains = <&ps_atc1_usb>;
};
atcphy1: phy@503000000 {
compatible = "apple,t8112-atcphy", "apple,t8103-atcphy";
reg = <0x5 0x03000000 0x0 0x4c000>,
<0x5 0x03050000 0x0 0x8000>,
<0x5 0x0 0x0 0x4000>,
<0x5 0x02a90000 0x0 0x4000>,
<0x5 0x02a84000 0x0 0x4000>;
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
"pipehandler";
#phy-cells = <1>;
#reset-cells = <0>;
orientation-switch;
mode-switch;
power-domains = <&ps_atc1_usb>;
};
pcie0_dart: iommu@681008000 {
compatible = "apple,t8110-dart";
reg = <0x6 0x81008000 0x0 0x4000>;