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arm64: dts: ls1028a: move pixel clock pll into /soc

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Move it inside the /soc subnode because it is part of the CCSR space.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Michael Walle
2021-08-31 15:40:07 +02:00
committed by Shawn Guo
parent 0c8bedf26f
commit b4751afb72
1 changed files with 7 additions and 7 deletions
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14
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
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@@ -80,13 +80,6 @@ osc_27m: clock-osc-27m {
clock-output-names = "phy_27m";
};
dpclk: clock-controller@f1f0000 {
compatible = "fsl,ls1028a-plldig";
reg = <0x0 0xf1f0000 0x0 0xffff>;
#clock-cells = <0>;
clocks = <&osc_27m>;
};
firmware {
optee: optee {
compatible = "linaro,optee-tz";
@@ -926,6 +919,13 @@ QORIQ_CLK_PLL_DIV(2)>,
status = "disabled";
};
dpclk: clock-controller@f1f0000 {
compatible = "fsl,ls1028a-plldig";
reg = <0x0 0xf1f0000 0x0 0x10000>;
#clock-cells = <0>;
clocks = <&osc_27m>;
};
tmu: tmu@1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;