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ARM: tegra: Add new properties to USB PHY device-tree nodes

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Add new properties to USB PHYs needed for enabling USB OTG mode.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Dmitry Osipenko
2021-09-12 21:17:16 +03:00
committed by Thierry Reding
parent 0bddaaf639
commit b460ecc0b3
4 changed files with 22 additions and 0 deletions
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4
arch/arm/boot/dts/tegra114.dtsi
View File

@@ -706,6 +706,7 @@ phy1: usb-phy@7d000000 {
compatible = "nvidia,tegra114-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x7d000000 0x4000>,
<0x7d000000 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USBD>,
<&tegra_car TEGRA114_CLK_PLL_U>,
@@ -725,6 +726,7 @@ phy1: usb-phy@7d000000 {
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
nvidia,has-utmi-pad-registers;
nvidia,pmc = <&tegra_pmc 0>;
status = "disabled";
};
@@ -744,6 +746,7 @@ phy3: usb-phy@7d008000 {
compatible = "nvidia,tegra114-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x7d008000 0x4000>,
<0x7d000000 0x4000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USB3>,
<&tegra_car TEGRA114_CLK_PLL_U>,
@@ -762,6 +765,7 @@ phy3: usb-phy@7d008000 {
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
nvidia,pmc = <&tegra_pmc 2>;
status = "disabled";
};

6
arch/arm/boot/dts/tegra124.dtsi
View File

@@ -1094,6 +1094,7 @@ phy1: usb-phy@7d000000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d000000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USBD>,
<&tegra_car TEGRA124_CLK_PLL_U>,
@@ -1113,6 +1114,7 @@ phy1: usb-phy@7d000000 {
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
nvidia,has-utmi-pad-registers;
nvidia,pmc = <&tegra_pmc 0>;
status = "disabled";
};
@@ -1132,6 +1134,7 @@ phy2: usb-phy@7d004000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d004000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB2>,
<&tegra_car TEGRA124_CLK_PLL_U>,
@@ -1150,6 +1153,7 @@ phy2: usb-phy@7d004000 {
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
nvidia,pmc = <&tegra_pmc 1>;
status = "disabled";
};
@@ -1169,6 +1173,7 @@ phy3: usb-phy@7d008000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d008000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB3>,
<&tegra_car TEGRA124_CLK_PLL_U>,
@@ -1187,6 +1192,7 @@ phy3: usb-phy@7d008000 {
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
nvidia,pmc = <&tegra_pmc 2>;
status = "disabled";
};

6
arch/arm/boot/dts/tegra20.dtsi
View File

@@ -761,6 +761,7 @@ phy1: usb-phy@c5000000 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5000000 0x4000>,
<0xc5000000 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA20_CLK_USBD>,
<&tegra_car TEGRA20_CLK_PLL_U>,
@@ -779,6 +780,7 @@ phy1: usb-phy@c5000000 {
nvidia,xcvr-lsfslew = <1>;
nvidia,xcvr-lsrslew = <1>;
nvidia,has-utmi-pad-registers;
nvidia,pmc = <&tegra_pmc 0>;
status = "disabled";
};
@@ -797,6 +799,7 @@ usb@c5004000 {
phy2: usb-phy@c5004000 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5004000 0x4000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "ulpi";
clocks = <&tegra_car TEGRA20_CLK_USB2>,
<&tegra_car TEGRA20_CLK_PLL_U>,
@@ -805,6 +808,7 @@ phy2: usb-phy@c5004000 {
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,pmc = <&tegra_pmc 1>;
status = "disabled";
};
@@ -824,6 +828,7 @@ phy3: usb-phy@c5008000 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5008000 0x4000>,
<0xc5000000 0x4000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA20_CLK_USB3>,
<&tegra_car TEGRA20_CLK_PLL_U>,
@@ -840,6 +845,7 @@ phy3: usb-phy@c5008000 {
nvidia,xcvr-setup = <9>;
nvidia,xcvr-lsfslew = <2>;
nvidia,xcvr-lsrslew = <2>;
nvidia,pmc = <&tegra_pmc 2>;
status = "disabled";
};

6
arch/arm/boot/dts/tegra30.dtsi
View File

@@ -974,6 +974,7 @@ phy1: usb-phy@7d000000 {
compatible = "nvidia,tegra30-usb-phy";
reg = <0x7d000000 0x4000>,
<0x7d000000 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USBD>,
<&tegra_car TEGRA30_CLK_PLL_U>,
@@ -994,6 +995,7 @@ phy1: usb-phy@7d000000 {
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,has-utmi-pad-registers;
nvidia,pmc = <&tegra_pmc 0>;
status = "disabled";
};
@@ -1013,6 +1015,7 @@ phy2: usb-phy@7d004000 {
compatible = "nvidia,tegra30-usb-phy";
reg = <0x7d004000 0x4000>,
<0x7d000000 0x4000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB2>,
<&tegra_car TEGRA30_CLK_PLL_U>,
@@ -1032,6 +1035,7 @@ phy2: usb-phy@7d004000 {
nvidia,xcvr-hsslew = <32>;
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,pmc = <&tegra_pmc 2>;
status = "disabled";
};
@@ -1051,6 +1055,7 @@ phy3: usb-phy@7d008000 {
compatible = "nvidia,tegra30-usb-phy";
reg = <0x7d008000 0x4000>,
<0x7d000000 0x4000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB3>,
<&tegra_car TEGRA30_CLK_PLL_U>,
@@ -1070,6 +1075,7 @@ phy3: usb-phy@7d008000 {
nvidia,xcvr-hsslew = <32>;
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,pmc = <&tegra_pmc 1>;
status = "disabled";
};