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i2c: imx: separate atomic, dma and non-dma use case
Separate the atomic, dma and non-dma use case as a preparation step for moving the non-dma use case to the isr to avoid rescheduling while a transfer is in progress. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Acked-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
This commit is contained in:
committed by
Andi Shyti
parent
6692694aca
commit
b460b15b3c
@@ -1011,6 +1011,43 @@ static int i2c_imx_dma_write(struct imx_i2c_struct *i2c_imx,
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return i2c_imx_acked(i2c_imx);
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}
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static int i2c_imx_prepare_read(struct imx_i2c_struct *i2c_imx,
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struct i2c_msg *msgs, bool atomic,
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bool use_dma)
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{
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int result;
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unsigned int temp = 0;
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/* write slave address */
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imx_i2c_write_reg(i2c_8bit_addr_from_msg(msgs), i2c_imx, IMX_I2C_I2DR);
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result = i2c_imx_trx_complete(i2c_imx, atomic);
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if (result)
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return result;
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result = i2c_imx_acked(i2c_imx);
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if (result)
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return result;
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dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__);
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/* setup bus to read data */
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temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
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temp &= ~I2CR_MTX;
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/*
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* Reset the I2CR_TXAK flag initially for SMBus block read since the
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* length is unknown
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*/
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if (msgs->len - 1)
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temp &= ~I2CR_TXAK;
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if (use_dma)
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temp |= I2CR_DMAEN;
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */
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return 0;
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}
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static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx,
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struct i2c_msg *msgs, bool is_lastmsg)
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{
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@@ -1021,6 +1058,11 @@ static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx,
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struct imx_i2c_dma *dma = i2c_imx->dma;
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struct device *dev = &i2c_imx->adapter.dev;
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result = i2c_imx_prepare_read(i2c_imx, msgs, false, true);
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if (result)
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return result;
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dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);
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dma->chan_using = dma->chan_rx;
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dma->dma_transfer_dir = DMA_DEV_TO_MEM;
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@@ -1131,50 +1173,24 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs,
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return 0;
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}
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static int i2c_imx_atomic_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
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{
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return i2c_imx_write(i2c_imx, msgs, true);
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}
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static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs,
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bool is_lastmsg, bool atomic)
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{
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int i, result;
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unsigned int temp;
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int block_data = msgs->flags & I2C_M_RECV_LEN;
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int use_dma = i2c_imx->dma && msgs->flags & I2C_M_DMA_SAFE &&
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msgs->len >= DMA_THRESHOLD && !block_data;
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dev_dbg(&i2c_imx->adapter.dev,
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"<%s> write slave address: addr=0x%x\n",
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__func__, i2c_8bit_addr_from_msg(msgs));
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/* write slave address */
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imx_i2c_write_reg(i2c_8bit_addr_from_msg(msgs), i2c_imx, IMX_I2C_I2DR);
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result = i2c_imx_trx_complete(i2c_imx, atomic);
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result = i2c_imx_prepare_read(i2c_imx, msgs, atomic, false);
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if (result)
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return result;
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result = i2c_imx_acked(i2c_imx);
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if (result)
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return result;
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dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__);
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/* setup bus to read data */
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temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
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temp &= ~I2CR_MTX;
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/*
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* Reset the I2CR_TXAK flag initially for SMBus block read since the
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* length is unknown
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*/
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if ((msgs->len - 1) || block_data)
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temp &= ~I2CR_TXAK;
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if (use_dma)
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temp |= I2CR_DMAEN;
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */
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dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);
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if (use_dma)
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return i2c_imx_dma_read(i2c_imx, msgs, is_lastmsg);
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/* read data */
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for (i = 0; i < msgs->len; i++) {
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u8 len = 0;
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@@ -1241,6 +1257,12 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs,
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return 0;
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}
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static int i2c_imx_atomic_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs,
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bool is_lastmsg)
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{
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return i2c_imx_read(i2c_imx, msgs, is_lastmsg, true);
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}
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static int i2c_imx_xfer_common(struct i2c_adapter *adapter,
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struct i2c_msg *msgs, int num, bool atomic)
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{
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@@ -1248,6 +1270,7 @@ static int i2c_imx_xfer_common(struct i2c_adapter *adapter,
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int result;
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bool is_lastmsg = false;
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struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
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int use_dma = 0;
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/* Start I2C transfer */
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result = i2c_imx_start(i2c_imx, atomic);
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@@ -1300,15 +1323,25 @@ static int i2c_imx_xfer_common(struct i2c_adapter *adapter,
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(temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0),
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(temp & I2SR_RXAK ? 1 : 0));
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#endif
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use_dma = i2c_imx->dma && msgs[i].len >= DMA_THRESHOLD &&
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msgs[i].flags & I2C_M_DMA_SAFE;
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if (msgs[i].flags & I2C_M_RD) {
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result = i2c_imx_read(i2c_imx, &msgs[i], is_lastmsg, atomic);
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int block_data = msgs->flags & I2C_M_RECV_LEN;
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if (atomic)
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result = i2c_imx_atomic_read(i2c_imx, &msgs[i], is_lastmsg);
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else if (use_dma && !block_data)
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result = i2c_imx_dma_read(i2c_imx, &msgs[i], is_lastmsg);
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else
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result = i2c_imx_read(i2c_imx, &msgs[i], is_lastmsg, false);
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} else {
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if (!atomic &&
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i2c_imx->dma && msgs[i].len >= DMA_THRESHOLD &&
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msgs[i].flags & I2C_M_DMA_SAFE)
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if (atomic)
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result = i2c_imx_atomic_write(i2c_imx, &msgs[i]);
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else if (use_dma)
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result = i2c_imx_dma_write(i2c_imx, &msgs[i]);
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else
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result = i2c_imx_write(i2c_imx, &msgs[i], atomic);
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result = i2c_imx_write(i2c_imx, &msgs[i], false);
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}
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if (result)
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goto fail0;
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