RISC-V: KVM: Optimize comments in kvm_riscv_vcpu_isa_disable_allowed

The comments for EXT_SVADE are a bit confusing. Clarify it.

Signed-off-by: Chao Du <duchao@eswincomputing.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20250221025929.31678-1-duchao@eswincomputing.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Chao Du
2025-02-21 02:59:29 +00:00
committed by Anup Patel
parent 2d117e67f3
commit b3f263a98d

View File

@@ -203,7 +203,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_SVADE:
/*
* The henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero.
* Svade is not allowed to disable when the platform use Svade.
* Svade can't be disabled unless we support Svadu.
*/
return arch_has_hw_pte_young();
default: