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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-16 04:21:09 -04:00
Merge branch 'for-7.1/intel-thc' into for-linus
- power management improvements to intel-thc-hid driver (Even Xu)
This commit is contained in:
@@ -753,9 +753,11 @@ static int quickspi_suspend(struct device *device)
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if (!qsdev)
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return -ENODEV;
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ret = quickspi_set_power(qsdev, HIDSPI_SLEEP);
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if (ret)
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return ret;
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if (!device_may_wakeup(qsdev->dev)) {
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ret = quickspi_set_power(qsdev, HIDSPI_SLEEP);
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if (ret)
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return ret;
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}
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ret = thc_interrupt_quiesce(qsdev->thc_hw, true);
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if (ret)
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@@ -794,9 +796,8 @@ static int quickspi_resume(struct device *device)
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if (ret)
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return ret;
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ret = quickspi_set_power(qsdev, HIDSPI_ON);
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if (ret)
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return ret;
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if (!device_may_wakeup(qsdev->dev))
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return quickspi_set_power(qsdev, HIDSPI_ON);
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return 0;
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}
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@@ -855,6 +856,9 @@ static int quickspi_poweroff(struct device *device)
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if (!qsdev)
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return -ENODEV;
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/* Ignore the return value as platform will be poweroff soon */
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quickspi_set_power(qsdev, HIDSPI_OFF);
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ret = thc_interrupt_quiesce(qsdev->thc_hw, true);
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if (ret)
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return ret;
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@@ -1112,12 +1112,15 @@ int thc_port_select(struct thc_device *dev, enum thc_port_type port_type)
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EXPORT_SYMBOL_NS_GPL(thc_port_select, "INTEL_THC");
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#define THC_SPI_FREQUENCY_7M 7812500
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#define THC_SPI_FREQUENCY_10M 10416700
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#define THC_SPI_FREQUENCY_15M 15625000
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#define THC_SPI_FREQUENCY_17M 17857100
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#define THC_SPI_FREQUENCY_20M 20833000
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#define THC_SPI_FREQUENCY_25M 25000000
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#define THC_SPI_FREQUENCY_31M 31250000
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#define THC_SPI_FREQUENCY_35M 35714200
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#define THC_SPI_FREQUENCY_41M 41666700
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#define THC_SPI_FREQUENCY_50M 50000000
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#define THC_SPI_LOW_FREQUENCY THC_SPI_FREQUENCY_17M
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@@ -1125,21 +1128,27 @@ static u8 thc_get_spi_freq_div_val(struct thc_device *dev, u32 spi_freq_val)
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{
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static const int frequency[] = {
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THC_SPI_FREQUENCY_7M,
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THC_SPI_FREQUENCY_10M,
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THC_SPI_FREQUENCY_15M,
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THC_SPI_FREQUENCY_17M,
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THC_SPI_FREQUENCY_20M,
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THC_SPI_FREQUENCY_25M,
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THC_SPI_FREQUENCY_31M,
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THC_SPI_FREQUENCY_35M,
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THC_SPI_FREQUENCY_41M,
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THC_SPI_FREQUENCY_50M,
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};
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static const u8 frequency_div[] = {
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THC_SPI_FRQ_DIV_2,
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THC_SPI_FRQ_DIV_1,
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THC_SPI_FRQ_DIV_1,
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THC_SPI_FRQ_DIV_7,
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THC_SPI_FRQ_DIV_6,
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THC_SPI_FRQ_DIV_5,
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THC_SPI_FRQ_DIV_4,
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THC_SPI_FRQ_DIV_3,
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THC_SPI_FRQ_DIV_3,
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THC_SPI_FRQ_DIV_2,
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};
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int size = ARRAY_SIZE(frequency);
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u32 closest_freq;
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@@ -1190,6 +1199,25 @@ int thc_spi_read_config(struct thc_device *dev, u32 spi_freq_val,
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if (spi_freq_val < THC_SPI_LOW_FREQUENCY)
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is_low_freq = true;
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/* 10M, 35M and 50M CLK need 1.5, 3.5 and 2.5 half divider */
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if ((freq_div == THC_SPI_FRQ_DIV_2 && spi_freq_val >= THC_SPI_FREQUENCY_50M) ||
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(freq_div == THC_SPI_FRQ_DIV_3 && spi_freq_val < THC_SPI_FREQUENCY_41M) ||
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(freq_div == THC_SPI_FRQ_DIV_1 && spi_freq_val < THC_SPI_FREQUENCY_15M)) {
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SPI_DUTYC_CFG_OFFSET,
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THC_M_PRT_SPI_DUTYC_CFG_SPI_TCRF_HALF_DIV_EN,
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THC_M_PRT_SPI_DUTYC_CFG_SPI_TCRF_HALF_DIV_EN);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SPARE_REG_OFFSET,
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THC_M_PRT_SPARE_REG_SPI_CLK_INV_ENABLE,
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THC_M_PRT_SPARE_REG_SPI_CLK_INV_ENABLE);
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} else {
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SPI_DUTYC_CFG_OFFSET,
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THC_M_PRT_SPI_DUTYC_CFG_SPI_TCRF_HALF_DIV_EN, 0);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SPARE_REG_OFFSET,
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THC_M_PRT_SPARE_REG_SPI_CLK_INV_ENABLE, 0);
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}
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cfg = FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_TCRF, freq_div) |
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FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_TRMODE, io_mode) |
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(is_low_freq ? THC_M_PRT_SPI_CFG_SPI_LOW_FREQ_EN : 0) |
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@@ -1243,6 +1271,25 @@ int thc_spi_write_config(struct thc_device *dev, u32 spi_freq_val,
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if (spi_freq_val < THC_SPI_LOW_FREQUENCY)
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is_low_freq = true;
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/* 10M, 35M and 50M CLK need 1.5, 3.5 and 2.5 half divider */
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if ((freq_div == THC_SPI_FRQ_DIV_2 && spi_freq_val >= THC_SPI_FREQUENCY_50M) ||
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(freq_div == THC_SPI_FRQ_DIV_3 && spi_freq_val < THC_SPI_FREQUENCY_41M) ||
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(freq_div == THC_SPI_FRQ_DIV_1 && spi_freq_val < THC_SPI_FREQUENCY_15M)) {
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SPI_DUTYC_CFG_OFFSET,
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THC_M_PRT_SPI_DUTYC_CFG_SPI_TCWF_HALF_DIV_EN,
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THC_M_PRT_SPI_DUTYC_CFG_SPI_TCWF_HALF_DIV_EN);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SPARE_REG_OFFSET,
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THC_M_PRT_SPARE_REG_SPI_CLK_INV_ENABLE,
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THC_M_PRT_SPARE_REG_SPI_CLK_INV_ENABLE);
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} else {
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SPI_DUTYC_CFG_OFFSET,
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THC_M_PRT_SPI_DUTYC_CFG_SPI_TCWF_HALF_DIV_EN, 0);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SPARE_REG_OFFSET,
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THC_M_PRT_SPARE_REG_SPI_CLK_INV_ENABLE, 0);
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}
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cfg = FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_TCWF, freq_div) |
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FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_TWMODE, io_mode) |
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(is_low_freq ? THC_M_PRT_SPI_CFG_SPI_LOW_FREQ_EN : 0) |
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@@ -643,6 +643,10 @@
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#define THC_M_PRT_SPI_DUTYC_CFG_SPI_CSA_CK_DELAY_VAL GENMASK(3, 0)
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#define THC_M_PRT_SPI_DUTYC_CFG_SPI_CSA_CK_DELAY_EN BIT(25)
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#define THC_M_PRT_SPI_DUTYC_CFG_SPI_TCRF_HALF_DIV_EN BIT(30)
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#define THC_M_PRT_SPI_DUTYC_CFG_SPI_TCWF_HALF_DIV_EN BIT(31)
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#define THC_M_PRT_SPARE_REG_SPI_CLK_INV_ENABLE BIT(2)
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/* CS Assertion delay default value */
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#define THC_CSA_CK_DELAY_VAL_DEFAULT 4
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