net: stmmac: add helper to set transmit tail pointer

Setting the queue transmit tail pointer follows a common pattern:
calculate the DMA address, and then call stmmac_set_tx_tail_ptr().
The only difference between all the call sites is the index used.

Factor this out into a static function.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1w1LWo-0000000DGSw-1MCe@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Russell King (Oracle)
2026-03-14 09:43:26 +00:00
committed by Jakub Kicinski
parent 2c3525ad09
commit b2fd52d90b

View File

@@ -385,6 +385,18 @@ static struct dma_desc *stmmac_get_tx_desc(struct stmmac_priv *priv,
return &tx_q->dma_tx[index];
}
static void stmmac_set_queue_tx_tail_ptr(struct stmmac_priv *priv,
struct stmmac_tx_queue *tx_q,
unsigned int chan, unsigned int index)
{
int desc_size;
desc_size = stmmac_get_tx_desc_size(priv, tx_q);
tx_q->tx_tail_addr = tx_q->dma_tx_phy + index * desc_size;
stmmac_set_tx_tail_ptr(priv, priv->ioaddr, tx_q->tx_tail_addr, chan);
}
static size_t stmmac_get_rx_desc_size(struct stmmac_priv *priv)
{
if (priv->extend_desc)
@@ -3311,9 +3323,7 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
tx_q->dma_tx_phy, chan);
tx_q->tx_tail_addr = tx_q->dma_tx_phy;
stmmac_set_tx_tail_ptr(priv, priv->ioaddr,
tx_q->tx_tail_addr, chan);
stmmac_set_queue_tx_tail_ptr(priv, tx_q, chan, 0);
}
return ret;
@@ -4350,9 +4360,6 @@ static void stmmac_tso_allocator(struct stmmac_priv *priv, dma_addr_t des,
static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue)
{
struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
int desc_size;
desc_size = stmmac_get_tx_desc_size(priv, tx_q);
/* The own bit must be the latest setting done when prepare the
* descriptor and then barrier is needed to make sure that
@@ -4360,8 +4367,7 @@ static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue)
*/
wmb();
tx_q->tx_tail_addr = tx_q->dma_tx_phy + (tx_q->cur_tx * desc_size);
stmmac_set_tx_tail_ptr(priv, priv->ioaddr, tx_q->tx_tail_addr, queue);
stmmac_set_queue_tx_tail_ptr(priv, tx_q, queue, tx_q->cur_tx);
}
/**
@@ -6991,9 +6997,7 @@ void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue)
if (tx_q->tbs & STMMAC_TBS_AVAIL)
stmmac_enable_tbs(priv, priv->ioaddr, 1, tx_q->queue_index);
tx_q->tx_tail_addr = tx_q->dma_tx_phy;
stmmac_set_tx_tail_ptr(priv, priv->ioaddr,
tx_q->tx_tail_addr, tx_q->queue_index);
stmmac_set_queue_tx_tail_ptr(priv, tx_q, tx_q->queue_index, 0);
stmmac_start_tx_dma(priv, queue);
@@ -7094,9 +7098,7 @@ int stmmac_xdp_open(struct net_device *dev)
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
tx_q->dma_tx_phy, chan);
tx_q->tx_tail_addr = tx_q->dma_tx_phy;
stmmac_set_tx_tail_ptr(priv, priv->ioaddr,
tx_q->tx_tail_addr, chan);
stmmac_set_queue_tx_tail_ptr(priv, tx_q, chan, 0);
hrtimer_setup(&tx_q->txtimer, stmmac_tx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
}