power: supply: max17042_battery: use ModelCfg refresh on max17055

Unlike other models, max17055 doesn't require cell characterization data
and operates on a smaller set of input variables (`DesignCap`, `VEmpty`,
`IChgTerm`, and `ModelCfg`). Those values can be filled in through
`max17042_override_por_values()`, but the refresh bit has to be set
afterward in order to make them apply.

Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Vincent Cloutier <vincent@cloutier.co>
Link: https://patch.msgid.link/20260406205759.493288-8-vincent.cloutier@icloud.com
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This commit is contained in:
Sebastian Krzyszkowiak
2026-04-06 16:57:55 -04:00
committed by Sebastian Reichel
parent d0c54c6f9d
commit b26bc0b97d
2 changed files with 46 additions and 31 deletions

View File

@@ -843,6 +843,9 @@ static inline void max17042_override_por_values(struct max17042_chip *chip)
(chip->chip_type == MAXIM_DEVICE_TYPE_MAX77759)) {
max17042_override_por(map, MAX17047_V_empty, config->vempty);
}
if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055)
max17042_override_por(map, MAX17055_ModelCfg, config->model_cfg);
}
static int max17042_init_chip(struct max17042_chip *chip)
@@ -851,45 +854,54 @@ static int max17042_init_chip(struct max17042_chip *chip)
int ret;
max17042_override_por_values(chip);
if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055) {
regmap_write_bits(map, MAX17055_ModelCfg,
MAX17055_MODELCFG_REFRESH_BIT,
MAX17055_MODELCFG_REFRESH_BIT);
}
/* After Power up, the MAX17042 requires 500mS in order
* to perform signal debouncing and initial SOC reporting
*/
msleep(500);
/* Initialize configuration */
max17042_write_config_regs(chip);
if (chip->chip_type != MAXIM_DEVICE_TYPE_MAX17055) {
/* Initialize configuration */
max17042_write_config_regs(chip);
/* write cell characterization data */
ret = max17042_init_model(chip);
if (ret) {
dev_err(chip->dev, "%s init failed\n",
__func__);
return -EIO;
/* write cell characterization data */
ret = max17042_init_model(chip);
if (ret) {
dev_err(chip->dev, "%s init failed\n",
__func__);
return -EIO;
}
ret = max17042_verify_model_lock(chip);
if (ret) {
dev_err(chip->dev, "%s lock verify failed\n",
__func__);
return -EIO;
}
/* write custom parameters */
max17042_write_custom_regs(chip);
/* update capacity params */
max17042_update_capacity_regs(chip);
/* delay must be atleast 350mS to allow VFSOC
* to be calculated from the new configuration
*/
msleep(350);
/* reset vfsoc0 reg */
max17042_reset_vfsoc0_reg(chip);
/* load new capacity params */
max17042_load_new_capacity_params(chip);
}
ret = max17042_verify_model_lock(chip);
if (ret) {
dev_err(chip->dev, "%s lock verify failed\n",
__func__);
return -EIO;
}
/* write custom parameters */
max17042_write_custom_regs(chip);
/* update capacity params */
max17042_update_capacity_regs(chip);
/* delay must be atleast 350mS to allow VFSOC
* to be calculated from the new configuration
*/
msleep(350);
/* reset vfsoc0 reg */
max17042_reset_vfsoc0_reg(chip);
/* load new capacity params */
max17042_load_new_capacity_params(chip);
/* Init complete, Clear the POR bit */
regmap_update_bits(map, MAX17042_STATUS, STATUS_POR_BIT, 0x0);
return 0;

View File

@@ -24,6 +24,8 @@
#define MAX17042_CHARACTERIZATION_DATA_SIZE 48
#define MAX17055_MODELCFG_REFRESH_BIT BIT(15)
enum max17042_register {
MAX17042_STATUS = 0x00,
MAX17042_VALRT_Th = 0x01,
@@ -219,6 +221,7 @@ struct max17042_config_data {
u16 full_soc_thresh; /* 0x13 */
u16 design_cap; /* 0x18 */
u16 ichgt_term; /* 0x1E */
u16 model_cfg; /* 0xDB */
/* MG3 config */
u16 at_rate; /* 0x04 */