mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-09 14:56:54 -04:00
arm: dts: arm: Drop redundant fixed-factor clocks
There's not much reason to have multiple fixed-factor-clock instances which are all the same factor and clock input. Drop the nodes, but keep the labels to minimize the changes and keep some distinction of the different clocks. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/20240528191536.1444649-1-robh@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240627-arm-dts-fixes-v1-1-40a2cb7d344b@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
committed by
Arnd Bergmann
parent
f7e642bcd6
commit
b1a4e71d4f
@@ -53,7 +53,7 @@ vmmc: fixedregulator@0 {
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regulator-boot-on;
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};
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xtal24mhz: xtal24mhz@24M {
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xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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@@ -67,46 +67,6 @@ timclk: timclk@1M {
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clocks = <&xtal24mhz>;
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};
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mclk: mclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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kmiclk: kmiclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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sspclk: sspclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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uartclk: uartclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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wdogclk: wdogclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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/* FIXME: this actually hangs off the PLL clocks */
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pclk: pclk@0 {
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#clock-cells = <0>;
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@@ -63,7 +63,7 @@ veth: regulator-veth {
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regulator-boot-on;
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};
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xtal24mhz: xtal24mhz@24M {
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xtal24mhz: mclk: kmiclk: sspclk: uartclk: clock-24000000 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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@@ -77,38 +77,6 @@ timclk: timclk@1M {
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clocks = <&xtal24mhz>;
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};
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mclk: mclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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kmiclk: kmiclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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sspclk: sspclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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uartclk: uartclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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/* FIXME: this actually hangs off the PLL clocks */
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pclk: pclk@0 {
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#clock-cells = <0>;
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@@ -163,7 +163,7 @@ veth: regulator-veth {
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regulator-boot-on;
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};
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xtal24mhz: xtal24mhz@24M {
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xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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@@ -183,46 +183,6 @@ timclk: timclk@1M {
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clocks = <&xtal24mhz>;
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};
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mclk: mclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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kmiclk: kmiclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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sspclk: sspclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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uartclk: uartclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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wdogclk: wdogclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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/* FIXME: this actually hangs off the PLL clocks */
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pclk: pclk@0 {
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#clock-cells = <0>;
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@@ -62,7 +62,7 @@ veth: regulator-veth {
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regulator-boot-on;
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};
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xtal24mhz: xtal24mhz@24M {
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xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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@@ -82,46 +82,6 @@ timclk: timclk@1M {
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clocks = <&xtal24mhz>;
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};
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mclk: mclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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kmiclk: kmiclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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sspclk: sspclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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uartclk: uartclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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wdogclk: wdogclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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/* FIXME: this actually hangs off the PLL clocks */
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pclk: pclk@0 {
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#clock-cells = <0>;
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@@ -57,20 +57,12 @@ chosen {
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};
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/* 24 MHz chrystal on the Integrator/AP development board */
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xtal24mhz: xtal24mhz@24M {
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xtal24mhz: pclk: clock-24000000 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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pclk: pclk@0 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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/* The UART clock is 14.74 MHz divided by an ICS525 */
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uartclk: uartclk@14.74M {
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#clock-cells = <0>;
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@@ -78,7 +78,7 @@ spicfgclk: clk-spicfg {
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clock-frequency = <75000000>;
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};
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sysclk: clk-sys {
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sysclk: spiclcd: spicon: i2cclcd: i2caud: clock-sys {
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compatible = "fixed-factor-clock";
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clocks = <&oscclk0>;
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#clock-cells = <0>;
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@@ -102,38 +102,6 @@ audsclk: clk-auds {
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clock-mult = <1>;
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};
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spiclcd: clk-cpiclcd {
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compatible = "fixed-factor-clock";
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clocks = <&oscclk0>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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spicon: clk-spicon {
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compatible = "fixed-factor-clock";
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clocks = <&oscclk0>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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i2cclcd: clk-i2cclcd {
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compatible = "fixed-factor-clock";
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clocks = <&oscclk0>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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i2caud: clk-i2caud {
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compatible = "fixed-factor-clock";
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clocks = <&oscclk0>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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soc {
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compatible = "simple-bus";
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ranges;
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