mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-09 19:51:25 -04:00
Merge tag 'mlx5-updates-2023-07-24' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
Saeed Mahameed says: ==================== mlx5-updates-2023-07-24 1) Generalize devcom implementation to be independent of number of ports or device's GUID. 2) Save memory on command interface statistics. 3) General code cleanups * tag 'mlx5-updates-2023-07-24' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux: net/mlx5: Give esw_offloads_load/unload_rep() "mlx5_" prefix net/mlx5: Make mlx5_eswitch_load/unload_vport() static net/mlx5: Make mlx5_esw_offloads_rep_load/unload() static net/mlx5: Remove pointless devlink_rate checks net/mlx5: Don't check vport->enabled in port ops net/mlx5e: Make flow classification filters static net/mlx5e: Remove duplicate code for user flow net/mlx5: Allocate command stats with xarray net/mlx5: split mlx5_cmd_init() to probe and reload routines net/mlx5: Remove redundant cmdif revision check net/mlx5: Re-organize mlx5_cmd struct net/mlx5e: E-Switch, Allow devcom initialization on more vports net/mlx5e: E-Switch, Register devcom device with switch id key net/mlx5: Devcom, Infrastructure changes net/mlx5: Use shared code for checking lag is supported ==================== Link: https://lore.kernel.org/r/20230727183914.69229-1-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
@@ -162,18 +162,18 @@ static int cmd_alloc_index(struct mlx5_cmd *cmd)
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int ret;
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spin_lock_irqsave(&cmd->alloc_lock, flags);
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ret = find_first_bit(&cmd->bitmask, cmd->max_reg_cmds);
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if (ret < cmd->max_reg_cmds)
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clear_bit(ret, &cmd->bitmask);
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ret = find_first_bit(&cmd->vars.bitmask, cmd->vars.max_reg_cmds);
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if (ret < cmd->vars.max_reg_cmds)
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clear_bit(ret, &cmd->vars.bitmask);
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spin_unlock_irqrestore(&cmd->alloc_lock, flags);
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return ret < cmd->max_reg_cmds ? ret : -ENOMEM;
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return ret < cmd->vars.max_reg_cmds ? ret : -ENOMEM;
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}
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static void cmd_free_index(struct mlx5_cmd *cmd, int idx)
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{
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lockdep_assert_held(&cmd->alloc_lock);
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set_bit(idx, &cmd->bitmask);
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set_bit(idx, &cmd->vars.bitmask);
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}
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static void cmd_ent_get(struct mlx5_cmd_work_ent *ent)
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@@ -192,7 +192,7 @@ static void cmd_ent_put(struct mlx5_cmd_work_ent *ent)
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if (ent->idx >= 0) {
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cmd_free_index(cmd, ent->idx);
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up(ent->page_queue ? &cmd->pages_sem : &cmd->sem);
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up(ent->page_queue ? &cmd->vars.pages_sem : &cmd->vars.sem);
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}
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cmd_free_ent(ent);
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@@ -202,7 +202,7 @@ static void cmd_ent_put(struct mlx5_cmd_work_ent *ent)
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static struct mlx5_cmd_layout *get_inst(struct mlx5_cmd *cmd, int idx)
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{
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return cmd->cmd_buf + (idx << cmd->log_stride);
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return cmd->cmd_buf + (idx << cmd->vars.log_stride);
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}
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static int mlx5_calc_cmd_blocks(struct mlx5_cmd_msg *msg)
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@@ -974,7 +974,7 @@ static void cmd_work_handler(struct work_struct *work)
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cb_timeout = msecs_to_jiffies(mlx5_tout_ms(dev, CMD));
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complete(&ent->handling);
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sem = ent->page_queue ? &cmd->pages_sem : &cmd->sem;
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sem = ent->page_queue ? &cmd->vars.pages_sem : &cmd->vars.sem;
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down(sem);
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if (!ent->page_queue) {
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alloc_ret = cmd_alloc_index(cmd);
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@@ -994,9 +994,9 @@ static void cmd_work_handler(struct work_struct *work)
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}
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ent->idx = alloc_ret;
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} else {
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ent->idx = cmd->max_reg_cmds;
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ent->idx = cmd->vars.max_reg_cmds;
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spin_lock_irqsave(&cmd->alloc_lock, flags);
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clear_bit(ent->idx, &cmd->bitmask);
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clear_bit(ent->idx, &cmd->vars.bitmask);
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spin_unlock_irqrestore(&cmd->alloc_lock, flags);
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}
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@@ -1225,8 +1225,8 @@ static int mlx5_cmd_invoke(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *in,
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goto out_free;
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ds = ent->ts2 - ent->ts1;
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if (ent->op < MLX5_CMD_OP_MAX) {
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stats = &cmd->stats[ent->op];
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stats = xa_load(&cmd->stats, ent->op);
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if (stats) {
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spin_lock_irq(&stats->lock);
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stats->sum += ds;
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++stats->n;
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@@ -1548,7 +1548,6 @@ static void clean_debug_files(struct mlx5_core_dev *dev)
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if (!mlx5_debugfs_root)
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return;
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mlx5_cmdif_debugfs_cleanup(dev);
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debugfs_remove_recursive(dbg->dbg_root);
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}
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@@ -1563,8 +1562,6 @@ static void create_debugfs_files(struct mlx5_core_dev *dev)
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debugfs_create_file("out_len", 0600, dbg->dbg_root, dev, &olfops);
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debugfs_create_u8("status", 0600, dbg->dbg_root, &dbg->status);
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debugfs_create_file("run", 0200, dbg->dbg_root, dev, &fops);
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mlx5_cmdif_debugfs_init(dev);
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}
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void mlx5_cmd_allowed_opcode(struct mlx5_core_dev *dev, u16 opcode)
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@@ -1572,15 +1569,15 @@ void mlx5_cmd_allowed_opcode(struct mlx5_core_dev *dev, u16 opcode)
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struct mlx5_cmd *cmd = &dev->cmd;
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int i;
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for (i = 0; i < cmd->max_reg_cmds; i++)
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down(&cmd->sem);
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down(&cmd->pages_sem);
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for (i = 0; i < cmd->vars.max_reg_cmds; i++)
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down(&cmd->vars.sem);
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down(&cmd->vars.pages_sem);
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cmd->allowed_opcode = opcode;
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up(&cmd->pages_sem);
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for (i = 0; i < cmd->max_reg_cmds; i++)
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up(&cmd->sem);
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up(&cmd->vars.pages_sem);
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for (i = 0; i < cmd->vars.max_reg_cmds; i++)
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up(&cmd->vars.sem);
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}
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static void mlx5_cmd_change_mod(struct mlx5_core_dev *dev, int mode)
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@@ -1588,15 +1585,15 @@ static void mlx5_cmd_change_mod(struct mlx5_core_dev *dev, int mode)
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struct mlx5_cmd *cmd = &dev->cmd;
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int i;
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for (i = 0; i < cmd->max_reg_cmds; i++)
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down(&cmd->sem);
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down(&cmd->pages_sem);
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for (i = 0; i < cmd->vars.max_reg_cmds; i++)
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down(&cmd->vars.sem);
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down(&cmd->vars.pages_sem);
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cmd->mode = mode;
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up(&cmd->pages_sem);
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for (i = 0; i < cmd->max_reg_cmds; i++)
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up(&cmd->sem);
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up(&cmd->vars.pages_sem);
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for (i = 0; i < cmd->vars.max_reg_cmds; i++)
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up(&cmd->vars.sem);
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}
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static int cmd_comp_notifier(struct notifier_block *nb,
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@@ -1655,7 +1652,7 @@ static void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec, bool force
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/* there can be at most 32 command queues */
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vector = vec & 0xffffffff;
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for (i = 0; i < (1 << cmd->log_sz); i++) {
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for (i = 0; i < (1 << cmd->vars.log_sz); i++) {
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if (test_bit(i, &vector)) {
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ent = cmd->ent_arr[i];
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@@ -1698,8 +1695,8 @@ static void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec, bool force
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if (ent->callback) {
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ds = ent->ts2 - ent->ts1;
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if (ent->op < MLX5_CMD_OP_MAX) {
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stats = &cmd->stats[ent->op];
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stats = xa_load(&cmd->stats, ent->op);
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if (stats) {
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spin_lock_irqsave(&stats->lock, flags);
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stats->sum += ds;
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++stats->n;
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@@ -1744,7 +1741,7 @@ static void mlx5_cmd_trigger_completions(struct mlx5_core_dev *dev)
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/* wait for pending handlers to complete */
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mlx5_eq_synchronize_cmd_irq(dev);
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spin_lock_irqsave(&dev->cmd.alloc_lock, flags);
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vector = ~dev->cmd.bitmask & ((1ul << (1 << dev->cmd.log_sz)) - 1);
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vector = ~dev->cmd.vars.bitmask & ((1ul << (1 << dev->cmd.vars.log_sz)) - 1);
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if (!vector)
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goto no_trig;
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@@ -1753,14 +1750,14 @@ static void mlx5_cmd_trigger_completions(struct mlx5_core_dev *dev)
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* to guarantee pending commands will not get freed in the meanwhile.
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* For that reason, it also has to be done inside the alloc_lock.
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*/
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for_each_set_bit(i, &bitmask, (1 << cmd->log_sz))
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for_each_set_bit(i, &bitmask, (1 << cmd->vars.log_sz))
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cmd_ent_get(cmd->ent_arr[i]);
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vector |= MLX5_TRIGGERED_CMD_COMP;
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spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags);
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mlx5_core_dbg(dev, "vector 0x%llx\n", vector);
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mlx5_cmd_comp_handler(dev, vector, true);
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for_each_set_bit(i, &bitmask, (1 << cmd->log_sz))
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for_each_set_bit(i, &bitmask, (1 << cmd->vars.log_sz))
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cmd_ent_put(cmd->ent_arr[i]);
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return;
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@@ -1773,22 +1770,22 @@ void mlx5_cmd_flush(struct mlx5_core_dev *dev)
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struct mlx5_cmd *cmd = &dev->cmd;
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int i;
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for (i = 0; i < cmd->max_reg_cmds; i++) {
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while (down_trylock(&cmd->sem)) {
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for (i = 0; i < cmd->vars.max_reg_cmds; i++) {
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while (down_trylock(&cmd->vars.sem)) {
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mlx5_cmd_trigger_completions(dev);
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cond_resched();
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}
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}
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while (down_trylock(&cmd->pages_sem)) {
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while (down_trylock(&cmd->vars.pages_sem)) {
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mlx5_cmd_trigger_completions(dev);
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cond_resched();
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}
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/* Unlock cmdif */
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up(&cmd->pages_sem);
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for (i = 0; i < cmd->max_reg_cmds; i++)
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up(&cmd->sem);
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up(&cmd->vars.pages_sem);
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for (i = 0; i < cmd->vars.max_reg_cmds; i++)
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up(&cmd->vars.sem);
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}
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static struct mlx5_cmd_msg *alloc_msg(struct mlx5_core_dev *dev, int in_size,
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@@ -1858,7 +1855,7 @@ static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
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/* atomic context may not sleep */
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if (callback)
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return -EINVAL;
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down(&dev->cmd.throttle_sem);
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down(&dev->cmd.vars.throttle_sem);
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}
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pages_queue = is_manage_pages(in);
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@@ -1903,7 +1900,7 @@ static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
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free_msg(dev, inb);
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out_up:
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if (throttle_op)
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up(&dev->cmd.throttle_sem);
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up(&dev->cmd.vars.throttle_sem);
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return err;
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}
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@@ -1926,7 +1923,9 @@ static void cmd_status_log(struct mlx5_core_dev *dev, u16 opcode, u8 status,
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if (!err || !(strcmp(namep, "unknown command opcode")))
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return;
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stats = &dev->cmd.stats[opcode];
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stats = xa_load(&dev->cmd.stats, opcode);
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if (!stats)
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return;
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spin_lock_irq(&stats->lock);
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stats->failed++;
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if (err < 0)
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@@ -2190,19 +2189,8 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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int size = sizeof(struct mlx5_cmd_prot_block);
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int align = roundup_pow_of_two(size);
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struct mlx5_cmd *cmd = &dev->cmd;
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u32 cmd_h, cmd_l;
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u16 cmd_if_rev;
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u32 cmd_l;
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int err;
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int i;
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memset(cmd, 0, sizeof(*cmd));
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cmd_if_rev = cmdif_rev(dev);
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if (cmd_if_rev != CMD_IF_REV) {
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mlx5_core_err(dev,
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"Driver cmdif rev(%d) differs from firmware's(%d)\n",
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CMD_IF_REV, cmd_if_rev);
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return -EINVAL;
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}
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cmd->pool = dma_pool_create("mlx5_cmd", mlx5_core_dma_dev(dev), size, align, 0);
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if (!cmd->pool)
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@@ -2212,51 +2200,91 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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if (err)
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goto err_free_pool;
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cmd_l = ioread32be(&dev->iseg->cmdq_addr_l_sz) & 0xff;
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cmd->log_sz = cmd_l >> 4 & 0xf;
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cmd->log_stride = cmd_l & 0xf;
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if (1 << cmd->log_sz > MLX5_MAX_COMMANDS) {
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mlx5_core_err(dev, "firmware reports too many outstanding commands %d\n",
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1 << cmd->log_sz);
|
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err = -EINVAL;
|
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goto err_free_page;
|
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}
|
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|
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if (cmd->log_sz + cmd->log_stride > MLX5_ADAPTER_PAGE_SHIFT) {
|
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mlx5_core_err(dev, "command queue size overflow\n");
|
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err = -EINVAL;
|
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goto err_free_page;
|
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}
|
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|
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cmd->state = MLX5_CMDIF_STATE_DOWN;
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cmd->checksum_disabled = 1;
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cmd->max_reg_cmds = (1 << cmd->log_sz) - 1;
|
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cmd->bitmask = (1UL << cmd->max_reg_cmds) - 1;
|
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|
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cmd->cmdif_rev = ioread32be(&dev->iseg->cmdif_rev_fw_sub) >> 16;
|
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if (cmd->cmdif_rev > CMD_IF_REV) {
|
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mlx5_core_err(dev, "driver does not support command interface version. driver %d, firmware %d\n",
|
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CMD_IF_REV, cmd->cmdif_rev);
|
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err = -EOPNOTSUPP;
|
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goto err_free_page;
|
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}
|
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|
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spin_lock_init(&cmd->alloc_lock);
|
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spin_lock_init(&cmd->token_lock);
|
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for (i = 0; i < MLX5_CMD_OP_MAX; i++)
|
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spin_lock_init(&cmd->stats[i].lock);
|
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|
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sema_init(&cmd->sem, cmd->max_reg_cmds);
|
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sema_init(&cmd->pages_sem, 1);
|
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sema_init(&cmd->throttle_sem, DIV_ROUND_UP(cmd->max_reg_cmds, 2));
|
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|
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cmd_h = (u32)((u64)(cmd->dma) >> 32);
|
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cmd_l = (u32)(cmd->dma);
|
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if (cmd_l & 0xfff) {
|
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mlx5_core_err(dev, "invalid command queue address\n");
|
||||
err = -ENOMEM;
|
||||
goto err_free_page;
|
||||
goto err_cmd_page;
|
||||
}
|
||||
cmd->checksum_disabled = 1;
|
||||
|
||||
spin_lock_init(&cmd->alloc_lock);
|
||||
spin_lock_init(&cmd->token_lock);
|
||||
|
||||
create_msg_cache(dev);
|
||||
|
||||
set_wqname(dev);
|
||||
cmd->wq = create_singlethread_workqueue(cmd->wq_name);
|
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if (!cmd->wq) {
|
||||
mlx5_core_err(dev, "failed to create command workqueue\n");
|
||||
err = -ENOMEM;
|
||||
goto err_cache;
|
||||
}
|
||||
|
||||
mlx5_cmdif_debugfs_init(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
err_cache:
|
||||
destroy_msg_cache(dev);
|
||||
err_cmd_page:
|
||||
free_cmd_page(dev, cmd);
|
||||
err_free_pool:
|
||||
dma_pool_destroy(cmd->pool);
|
||||
return err;
|
||||
}
|
||||
|
||||
void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
|
||||
{
|
||||
struct mlx5_cmd *cmd = &dev->cmd;
|
||||
|
||||
mlx5_cmdif_debugfs_cleanup(dev);
|
||||
destroy_workqueue(cmd->wq);
|
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destroy_msg_cache(dev);
|
||||
free_cmd_page(dev, cmd);
|
||||
dma_pool_destroy(cmd->pool);
|
||||
}
|
||||
|
||||
int mlx5_cmd_enable(struct mlx5_core_dev *dev)
|
||||
{
|
||||
struct mlx5_cmd *cmd = &dev->cmd;
|
||||
u32 cmd_h, cmd_l;
|
||||
|
||||
memset(&cmd->vars, 0, sizeof(cmd->vars));
|
||||
cmd->vars.cmdif_rev = cmdif_rev(dev);
|
||||
if (cmd->vars.cmdif_rev != CMD_IF_REV) {
|
||||
mlx5_core_err(dev,
|
||||
"Driver cmdif rev(%d) differs from firmware's(%d)\n",
|
||||
CMD_IF_REV, cmd->vars.cmdif_rev);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
cmd_l = ioread32be(&dev->iseg->cmdq_addr_l_sz) & 0xff;
|
||||
cmd->vars.log_sz = cmd_l >> 4 & 0xf;
|
||||
cmd->vars.log_stride = cmd_l & 0xf;
|
||||
if (1 << cmd->vars.log_sz > MLX5_MAX_COMMANDS) {
|
||||
mlx5_core_err(dev, "firmware reports too many outstanding commands %d\n",
|
||||
1 << cmd->vars.log_sz);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (cmd->vars.log_sz + cmd->vars.log_stride > MLX5_ADAPTER_PAGE_SHIFT) {
|
||||
mlx5_core_err(dev, "command queue size overflow\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
cmd->state = MLX5_CMDIF_STATE_DOWN;
|
||||
cmd->vars.max_reg_cmds = (1 << cmd->vars.log_sz) - 1;
|
||||
cmd->vars.bitmask = (1UL << cmd->vars.max_reg_cmds) - 1;
|
||||
|
||||
sema_init(&cmd->vars.sem, cmd->vars.max_reg_cmds);
|
||||
sema_init(&cmd->vars.pages_sem, 1);
|
||||
sema_init(&cmd->vars.throttle_sem, DIV_ROUND_UP(cmd->vars.max_reg_cmds, 2));
|
||||
|
||||
cmd_h = (u32)((u64)(cmd->dma) >> 32);
|
||||
cmd_l = (u32)(cmd->dma);
|
||||
if (WARN_ON(cmd_l & 0xfff))
|
||||
return -EINVAL;
|
||||
|
||||
iowrite32be(cmd_h, &dev->iseg->cmdq_addr_h);
|
||||
iowrite32be(cmd_l, &dev->iseg->cmdq_addr_l_sz);
|
||||
@@ -2269,40 +2297,17 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
|
||||
cmd->mode = CMD_MODE_POLLING;
|
||||
cmd->allowed_opcode = CMD_ALLOWED_OPCODE_ALL;
|
||||
|
||||
create_msg_cache(dev);
|
||||
|
||||
set_wqname(dev);
|
||||
cmd->wq = create_singlethread_workqueue(cmd->wq_name);
|
||||
if (!cmd->wq) {
|
||||
mlx5_core_err(dev, "failed to create command workqueue\n");
|
||||
err = -ENOMEM;
|
||||
goto err_cache;
|
||||
}
|
||||
|
||||
create_debugfs_files(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
err_cache:
|
||||
destroy_msg_cache(dev);
|
||||
|
||||
err_free_page:
|
||||
free_cmd_page(dev, cmd);
|
||||
|
||||
err_free_pool:
|
||||
dma_pool_destroy(cmd->pool);
|
||||
return err;
|
||||
}
|
||||
|
||||
void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
|
||||
void mlx5_cmd_disable(struct mlx5_core_dev *dev)
|
||||
{
|
||||
struct mlx5_cmd *cmd = &dev->cmd;
|
||||
|
||||
clean_debug_files(dev);
|
||||
destroy_workqueue(cmd->wq);
|
||||
destroy_msg_cache(dev);
|
||||
free_cmd_page(dev, cmd);
|
||||
dma_pool_destroy(cmd->pool);
|
||||
flush_workqueue(cmd->wq);
|
||||
}
|
||||
|
||||
void mlx5_cmd_set_state(struct mlx5_core_dev *dev,
|
||||
|
||||
@@ -176,8 +176,8 @@ static ssize_t slots_read(struct file *filp, char __user *buf, size_t count,
|
||||
int ret;
|
||||
|
||||
cmd = filp->private_data;
|
||||
weight = bitmap_weight(&cmd->bitmask, cmd->max_reg_cmds);
|
||||
field = cmd->max_reg_cmds - weight;
|
||||
weight = bitmap_weight(&cmd->vars.bitmask, cmd->vars.max_reg_cmds);
|
||||
field = cmd->vars.max_reg_cmds - weight;
|
||||
ret = snprintf(tbuf, sizeof(tbuf), "%d\n", field);
|
||||
return simple_read_from_buffer(buf, count, pos, tbuf, ret);
|
||||
}
|
||||
@@ -188,6 +188,24 @@ static const struct file_operations slots_fops = {
|
||||
.read = slots_read,
|
||||
};
|
||||
|
||||
static struct mlx5_cmd_stats *
|
||||
mlx5_cmdif_alloc_stats(struct xarray *stats_xa, int opcode)
|
||||
{
|
||||
struct mlx5_cmd_stats *stats = kzalloc(sizeof(*stats), GFP_KERNEL);
|
||||
int err;
|
||||
|
||||
if (!stats)
|
||||
return NULL;
|
||||
|
||||
err = xa_insert(stats_xa, opcode, stats, GFP_KERNEL);
|
||||
if (err) {
|
||||
kfree(stats);
|
||||
return NULL;
|
||||
}
|
||||
spin_lock_init(&stats->lock);
|
||||
return stats;
|
||||
}
|
||||
|
||||
void mlx5_cmdif_debugfs_init(struct mlx5_core_dev *dev)
|
||||
{
|
||||
struct mlx5_cmd_stats *stats;
|
||||
@@ -200,10 +218,14 @@ void mlx5_cmdif_debugfs_init(struct mlx5_core_dev *dev)
|
||||
|
||||
debugfs_create_file("slots_inuse", 0400, *cmd, &dev->cmd, &slots_fops);
|
||||
|
||||
xa_init(&dev->cmd.stats);
|
||||
|
||||
for (i = 0; i < MLX5_CMD_OP_MAX; i++) {
|
||||
stats = &dev->cmd.stats[i];
|
||||
namep = mlx5_command_str(i);
|
||||
if (strcmp(namep, "unknown command opcode")) {
|
||||
stats = mlx5_cmdif_alloc_stats(&dev->cmd.stats, i);
|
||||
if (!stats)
|
||||
continue;
|
||||
stats->root = debugfs_create_dir(namep, *cmd);
|
||||
|
||||
debugfs_create_file("average", 0400, stats->root, stats,
|
||||
@@ -224,7 +246,13 @@ void mlx5_cmdif_debugfs_init(struct mlx5_core_dev *dev)
|
||||
|
||||
void mlx5_cmdif_debugfs_cleanup(struct mlx5_core_dev *dev)
|
||||
{
|
||||
struct mlx5_cmd_stats *stats;
|
||||
unsigned long i;
|
||||
|
||||
debugfs_remove_recursive(dev->priv.dbg.cmdif_debugfs);
|
||||
xa_for_each(&dev->cmd.stats, i, stats)
|
||||
kfree(stats);
|
||||
xa_destroy(&dev->cmd.stats);
|
||||
}
|
||||
|
||||
void mlx5_cq_debugfs_init(struct mlx5_core_dev *dev)
|
||||
|
||||
@@ -36,6 +36,7 @@
|
||||
#include <linux/mlx5/vport.h>
|
||||
#include "mlx5_core.h"
|
||||
#include "devlink.h"
|
||||
#include "lag/lag.h"
|
||||
|
||||
/* intf dev list mutex */
|
||||
static DEFINE_MUTEX(mlx5_intf_mutex);
|
||||
@@ -587,10 +588,7 @@ static int next_phys_dev_lag(struct device *dev, const void *data)
|
||||
if (!mdev)
|
||||
return 0;
|
||||
|
||||
if (!MLX5_CAP_GEN(mdev, vport_group_manager) ||
|
||||
!MLX5_CAP_GEN(mdev, lag_master) ||
|
||||
(MLX5_CAP_GEN(mdev, num_lag_ports) > MLX5_MAX_PORTS ||
|
||||
MLX5_CAP_GEN(mdev, num_lag_ports) <= 1))
|
||||
if (!mlx5_lag_is_supported(mdev))
|
||||
return 0;
|
||||
|
||||
return _next_phys_dev(mdev, data);
|
||||
|
||||
@@ -1167,9 +1167,6 @@ int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
|
||||
int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, u8 *hfunc);
|
||||
int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir, const u8 *key,
|
||||
const u8 hfunc);
|
||||
int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
|
||||
u32 *rule_locs);
|
||||
int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd);
|
||||
u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv);
|
||||
u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv);
|
||||
int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
|
||||
|
||||
@@ -2163,8 +2163,8 @@ static u32 mlx5e_get_priv_flags(struct net_device *netdev)
|
||||
return priv->channels.params.pflags;
|
||||
}
|
||||
|
||||
int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
|
||||
u32 *rule_locs)
|
||||
static int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
|
||||
u32 *rule_locs)
|
||||
{
|
||||
struct mlx5e_priv *priv = netdev_priv(dev);
|
||||
|
||||
@@ -2181,7 +2181,7 @@ int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
|
||||
return mlx5e_ethtool_get_rxnfc(priv, info, rule_locs);
|
||||
}
|
||||
|
||||
int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
|
||||
static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
|
||||
{
|
||||
struct mlx5e_priv *priv = netdev_priv(dev);
|
||||
|
||||
|
||||
@@ -96,10 +96,6 @@ static struct mlx5e_ethtool_table *get_flow_table(struct mlx5e_priv *priv,
|
||||
case UDP_V4_FLOW:
|
||||
case TCP_V6_FLOW:
|
||||
case UDP_V6_FLOW:
|
||||
max_tuples = ETHTOOL_NUM_L3_L4_FTS;
|
||||
prio = MLX5E_ETHTOOL_L3_L4_PRIO + (max_tuples - num_tuples);
|
||||
eth_ft = ðtool->l3_l4_ft[prio];
|
||||
break;
|
||||
case IP_USER_FLOW:
|
||||
case IPV6_USER_FLOW:
|
||||
max_tuples = ETHTOOL_NUM_L3_L4_FTS;
|
||||
|
||||
@@ -399,15 +399,13 @@ static void mlx5e_sqs2vport_stop(struct mlx5_eswitch *esw,
|
||||
}
|
||||
|
||||
static int mlx5e_sqs2vport_add_peers_rules(struct mlx5_eswitch *esw, struct mlx5_eswitch_rep *rep,
|
||||
struct mlx5_devcom *devcom,
|
||||
struct mlx5e_rep_sq *rep_sq, int i)
|
||||
{
|
||||
struct mlx5_eswitch *peer_esw = NULL;
|
||||
struct mlx5_flow_handle *flow_rule;
|
||||
int tmp;
|
||||
struct mlx5_devcom_comp_dev *tmp;
|
||||
struct mlx5_eswitch *peer_esw;
|
||||
|
||||
mlx5_devcom_for_each_peer_entry(devcom, MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
peer_esw, tmp) {
|
||||
mlx5_devcom_for_each_peer_entry(esw->devcom, peer_esw, tmp) {
|
||||
u16 peer_rule_idx = MLX5_CAP_GEN(peer_esw->dev, vhca_id);
|
||||
struct mlx5e_rep_sq_peer *sq_peer;
|
||||
int err;
|
||||
@@ -443,7 +441,6 @@ static int mlx5e_sqs2vport_start(struct mlx5_eswitch *esw,
|
||||
struct mlx5_flow_handle *flow_rule;
|
||||
struct mlx5e_rep_priv *rpriv;
|
||||
struct mlx5e_rep_sq *rep_sq;
|
||||
struct mlx5_devcom *devcom;
|
||||
bool devcom_locked = false;
|
||||
int err;
|
||||
int i;
|
||||
@@ -451,10 +448,10 @@ static int mlx5e_sqs2vport_start(struct mlx5_eswitch *esw,
|
||||
if (esw->mode != MLX5_ESWITCH_OFFLOADS)
|
||||
return 0;
|
||||
|
||||
devcom = esw->dev->priv.devcom;
|
||||
rpriv = mlx5e_rep_to_rep_priv(rep);
|
||||
if (mlx5_devcom_comp_is_ready(devcom, MLX5_DEVCOM_ESW_OFFLOADS) &&
|
||||
mlx5_devcom_for_each_peer_begin(devcom, MLX5_DEVCOM_ESW_OFFLOADS))
|
||||
|
||||
if (mlx5_devcom_comp_is_ready(esw->devcom) &&
|
||||
mlx5_devcom_for_each_peer_begin(esw->devcom))
|
||||
devcom_locked = true;
|
||||
|
||||
for (i = 0; i < sqns_num; i++) {
|
||||
@@ -477,7 +474,7 @@ static int mlx5e_sqs2vport_start(struct mlx5_eswitch *esw,
|
||||
|
||||
xa_init(&rep_sq->sq_peer);
|
||||
if (devcom_locked) {
|
||||
err = mlx5e_sqs2vport_add_peers_rules(esw, rep, devcom, rep_sq, i);
|
||||
err = mlx5e_sqs2vport_add_peers_rules(esw, rep, rep_sq, i);
|
||||
if (err) {
|
||||
mlx5_eswitch_del_send_to_vport_rule(rep_sq->send_to_vport_rule);
|
||||
xa_destroy(&rep_sq->sq_peer);
|
||||
@@ -490,7 +487,7 @@ static int mlx5e_sqs2vport_start(struct mlx5_eswitch *esw,
|
||||
}
|
||||
|
||||
if (devcom_locked)
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
mlx5_devcom_for_each_peer_end(esw->devcom);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -498,7 +495,7 @@ static int mlx5e_sqs2vport_start(struct mlx5_eswitch *esw,
|
||||
mlx5e_sqs2vport_stop(esw, rep);
|
||||
|
||||
if (devcom_locked)
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
mlx5_devcom_for_each_peer_end(esw->devcom);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
@@ -1668,11 +1668,10 @@ int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *ro
|
||||
{
|
||||
struct mlx5e_priv *out_priv, *route_priv;
|
||||
struct mlx5_core_dev *route_mdev;
|
||||
struct mlx5_devcom *devcom;
|
||||
struct mlx5_devcom_comp_dev *pos;
|
||||
struct mlx5_eswitch *esw;
|
||||
u16 vhca_id;
|
||||
int err;
|
||||
int i;
|
||||
|
||||
out_priv = netdev_priv(out_dev);
|
||||
esw = out_priv->mdev->priv.eswitch;
|
||||
@@ -1688,10 +1687,8 @@ int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *ro
|
||||
return err;
|
||||
|
||||
rcu_read_lock();
|
||||
devcom = out_priv->mdev->priv.devcom;
|
||||
err = -ENODEV;
|
||||
mlx5_devcom_for_each_peer_entry_rcu(devcom, MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
esw, i) {
|
||||
mlx5_devcom_for_each_peer_entry_rcu(esw->devcom, esw, pos) {
|
||||
err = mlx5_eswitch_vhca_id_to_vport(esw, vhca_id, vport);
|
||||
if (!err)
|
||||
break;
|
||||
@@ -2031,15 +2028,15 @@ static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
|
||||
struct mlx5e_tc_flow *flow)
|
||||
{
|
||||
if (mlx5e_is_eswitch_flow(flow)) {
|
||||
struct mlx5_devcom *devcom = flow->priv->mdev->priv.devcom;
|
||||
struct mlx5_devcom_comp_dev *devcom = flow->priv->mdev->priv.eswitch->devcom;
|
||||
|
||||
if (!mlx5_devcom_for_each_peer_begin(devcom, MLX5_DEVCOM_ESW_OFFLOADS)) {
|
||||
if (!mlx5_devcom_for_each_peer_begin(devcom)) {
|
||||
mlx5e_tc_del_fdb_flow(priv, flow);
|
||||
return;
|
||||
}
|
||||
|
||||
mlx5e_tc_del_fdb_peers_flow(flow);
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
mlx5_devcom_for_each_peer_end(devcom);
|
||||
mlx5e_tc_del_fdb_flow(priv, flow);
|
||||
} else {
|
||||
mlx5e_tc_del_nic_flow(priv, flow);
|
||||
@@ -4216,8 +4213,7 @@ static bool is_peer_flow_needed(struct mlx5e_tc_flow *flow)
|
||||
flow_flag_test(flow, INGRESS);
|
||||
bool act_is_encap = !!(attr->action &
|
||||
MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT);
|
||||
bool esw_paired = mlx5_devcom_comp_is_ready(esw_attr->in_mdev->priv.devcom,
|
||||
MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
bool esw_paired = mlx5_devcom_comp_is_ready(esw_attr->in_mdev->priv.eswitch->devcom);
|
||||
|
||||
if (!esw_paired)
|
||||
return false;
|
||||
@@ -4471,14 +4467,13 @@ mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
|
||||
struct net_device *filter_dev,
|
||||
struct mlx5e_tc_flow **__flow)
|
||||
{
|
||||
struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
|
||||
struct mlx5_devcom_comp_dev *devcom = priv->mdev->priv.eswitch->devcom, *pos;
|
||||
struct mlx5e_rep_priv *rpriv = priv->ppriv;
|
||||
struct mlx5_eswitch_rep *in_rep = rpriv->rep;
|
||||
struct mlx5_core_dev *in_mdev = priv->mdev;
|
||||
struct mlx5_eswitch *peer_esw;
|
||||
struct mlx5e_tc_flow *flow;
|
||||
int err;
|
||||
int i;
|
||||
|
||||
flow = __mlx5e_add_fdb_flow(priv, f, flow_flags, filter_dev, in_rep,
|
||||
in_mdev);
|
||||
@@ -4490,27 +4485,25 @@ mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (!mlx5_devcom_for_each_peer_begin(devcom, MLX5_DEVCOM_ESW_OFFLOADS)) {
|
||||
if (!mlx5_devcom_for_each_peer_begin(devcom)) {
|
||||
err = -ENODEV;
|
||||
goto clean_flow;
|
||||
}
|
||||
|
||||
mlx5_devcom_for_each_peer_entry(devcom,
|
||||
MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
peer_esw, i) {
|
||||
mlx5_devcom_for_each_peer_entry(devcom, peer_esw, pos) {
|
||||
err = mlx5e_tc_add_fdb_peer_flow(f, flow, flow_flags, peer_esw);
|
||||
if (err)
|
||||
goto peer_clean;
|
||||
}
|
||||
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
mlx5_devcom_for_each_peer_end(devcom);
|
||||
|
||||
*__flow = flow;
|
||||
return 0;
|
||||
|
||||
peer_clean:
|
||||
mlx5e_tc_del_fdb_peers_flow(flow);
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
mlx5_devcom_for_each_peer_end(devcom);
|
||||
clean_flow:
|
||||
mlx5e_tc_del_fdb_flow(priv, flow);
|
||||
return err;
|
||||
@@ -4728,7 +4721,7 @@ int mlx5e_tc_fill_action_stats(struct mlx5e_priv *priv,
|
||||
int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
|
||||
struct flow_cls_offload *f, unsigned long flags)
|
||||
{
|
||||
struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
|
||||
struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
|
||||
struct rhashtable *tc_ht = get_tc_ht(priv, flags);
|
||||
struct mlx5e_tc_flow *flow;
|
||||
struct mlx5_fc *counter;
|
||||
@@ -4764,7 +4757,7 @@ int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
|
||||
/* Under multipath it's possible for one rule to be currently
|
||||
* un-offloaded while the other rule is offloaded.
|
||||
*/
|
||||
if (!mlx5_devcom_for_each_peer_begin(devcom, MLX5_DEVCOM_ESW_OFFLOADS))
|
||||
if (esw && !mlx5_devcom_for_each_peer_begin(esw->devcom))
|
||||
goto out;
|
||||
|
||||
if (flow_flag_test(flow, DUP)) {
|
||||
@@ -4795,7 +4788,8 @@ int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
|
||||
}
|
||||
|
||||
no_peer_counter:
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
if (esw)
|
||||
mlx5_devcom_for_each_peer_end(esw->devcom);
|
||||
out:
|
||||
flow_stats_update(&f->stats, bytes, packets, 0, lastuse,
|
||||
FLOW_ACTION_HW_STATS_DELAYED);
|
||||
@@ -5200,11 +5194,12 @@ void mlx5e_tc_ht_cleanup(struct rhashtable *tc_ht)
|
||||
int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv)
|
||||
{
|
||||
const size_t sz_enc_opts = sizeof(struct tunnel_match_enc_opts);
|
||||
struct netdev_phys_item_id ppid;
|
||||
struct mlx5e_rep_priv *rpriv;
|
||||
struct mapping_ctx *mapping;
|
||||
struct mlx5_eswitch *esw;
|
||||
struct mlx5e_priv *priv;
|
||||
u64 mapping_id;
|
||||
u64 mapping_id, key;
|
||||
int err = 0;
|
||||
|
||||
rpriv = container_of(uplink_priv, struct mlx5e_rep_priv, uplink_priv);
|
||||
@@ -5258,7 +5253,11 @@ int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv)
|
||||
goto err_action_counter;
|
||||
}
|
||||
|
||||
mlx5_esw_offloads_devcom_init(esw);
|
||||
err = dev_get_port_parent_id(priv->netdev, &ppid, false);
|
||||
if (!err) {
|
||||
memcpy(&key, &ppid.id, sizeof(key));
|
||||
mlx5_esw_offloads_devcom_init(esw, key);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
|
||||
@@ -652,30 +652,30 @@ mlx5_esw_bridge_ingress_flow_peer_create(u16 vport_num, u16 esw_owner_vhca_id,
|
||||
struct mlx5_esw_bridge_vlan *vlan, u32 counter_id,
|
||||
struct mlx5_esw_bridge *bridge)
|
||||
{
|
||||
struct mlx5_devcom *devcom = bridge->br_offloads->esw->dev->priv.devcom;
|
||||
struct mlx5_devcom_comp_dev *devcom = bridge->br_offloads->esw->devcom, *pos;
|
||||
struct mlx5_eswitch *tmp, *peer_esw = NULL;
|
||||
static struct mlx5_flow_handle *handle;
|
||||
int i;
|
||||
|
||||
if (!mlx5_devcom_for_each_peer_begin(devcom, MLX5_DEVCOM_ESW_OFFLOADS))
|
||||
if (!mlx5_devcom_for_each_peer_begin(devcom))
|
||||
return ERR_PTR(-ENODEV);
|
||||
|
||||
mlx5_devcom_for_each_peer_entry(devcom,
|
||||
MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
tmp, i) {
|
||||
mlx5_devcom_for_each_peer_entry(devcom, tmp, pos) {
|
||||
if (mlx5_esw_is_owner(tmp, vport_num, esw_owner_vhca_id)) {
|
||||
peer_esw = tmp;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!peer_esw) {
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
return ERR_PTR(-ENODEV);
|
||||
handle = ERR_PTR(-ENODEV);
|
||||
goto out;
|
||||
}
|
||||
|
||||
handle = mlx5_esw_bridge_ingress_flow_with_esw_create(vport_num, addr, vlan, counter_id,
|
||||
bridge, peer_esw);
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
|
||||
out:
|
||||
mlx5_devcom_for_each_peer_end(devcom);
|
||||
return handle;
|
||||
}
|
||||
|
||||
@@ -1391,8 +1391,8 @@ mlx5_esw_bridge_fdb_entry_init(struct net_device *dev, u16 vport_num, u16 esw_ow
|
||||
mlx5_fc_id(counter), bridge);
|
||||
if (IS_ERR(handle)) {
|
||||
err = PTR_ERR(handle);
|
||||
esw_warn(esw->dev, "Failed to create ingress flow(vport=%u,err=%d)\n",
|
||||
vport_num, err);
|
||||
esw_warn(esw->dev, "Failed to create ingress flow(vport=%u,err=%d,peer=%d)\n",
|
||||
vport_num, err, peer);
|
||||
goto err_ingress_flow_create;
|
||||
}
|
||||
entry->ingress_handle = handle;
|
||||
|
||||
@@ -539,30 +539,29 @@ mlx5_esw_bridge_mcast_filter_flow_create(struct mlx5_esw_bridge_port *port)
|
||||
static struct mlx5_flow_handle *
|
||||
mlx5_esw_bridge_mcast_filter_flow_peer_create(struct mlx5_esw_bridge_port *port)
|
||||
{
|
||||
struct mlx5_devcom *devcom = port->bridge->br_offloads->esw->dev->priv.devcom;
|
||||
struct mlx5_devcom_comp_dev *devcom = port->bridge->br_offloads->esw->devcom, *pos;
|
||||
struct mlx5_eswitch *tmp, *peer_esw = NULL;
|
||||
static struct mlx5_flow_handle *handle;
|
||||
int i;
|
||||
|
||||
if (!mlx5_devcom_for_each_peer_begin(devcom, MLX5_DEVCOM_ESW_OFFLOADS))
|
||||
if (!mlx5_devcom_for_each_peer_begin(devcom))
|
||||
return ERR_PTR(-ENODEV);
|
||||
|
||||
mlx5_devcom_for_each_peer_entry(devcom,
|
||||
MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
tmp, i) {
|
||||
mlx5_devcom_for_each_peer_entry(devcom, tmp, pos) {
|
||||
if (mlx5_esw_is_owner(tmp, port->vport_num, port->esw_owner_vhca_id)) {
|
||||
peer_esw = tmp;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!peer_esw) {
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
return ERR_PTR(-ENODEV);
|
||||
handle = ERR_PTR(-ENODEV);
|
||||
goto out;
|
||||
}
|
||||
|
||||
handle = mlx5_esw_bridge_mcast_flow_with_esw_create(port, peer_esw);
|
||||
|
||||
mlx5_devcom_for_each_peer_end(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
out:
|
||||
mlx5_devcom_for_each_peer_end(devcom);
|
||||
return handle;
|
||||
}
|
||||
|
||||
|
||||
@@ -132,10 +132,8 @@ void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_eswitch *esw, u16 vpo
|
||||
if (IS_ERR(vport))
|
||||
return;
|
||||
|
||||
if (vport->dl_port->devlink_rate) {
|
||||
mlx5_esw_qos_vport_update_group(esw, vport, NULL, NULL);
|
||||
devl_rate_leaf_destroy(vport->dl_port);
|
||||
}
|
||||
mlx5_esw_qos_vport_update_group(esw, vport, NULL, NULL);
|
||||
devl_rate_leaf_destroy(vport->dl_port);
|
||||
|
||||
devl_port_unregister(vport->dl_port);
|
||||
mlx5_esw_dl_port_free(vport->dl_port);
|
||||
@@ -211,10 +209,8 @@ void mlx5_esw_devlink_sf_port_unregister(struct mlx5_eswitch *esw, u16 vport_num
|
||||
if (IS_ERR(vport))
|
||||
return;
|
||||
|
||||
if (vport->dl_port->devlink_rate) {
|
||||
mlx5_esw_qos_vport_update_group(esw, vport, NULL, NULL);
|
||||
devl_rate_leaf_destroy(vport->dl_port);
|
||||
}
|
||||
mlx5_esw_qos_vport_update_group(esw, vport, NULL, NULL);
|
||||
devl_rate_leaf_destroy(vport->dl_port);
|
||||
|
||||
devl_port_unregister(vport->dl_port);
|
||||
vport->dl_port = NULL;
|
||||
|
||||
@@ -1068,9 +1068,8 @@ static void mlx5_eswitch_clear_ec_vf_vports_info(struct mlx5_eswitch *esw)
|
||||
}
|
||||
}
|
||||
|
||||
/* Public E-Switch API */
|
||||
int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
|
||||
enum mlx5_eswitch_vport_event enabled_events)
|
||||
static int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
|
||||
enum mlx5_eswitch_vport_event enabled_events)
|
||||
{
|
||||
int err;
|
||||
|
||||
@@ -1078,7 +1077,7 @@ int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = esw_offloads_load_rep(esw, vport_num);
|
||||
err = mlx5_esw_offloads_load_rep(esw, vport_num);
|
||||
if (err)
|
||||
goto err_rep;
|
||||
|
||||
@@ -1089,9 +1088,9 @@ int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
|
||||
return err;
|
||||
}
|
||||
|
||||
void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
static void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
{
|
||||
esw_offloads_unload_rep(esw, vport_num);
|
||||
mlx5_esw_offloads_unload_rep(esw, vport_num);
|
||||
mlx5_esw_vport_disable(esw, vport_num);
|
||||
}
|
||||
|
||||
|
||||
@@ -354,6 +354,7 @@ struct mlx5_eswitch {
|
||||
} params;
|
||||
struct blocking_notifier_head n_head;
|
||||
struct xarray paired;
|
||||
struct mlx5_devcom_comp_dev *devcom;
|
||||
};
|
||||
|
||||
void esw_offloads_disable(struct mlx5_eswitch *esw);
|
||||
@@ -381,8 +382,9 @@ int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs);
|
||||
void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf);
|
||||
void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw);
|
||||
void mlx5_eswitch_disable(struct mlx5_eswitch *esw);
|
||||
void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw);
|
||||
void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key);
|
||||
void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw);
|
||||
bool mlx5_esw_offloads_devcom_is_ready(struct mlx5_eswitch *esw);
|
||||
int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
|
||||
u16 vport, const u8 *mac);
|
||||
int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
|
||||
@@ -725,15 +727,8 @@ void mlx5_esw_set_spec_source_port(struct mlx5_eswitch *esw,
|
||||
u16 vport,
|
||||
struct mlx5_flow_spec *spec);
|
||||
|
||||
int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num);
|
||||
void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num);
|
||||
|
||||
int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num);
|
||||
void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num);
|
||||
|
||||
int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
|
||||
enum mlx5_eswitch_vport_event enabled_events);
|
||||
void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num);
|
||||
int mlx5_esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num);
|
||||
void mlx5_esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num);
|
||||
|
||||
int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
|
||||
enum mlx5_eswitch_vport_event enabled_events);
|
||||
@@ -816,8 +811,9 @@ static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
|
||||
static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; }
|
||||
static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf) {}
|
||||
static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw) {}
|
||||
static inline void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw) {}
|
||||
static inline void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key) {}
|
||||
static inline void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw) {}
|
||||
static inline bool mlx5_esw_offloads_devcom_is_ready(struct mlx5_eswitch *esw) { return false; }
|
||||
static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
|
||||
static inline
|
||||
int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
|
||||
|
||||
@@ -2391,7 +2391,7 @@ static void __unload_reps_all_vport(struct mlx5_eswitch *esw, u8 rep_type)
|
||||
__esw_offloads_unload_rep(esw, rep, rep_type);
|
||||
}
|
||||
|
||||
int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
static int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
{
|
||||
struct mlx5_eswitch_rep *rep;
|
||||
int rep_type;
|
||||
@@ -2415,7 +2415,7 @@ int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
return err;
|
||||
}
|
||||
|
||||
void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
static void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
{
|
||||
struct mlx5_eswitch_rep *rep;
|
||||
int rep_type;
|
||||
@@ -2425,7 +2425,7 @@ void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
__esw_offloads_unload_rep(esw, rep, rep_type);
|
||||
}
|
||||
|
||||
int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
int mlx5_esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
{
|
||||
int err;
|
||||
|
||||
@@ -2449,7 +2449,7 @@ int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
return err;
|
||||
}
|
||||
|
||||
void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
void mlx5_esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num)
|
||||
{
|
||||
if (esw->mode != MLX5_ESWITCH_OFFLOADS)
|
||||
return;
|
||||
@@ -2811,7 +2811,6 @@ static int mlx5_esw_offloads_devcom_event(int event,
|
||||
void *event_data)
|
||||
{
|
||||
struct mlx5_eswitch *esw = my_data;
|
||||
struct mlx5_devcom *devcom = esw->dev->priv.devcom;
|
||||
struct mlx5_eswitch *peer_esw = event_data;
|
||||
u16 esw_i, peer_esw_i;
|
||||
bool esw_paired;
|
||||
@@ -2833,6 +2832,7 @@ static int mlx5_esw_offloads_devcom_event(int event,
|
||||
err = mlx5_esw_offloads_set_ns_peer(esw, peer_esw, true);
|
||||
if (err)
|
||||
goto err_out;
|
||||
|
||||
err = mlx5_esw_offloads_pair(esw, peer_esw);
|
||||
if (err)
|
||||
goto err_peer;
|
||||
@@ -2851,7 +2851,7 @@ static int mlx5_esw_offloads_devcom_event(int event,
|
||||
|
||||
esw->num_peers++;
|
||||
peer_esw->num_peers++;
|
||||
mlx5_devcom_comp_set_ready(devcom, MLX5_DEVCOM_ESW_OFFLOADS, true);
|
||||
mlx5_devcom_comp_set_ready(esw->devcom, true);
|
||||
break;
|
||||
|
||||
case ESW_OFFLOADS_DEVCOM_UNPAIR:
|
||||
@@ -2861,7 +2861,7 @@ static int mlx5_esw_offloads_devcom_event(int event,
|
||||
peer_esw->num_peers--;
|
||||
esw->num_peers--;
|
||||
if (!esw->num_peers && !peer_esw->num_peers)
|
||||
mlx5_devcom_comp_set_ready(devcom, MLX5_DEVCOM_ESW_OFFLOADS, false);
|
||||
mlx5_devcom_comp_set_ready(esw->devcom, false);
|
||||
xa_erase(&peer_esw->paired, esw_i);
|
||||
xa_erase(&esw->paired, peer_esw_i);
|
||||
mlx5_esw_offloads_unpair(peer_esw, esw);
|
||||
@@ -2886,9 +2886,8 @@ static int mlx5_esw_offloads_devcom_event(int event,
|
||||
return err;
|
||||
}
|
||||
|
||||
void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw)
|
||||
void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key)
|
||||
{
|
||||
struct mlx5_devcom *devcom = esw->dev->priv.devcom;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < MLX5_MAX_PORTS; i++)
|
||||
@@ -2898,38 +2897,44 @@ void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw)
|
||||
if (!MLX5_CAP_ESW(esw->dev, merged_eswitch))
|
||||
return;
|
||||
|
||||
if (!mlx5_lag_is_supported(esw->dev))
|
||||
if ((MLX5_VPORT_MANAGER(esw->dev) || mlx5_core_is_ecpf_esw_manager(esw->dev)) &&
|
||||
!mlx5_lag_is_supported(esw->dev))
|
||||
return;
|
||||
|
||||
xa_init(&esw->paired);
|
||||
mlx5_devcom_register_component(devcom,
|
||||
MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
mlx5_esw_offloads_devcom_event,
|
||||
esw);
|
||||
|
||||
esw->num_peers = 0;
|
||||
mlx5_devcom_send_event(devcom,
|
||||
MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
esw->devcom = mlx5_devcom_register_component(esw->dev->priv.devc,
|
||||
MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
key,
|
||||
mlx5_esw_offloads_devcom_event,
|
||||
esw);
|
||||
if (IS_ERR_OR_NULL(esw->devcom))
|
||||
return;
|
||||
|
||||
mlx5_devcom_send_event(esw->devcom,
|
||||
ESW_OFFLOADS_DEVCOM_PAIR,
|
||||
ESW_OFFLOADS_DEVCOM_UNPAIR, esw);
|
||||
ESW_OFFLOADS_DEVCOM_UNPAIR,
|
||||
esw);
|
||||
}
|
||||
|
||||
void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw)
|
||||
{
|
||||
struct mlx5_devcom *devcom = esw->dev->priv.devcom;
|
||||
|
||||
if (!MLX5_CAP_ESW(esw->dev, merged_eswitch))
|
||||
if (IS_ERR_OR_NULL(esw->devcom))
|
||||
return;
|
||||
|
||||
if (!mlx5_lag_is_supported(esw->dev))
|
||||
return;
|
||||
|
||||
mlx5_devcom_send_event(devcom, MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
mlx5_devcom_send_event(esw->devcom,
|
||||
ESW_OFFLOADS_DEVCOM_UNPAIR,
|
||||
ESW_OFFLOADS_DEVCOM_UNPAIR, esw);
|
||||
ESW_OFFLOADS_DEVCOM_UNPAIR,
|
||||
esw);
|
||||
|
||||
mlx5_devcom_unregister_component(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
|
||||
mlx5_devcom_unregister_component(esw->devcom);
|
||||
xa_destroy(&esw->paired);
|
||||
esw->devcom = NULL;
|
||||
}
|
||||
|
||||
bool mlx5_esw_offloads_devcom_is_ready(struct mlx5_eswitch *esw)
|
||||
{
|
||||
return mlx5_devcom_comp_is_ready(esw->devcom);
|
||||
}
|
||||
|
||||
bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw)
|
||||
@@ -3356,7 +3361,7 @@ int esw_offloads_enable(struct mlx5_eswitch *esw)
|
||||
vport->info.link_state = MLX5_VPORT_ADMIN_STATE_DOWN;
|
||||
|
||||
/* Uplink vport rep must load first. */
|
||||
err = esw_offloads_load_rep(esw, MLX5_VPORT_UPLINK);
|
||||
err = mlx5_esw_offloads_load_rep(esw, MLX5_VPORT_UPLINK);
|
||||
if (err)
|
||||
goto err_uplink;
|
||||
|
||||
@@ -3367,7 +3372,7 @@ int esw_offloads_enable(struct mlx5_eswitch *esw)
|
||||
return 0;
|
||||
|
||||
err_vports:
|
||||
esw_offloads_unload_rep(esw, MLX5_VPORT_UPLINK);
|
||||
mlx5_esw_offloads_unload_rep(esw, MLX5_VPORT_UPLINK);
|
||||
err_uplink:
|
||||
esw_offloads_steering_cleanup(esw);
|
||||
err_steering_init:
|
||||
@@ -3405,7 +3410,7 @@ static int esw_offloads_stop(struct mlx5_eswitch *esw,
|
||||
void esw_offloads_disable(struct mlx5_eswitch *esw)
|
||||
{
|
||||
mlx5_eswitch_disable_pf_vf_vports(esw);
|
||||
esw_offloads_unload_rep(esw, MLX5_VPORT_UPLINK);
|
||||
mlx5_esw_offloads_unload_rep(esw, MLX5_VPORT_UPLINK);
|
||||
esw_set_passing_vport_metadata(esw, false);
|
||||
esw_offloads_steering_cleanup(esw);
|
||||
mapping_destroy(esw->offloads.reg_c0_obj_pool);
|
||||
@@ -4120,7 +4125,6 @@ int mlx5_devlink_port_fn_migratable_get(struct devlink_port *port, bool *is_enab
|
||||
{
|
||||
struct mlx5_eswitch *esw;
|
||||
struct mlx5_vport *vport;
|
||||
int err = -EOPNOTSUPP;
|
||||
|
||||
esw = mlx5_devlink_eswitch_get(port->devlink);
|
||||
if (IS_ERR(esw))
|
||||
@@ -4128,7 +4132,7 @@ int mlx5_devlink_port_fn_migratable_get(struct devlink_port *port, bool *is_enab
|
||||
|
||||
if (!MLX5_CAP_GEN(esw->dev, migration)) {
|
||||
NL_SET_ERR_MSG_MOD(extack, "Device doesn't support migration");
|
||||
return err;
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
vport = mlx5_devlink_port_fn_get_vport(port, esw);
|
||||
@@ -4138,12 +4142,9 @@ int mlx5_devlink_port_fn_migratable_get(struct devlink_port *port, bool *is_enab
|
||||
}
|
||||
|
||||
mutex_lock(&esw->state_lock);
|
||||
if (vport->enabled) {
|
||||
*is_enabled = vport->info.mig_enabled;
|
||||
err = 0;
|
||||
}
|
||||
*is_enabled = vport->info.mig_enabled;
|
||||
mutex_unlock(&esw->state_lock);
|
||||
return err;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mlx5_devlink_port_fn_migratable_set(struct devlink_port *port, bool enable,
|
||||
@@ -4172,10 +4173,6 @@ int mlx5_devlink_port_fn_migratable_set(struct devlink_port *port, bool enable,
|
||||
}
|
||||
|
||||
mutex_lock(&esw->state_lock);
|
||||
if (!vport->enabled) {
|
||||
NL_SET_ERR_MSG_MOD(extack, "Eswitch vport is disabled");
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (vport->info.mig_enabled == enable) {
|
||||
err = 0;
|
||||
@@ -4219,7 +4216,6 @@ int mlx5_devlink_port_fn_roce_get(struct devlink_port *port, bool *is_enabled,
|
||||
{
|
||||
struct mlx5_eswitch *esw;
|
||||
struct mlx5_vport *vport;
|
||||
int err = -EOPNOTSUPP;
|
||||
|
||||
esw = mlx5_devlink_eswitch_get(port->devlink);
|
||||
if (IS_ERR(esw))
|
||||
@@ -4232,12 +4228,9 @@ int mlx5_devlink_port_fn_roce_get(struct devlink_port *port, bool *is_enabled,
|
||||
}
|
||||
|
||||
mutex_lock(&esw->state_lock);
|
||||
if (vport->enabled) {
|
||||
*is_enabled = vport->info.roce_enabled;
|
||||
err = 0;
|
||||
}
|
||||
*is_enabled = vport->info.roce_enabled;
|
||||
mutex_unlock(&esw->state_lock);
|
||||
return err;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mlx5_devlink_port_fn_roce_set(struct devlink_port *port, bool enable,
|
||||
@@ -4246,10 +4239,10 @@ int mlx5_devlink_port_fn_roce_set(struct devlink_port *port, bool enable,
|
||||
int query_out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out);
|
||||
struct mlx5_eswitch *esw;
|
||||
struct mlx5_vport *vport;
|
||||
int err = -EOPNOTSUPP;
|
||||
void *query_ctx;
|
||||
void *hca_caps;
|
||||
u16 vport_num;
|
||||
int err;
|
||||
|
||||
esw = mlx5_devlink_eswitch_get(port->devlink);
|
||||
if (IS_ERR(esw))
|
||||
@@ -4263,10 +4256,6 @@ int mlx5_devlink_port_fn_roce_set(struct devlink_port *port, bool enable,
|
||||
vport_num = vport->vport;
|
||||
|
||||
mutex_lock(&esw->state_lock);
|
||||
if (!vport->enabled) {
|
||||
NL_SET_ERR_MSG_MOD(extack, "Eswitch vport is disabled");
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (vport->info.roce_enabled == enable) {
|
||||
err = 0;
|
||||
|
||||
@@ -835,7 +835,7 @@ static bool mlx5_shared_fdb_supported(struct mlx5_lag *ldev)
|
||||
dev = ldev->pf[MLX5_LAG_P1].dev;
|
||||
if (is_mdev_switchdev_mode(dev) &&
|
||||
mlx5_eswitch_vport_match_metadata_enabled(dev->priv.eswitch) &&
|
||||
mlx5_devcom_comp_is_ready(dev->priv.devcom, MLX5_DEVCOM_ESW_OFFLOADS) &&
|
||||
mlx5_esw_offloads_devcom_is_ready(dev->priv.eswitch) &&
|
||||
MLX5_CAP_ESW(dev, esw_shared_ingress_acl) &&
|
||||
mlx5_eswitch_get_npeers(dev->priv.eswitch) == MLX5_CAP_GEN(dev, num_lag_ports) - 1)
|
||||
return true;
|
||||
@@ -1268,16 +1268,6 @@ void mlx5_lag_remove_mdev(struct mlx5_core_dev *dev)
|
||||
mlx5_ldev_put(ldev);
|
||||
}
|
||||
|
||||
bool mlx5_lag_is_supported(struct mlx5_core_dev *dev)
|
||||
{
|
||||
if (!MLX5_CAP_GEN(dev, vport_group_manager) ||
|
||||
!MLX5_CAP_GEN(dev, lag_master) ||
|
||||
MLX5_CAP_GEN(dev, num_lag_ports) < 2 ||
|
||||
MLX5_CAP_GEN(dev, num_lag_ports) > MLX5_MAX_PORTS)
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
void mlx5_lag_add_mdev(struct mlx5_core_dev *dev)
|
||||
{
|
||||
int err;
|
||||
|
||||
@@ -74,8 +74,6 @@ struct mlx5_lag {
|
||||
struct lag_mpesw lag_mpesw;
|
||||
};
|
||||
|
||||
bool mlx5_lag_is_supported(struct mlx5_core_dev *dev);
|
||||
|
||||
static inline struct mlx5_lag *
|
||||
mlx5_lag_dev(struct mlx5_core_dev *dev)
|
||||
{
|
||||
@@ -115,4 +113,14 @@ void mlx5_lag_remove_devices(struct mlx5_lag *ldev);
|
||||
int mlx5_deactivate_lag(struct mlx5_lag *ldev);
|
||||
void mlx5_lag_add_devices(struct mlx5_lag *ldev);
|
||||
|
||||
static inline bool mlx5_lag_is_supported(struct mlx5_core_dev *dev)
|
||||
{
|
||||
if (!MLX5_CAP_GEN(dev, vport_group_manager) ||
|
||||
!MLX5_CAP_GEN(dev, lag_master) ||
|
||||
MLX5_CAP_GEN(dev, num_lag_ports) < 2 ||
|
||||
MLX5_CAP_GEN(dev, num_lag_ports) > MLX5_MAX_PORTS)
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
#endif /* __MLX5_LAG_H__ */
|
||||
|
||||
@@ -2,214 +2,273 @@
|
||||
/* Copyright (c) 2018 Mellanox Technologies */
|
||||
|
||||
#include <linux/mlx5/vport.h>
|
||||
#include <linux/list.h>
|
||||
#include "lib/devcom.h"
|
||||
#include "mlx5_core.h"
|
||||
|
||||
static LIST_HEAD(devcom_list);
|
||||
static LIST_HEAD(devcom_dev_list);
|
||||
static LIST_HEAD(devcom_comp_list);
|
||||
/* protect device list */
|
||||
static DEFINE_MUTEX(dev_list_lock);
|
||||
/* protect component list */
|
||||
static DEFINE_MUTEX(comp_list_lock);
|
||||
|
||||
#define devcom_for_each_component(priv, comp, iter) \
|
||||
for (iter = 0; \
|
||||
comp = &(priv)->components[iter], iter < MLX5_DEVCOM_NUM_COMPONENTS; \
|
||||
iter++)
|
||||
#define devcom_for_each_component(iter) \
|
||||
list_for_each_entry(iter, &devcom_comp_list, comp_list)
|
||||
|
||||
struct mlx5_devcom_component {
|
||||
struct {
|
||||
void __rcu *data;
|
||||
} device[MLX5_DEVCOM_PORTS_SUPPORTED];
|
||||
|
||||
mlx5_devcom_event_handler_t handler;
|
||||
struct rw_semaphore sem;
|
||||
bool ready;
|
||||
};
|
||||
|
||||
struct mlx5_devcom_list {
|
||||
struct mlx5_devcom_dev {
|
||||
struct list_head list;
|
||||
|
||||
struct mlx5_devcom_component components[MLX5_DEVCOM_NUM_COMPONENTS];
|
||||
struct mlx5_core_dev *devs[MLX5_DEVCOM_PORTS_SUPPORTED];
|
||||
struct mlx5_core_dev *dev;
|
||||
struct kref ref;
|
||||
};
|
||||
|
||||
struct mlx5_devcom {
|
||||
struct mlx5_devcom_list *priv;
|
||||
int idx;
|
||||
struct mlx5_devcom_comp {
|
||||
struct list_head comp_list;
|
||||
enum mlx5_devcom_component id;
|
||||
u64 key;
|
||||
struct list_head comp_dev_list_head;
|
||||
mlx5_devcom_event_handler_t handler;
|
||||
struct kref ref;
|
||||
bool ready;
|
||||
struct rw_semaphore sem;
|
||||
};
|
||||
|
||||
static struct mlx5_devcom_list *mlx5_devcom_list_alloc(void)
|
||||
struct mlx5_devcom_comp_dev {
|
||||
struct list_head list;
|
||||
struct mlx5_devcom_comp *comp;
|
||||
struct mlx5_devcom_dev *devc;
|
||||
void __rcu *data;
|
||||
};
|
||||
|
||||
static bool devcom_dev_exists(struct mlx5_core_dev *dev)
|
||||
{
|
||||
struct mlx5_devcom_component *comp;
|
||||
struct mlx5_devcom_list *priv;
|
||||
int i;
|
||||
struct mlx5_devcom_dev *iter;
|
||||
|
||||
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
return NULL;
|
||||
list_for_each_entry(iter, &devcom_dev_list, list)
|
||||
if (iter->dev == dev)
|
||||
return true;
|
||||
|
||||
devcom_for_each_component(priv, comp, i)
|
||||
init_rwsem(&comp->sem);
|
||||
|
||||
return priv;
|
||||
return false;
|
||||
}
|
||||
|
||||
static struct mlx5_devcom *mlx5_devcom_alloc(struct mlx5_devcom_list *priv,
|
||||
u8 idx)
|
||||
static struct mlx5_devcom_dev *
|
||||
mlx5_devcom_dev_alloc(struct mlx5_core_dev *dev)
|
||||
{
|
||||
struct mlx5_devcom *devcom;
|
||||
struct mlx5_devcom_dev *devc;
|
||||
|
||||
devc = kzalloc(sizeof(*devc), GFP_KERNEL);
|
||||
if (!devc)
|
||||
return NULL;
|
||||
|
||||
devc->dev = dev;
|
||||
kref_init(&devc->ref);
|
||||
return devc;
|
||||
}
|
||||
|
||||
struct mlx5_devcom_dev *
|
||||
mlx5_devcom_register_device(struct mlx5_core_dev *dev)
|
||||
{
|
||||
struct mlx5_devcom_dev *devc;
|
||||
|
||||
mutex_lock(&dev_list_lock);
|
||||
|
||||
if (devcom_dev_exists(dev)) {
|
||||
devc = ERR_PTR(-EEXIST);
|
||||
goto out;
|
||||
}
|
||||
|
||||
devc = mlx5_devcom_dev_alloc(dev);
|
||||
if (!devc) {
|
||||
devc = ERR_PTR(-ENOMEM);
|
||||
goto out;
|
||||
}
|
||||
|
||||
list_add_tail(&devc->list, &devcom_dev_list);
|
||||
out:
|
||||
mutex_unlock(&dev_list_lock);
|
||||
return devc;
|
||||
}
|
||||
|
||||
static void
|
||||
mlx5_devcom_dev_release(struct kref *ref)
|
||||
{
|
||||
struct mlx5_devcom_dev *devc = container_of(ref, struct mlx5_devcom_dev, ref);
|
||||
|
||||
mutex_lock(&dev_list_lock);
|
||||
list_del(&devc->list);
|
||||
mutex_unlock(&dev_list_lock);
|
||||
kfree(devc);
|
||||
}
|
||||
|
||||
void mlx5_devcom_unregister_device(struct mlx5_devcom_dev *devc)
|
||||
{
|
||||
if (!IS_ERR_OR_NULL(devc))
|
||||
kref_put(&devc->ref, mlx5_devcom_dev_release);
|
||||
}
|
||||
|
||||
static struct mlx5_devcom_comp *
|
||||
mlx5_devcom_comp_alloc(u64 id, u64 key, mlx5_devcom_event_handler_t handler)
|
||||
{
|
||||
struct mlx5_devcom_comp *comp;
|
||||
|
||||
comp = kzalloc(sizeof(*comp), GFP_KERNEL);
|
||||
if (!comp)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
comp->id = id;
|
||||
comp->key = key;
|
||||
comp->handler = handler;
|
||||
init_rwsem(&comp->sem);
|
||||
kref_init(&comp->ref);
|
||||
INIT_LIST_HEAD(&comp->comp_dev_list_head);
|
||||
|
||||
return comp;
|
||||
}
|
||||
|
||||
static void
|
||||
mlx5_devcom_comp_release(struct kref *ref)
|
||||
{
|
||||
struct mlx5_devcom_comp *comp = container_of(ref, struct mlx5_devcom_comp, ref);
|
||||
|
||||
mutex_lock(&comp_list_lock);
|
||||
list_del(&comp->comp_list);
|
||||
mutex_unlock(&comp_list_lock);
|
||||
kfree(comp);
|
||||
}
|
||||
|
||||
static struct mlx5_devcom_comp_dev *
|
||||
devcom_alloc_comp_dev(struct mlx5_devcom_dev *devc,
|
||||
struct mlx5_devcom_comp *comp,
|
||||
void *data)
|
||||
{
|
||||
struct mlx5_devcom_comp_dev *devcom;
|
||||
|
||||
devcom = kzalloc(sizeof(*devcom), GFP_KERNEL);
|
||||
if (!devcom)
|
||||
return NULL;
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
kref_get(&devc->ref);
|
||||
devcom->devc = devc;
|
||||
devcom->comp = comp;
|
||||
rcu_assign_pointer(devcom->data, data);
|
||||
|
||||
down_write(&comp->sem);
|
||||
list_add_tail(&devcom->list, &comp->comp_dev_list_head);
|
||||
up_write(&comp->sem);
|
||||
|
||||
devcom->priv = priv;
|
||||
devcom->idx = idx;
|
||||
return devcom;
|
||||
}
|
||||
|
||||
/* Must be called with intf_mutex held */
|
||||
struct mlx5_devcom *mlx5_devcom_register_device(struct mlx5_core_dev *dev)
|
||||
static void
|
||||
devcom_free_comp_dev(struct mlx5_devcom_comp_dev *devcom)
|
||||
{
|
||||
struct mlx5_devcom_list *priv = NULL, *iter;
|
||||
struct mlx5_devcom *devcom = NULL;
|
||||
bool new_priv = false;
|
||||
u64 sguid0, sguid1;
|
||||
int idx, i;
|
||||
struct mlx5_devcom_comp *comp = devcom->comp;
|
||||
|
||||
if (!mlx5_core_is_pf(dev))
|
||||
return NULL;
|
||||
if (MLX5_CAP_GEN(dev, num_lag_ports) > MLX5_DEVCOM_PORTS_SUPPORTED)
|
||||
return NULL;
|
||||
|
||||
mlx5_dev_list_lock();
|
||||
sguid0 = mlx5_query_nic_system_image_guid(dev);
|
||||
list_for_each_entry(iter, &devcom_list, list) {
|
||||
/* There is at least one device in iter */
|
||||
struct mlx5_core_dev *tmp_dev;
|
||||
|
||||
idx = -1;
|
||||
for (i = 0; i < MLX5_DEVCOM_PORTS_SUPPORTED; i++) {
|
||||
if (iter->devs[i])
|
||||
tmp_dev = iter->devs[i];
|
||||
else
|
||||
idx = i;
|
||||
}
|
||||
|
||||
if (idx == -1)
|
||||
continue;
|
||||
|
||||
sguid1 = mlx5_query_nic_system_image_guid(tmp_dev);
|
||||
if (sguid0 != sguid1)
|
||||
continue;
|
||||
|
||||
priv = iter;
|
||||
break;
|
||||
}
|
||||
|
||||
if (!priv) {
|
||||
priv = mlx5_devcom_list_alloc();
|
||||
if (!priv) {
|
||||
devcom = ERR_PTR(-ENOMEM);
|
||||
goto out;
|
||||
}
|
||||
|
||||
idx = 0;
|
||||
new_priv = true;
|
||||
}
|
||||
|
||||
priv->devs[idx] = dev;
|
||||
devcom = mlx5_devcom_alloc(priv, idx);
|
||||
if (!devcom) {
|
||||
if (new_priv)
|
||||
kfree(priv);
|
||||
devcom = ERR_PTR(-ENOMEM);
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (new_priv)
|
||||
list_add(&priv->list, &devcom_list);
|
||||
out:
|
||||
mlx5_dev_list_unlock();
|
||||
return devcom;
|
||||
}
|
||||
|
||||
/* Must be called with intf_mutex held */
|
||||
void mlx5_devcom_unregister_device(struct mlx5_devcom *devcom)
|
||||
{
|
||||
struct mlx5_devcom_list *priv;
|
||||
int i;
|
||||
|
||||
if (IS_ERR_OR_NULL(devcom))
|
||||
return;
|
||||
|
||||
mlx5_dev_list_lock();
|
||||
priv = devcom->priv;
|
||||
priv->devs[devcom->idx] = NULL;
|
||||
down_write(&comp->sem);
|
||||
list_del(&devcom->list);
|
||||
up_write(&comp->sem);
|
||||
|
||||
kref_put(&devcom->devc->ref, mlx5_devcom_dev_release);
|
||||
kfree(devcom);
|
||||
|
||||
for (i = 0; i < MLX5_DEVCOM_PORTS_SUPPORTED; i++)
|
||||
if (priv->devs[i])
|
||||
break;
|
||||
|
||||
if (i != MLX5_DEVCOM_PORTS_SUPPORTED)
|
||||
goto out;
|
||||
|
||||
list_del(&priv->list);
|
||||
kfree(priv);
|
||||
out:
|
||||
mlx5_dev_list_unlock();
|
||||
kref_put(&comp->ref, mlx5_devcom_comp_release);
|
||||
}
|
||||
|
||||
void mlx5_devcom_register_component(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id,
|
||||
mlx5_devcom_event_handler_t handler,
|
||||
void *data)
|
||||
static bool
|
||||
devcom_component_equal(struct mlx5_devcom_comp *devcom,
|
||||
enum mlx5_devcom_component id,
|
||||
u64 key)
|
||||
{
|
||||
struct mlx5_devcom_component *comp;
|
||||
|
||||
if (IS_ERR_OR_NULL(devcom))
|
||||
return;
|
||||
|
||||
WARN_ON(!data);
|
||||
|
||||
comp = &devcom->priv->components[id];
|
||||
down_write(&comp->sem);
|
||||
comp->handler = handler;
|
||||
rcu_assign_pointer(comp->device[devcom->idx].data, data);
|
||||
up_write(&comp->sem);
|
||||
return devcom->id == id && devcom->key == key;
|
||||
}
|
||||
|
||||
void mlx5_devcom_unregister_component(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id)
|
||||
static struct mlx5_devcom_comp *
|
||||
devcom_component_get(struct mlx5_devcom_dev *devc,
|
||||
enum mlx5_devcom_component id,
|
||||
u64 key,
|
||||
mlx5_devcom_event_handler_t handler)
|
||||
{
|
||||
struct mlx5_devcom_component *comp;
|
||||
struct mlx5_devcom_comp *comp;
|
||||
|
||||
if (IS_ERR_OR_NULL(devcom))
|
||||
return;
|
||||
devcom_for_each_component(comp) {
|
||||
if (devcom_component_equal(comp, id, key)) {
|
||||
if (handler == comp->handler) {
|
||||
kref_get(&comp->ref);
|
||||
return comp;
|
||||
}
|
||||
|
||||
comp = &devcom->priv->components[id];
|
||||
down_write(&comp->sem);
|
||||
RCU_INIT_POINTER(comp->device[devcom->idx].data, NULL);
|
||||
up_write(&comp->sem);
|
||||
synchronize_rcu();
|
||||
mlx5_core_err(devc->dev,
|
||||
"Cannot register existing devcom component with different handler\n");
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
int mlx5_devcom_send_event(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id,
|
||||
struct mlx5_devcom_comp_dev *
|
||||
mlx5_devcom_register_component(struct mlx5_devcom_dev *devc,
|
||||
enum mlx5_devcom_component id,
|
||||
u64 key,
|
||||
mlx5_devcom_event_handler_t handler,
|
||||
void *data)
|
||||
{
|
||||
struct mlx5_devcom_comp_dev *devcom;
|
||||
struct mlx5_devcom_comp *comp;
|
||||
|
||||
if (IS_ERR_OR_NULL(devc))
|
||||
return NULL;
|
||||
|
||||
mutex_lock(&comp_list_lock);
|
||||
comp = devcom_component_get(devc, id, key, handler);
|
||||
if (IS_ERR(comp)) {
|
||||
devcom = ERR_PTR(-EINVAL);
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
if (!comp) {
|
||||
comp = mlx5_devcom_comp_alloc(id, key, handler);
|
||||
if (IS_ERR(comp)) {
|
||||
devcom = ERR_CAST(comp);
|
||||
goto out_unlock;
|
||||
}
|
||||
list_add_tail(&comp->comp_list, &devcom_comp_list);
|
||||
}
|
||||
mutex_unlock(&comp_list_lock);
|
||||
|
||||
devcom = devcom_alloc_comp_dev(devc, comp, data);
|
||||
if (IS_ERR(devcom))
|
||||
kref_put(&comp->ref, mlx5_devcom_comp_release);
|
||||
|
||||
return devcom;
|
||||
|
||||
out_unlock:
|
||||
mutex_unlock(&comp_list_lock);
|
||||
return devcom;
|
||||
}
|
||||
|
||||
void mlx5_devcom_unregister_component(struct mlx5_devcom_comp_dev *devcom)
|
||||
{
|
||||
if (!IS_ERR_OR_NULL(devcom))
|
||||
devcom_free_comp_dev(devcom);
|
||||
}
|
||||
|
||||
int mlx5_devcom_send_event(struct mlx5_devcom_comp_dev *devcom,
|
||||
int event, int rollback_event,
|
||||
void *event_data)
|
||||
{
|
||||
struct mlx5_devcom_component *comp;
|
||||
int err = -ENODEV, i;
|
||||
struct mlx5_devcom_comp *comp = devcom->comp;
|
||||
struct mlx5_devcom_comp_dev *pos;
|
||||
int err = 0;
|
||||
void *data;
|
||||
|
||||
if (IS_ERR_OR_NULL(devcom))
|
||||
return err;
|
||||
return -ENODEV;
|
||||
|
||||
comp = &devcom->priv->components[id];
|
||||
down_write(&comp->sem);
|
||||
for (i = 0; i < MLX5_DEVCOM_PORTS_SUPPORTED; i++) {
|
||||
void *data = rcu_dereference_protected(comp->device[i].data,
|
||||
lockdep_is_held(&comp->sem));
|
||||
list_for_each_entry(pos, &comp->comp_dev_list_head, list) {
|
||||
data = rcu_dereference_protected(pos->data, lockdep_is_held(&comp->sem));
|
||||
|
||||
if (i != devcom->idx && data) {
|
||||
if (pos != devcom && data) {
|
||||
err = comp->handler(event, data, event_data);
|
||||
if (err)
|
||||
goto rollback;
|
||||
@@ -220,48 +279,43 @@ int mlx5_devcom_send_event(struct mlx5_devcom *devcom,
|
||||
return 0;
|
||||
|
||||
rollback:
|
||||
while (i--) {
|
||||
void *data = rcu_dereference_protected(comp->device[i].data,
|
||||
lockdep_is_held(&comp->sem));
|
||||
if (list_entry_is_head(pos, &comp->comp_dev_list_head, list))
|
||||
goto out;
|
||||
pos = list_prev_entry(pos, list);
|
||||
list_for_each_entry_from_reverse(pos, &comp->comp_dev_list_head, list) {
|
||||
data = rcu_dereference_protected(pos->data, lockdep_is_held(&comp->sem));
|
||||
|
||||
if (i != devcom->idx && data)
|
||||
if (pos != devcom && data)
|
||||
comp->handler(rollback_event, data, event_data);
|
||||
}
|
||||
|
||||
out:
|
||||
up_write(&comp->sem);
|
||||
return err;
|
||||
}
|
||||
|
||||
void mlx5_devcom_comp_set_ready(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id,
|
||||
bool ready)
|
||||
void mlx5_devcom_comp_set_ready(struct mlx5_devcom_comp_dev *devcom, bool ready)
|
||||
{
|
||||
struct mlx5_devcom_component *comp;
|
||||
WARN_ON(!rwsem_is_locked(&devcom->comp->sem));
|
||||
|
||||
comp = &devcom->priv->components[id];
|
||||
WARN_ON(!rwsem_is_locked(&comp->sem));
|
||||
|
||||
WRITE_ONCE(comp->ready, ready);
|
||||
WRITE_ONCE(devcom->comp->ready, ready);
|
||||
}
|
||||
|
||||
bool mlx5_devcom_comp_is_ready(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id)
|
||||
bool mlx5_devcom_comp_is_ready(struct mlx5_devcom_comp_dev *devcom)
|
||||
{
|
||||
if (IS_ERR_OR_NULL(devcom))
|
||||
return false;
|
||||
|
||||
return READ_ONCE(devcom->priv->components[id].ready);
|
||||
return READ_ONCE(devcom->comp->ready);
|
||||
}
|
||||
|
||||
bool mlx5_devcom_for_each_peer_begin(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id)
|
||||
bool mlx5_devcom_for_each_peer_begin(struct mlx5_devcom_comp_dev *devcom)
|
||||
{
|
||||
struct mlx5_devcom_component *comp;
|
||||
struct mlx5_devcom_comp *comp;
|
||||
|
||||
if (IS_ERR_OR_NULL(devcom))
|
||||
return false;
|
||||
|
||||
comp = &devcom->priv->components[id];
|
||||
comp = devcom->comp;
|
||||
down_read(&comp->sem);
|
||||
if (!READ_ONCE(comp->ready)) {
|
||||
up_read(&comp->sem);
|
||||
@@ -271,74 +325,60 @@ bool mlx5_devcom_for_each_peer_begin(struct mlx5_devcom *devcom,
|
||||
return true;
|
||||
}
|
||||
|
||||
void mlx5_devcom_for_each_peer_end(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id)
|
||||
void mlx5_devcom_for_each_peer_end(struct mlx5_devcom_comp_dev *devcom)
|
||||
{
|
||||
struct mlx5_devcom_component *comp = &devcom->priv->components[id];
|
||||
|
||||
up_read(&comp->sem);
|
||||
up_read(&devcom->comp->sem);
|
||||
}
|
||||
|
||||
void *mlx5_devcom_get_next_peer_data(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id,
|
||||
int *i)
|
||||
void *mlx5_devcom_get_next_peer_data(struct mlx5_devcom_comp_dev *devcom,
|
||||
struct mlx5_devcom_comp_dev **pos)
|
||||
{
|
||||
struct mlx5_devcom_component *comp;
|
||||
void *ret;
|
||||
int idx;
|
||||
struct mlx5_devcom_comp *comp = devcom->comp;
|
||||
struct mlx5_devcom_comp_dev *tmp;
|
||||
void *data;
|
||||
|
||||
comp = &devcom->priv->components[id];
|
||||
tmp = list_prepare_entry(*pos, &comp->comp_dev_list_head, list);
|
||||
|
||||
if (*i == MLX5_DEVCOM_PORTS_SUPPORTED)
|
||||
return NULL;
|
||||
for (idx = *i; idx < MLX5_DEVCOM_PORTS_SUPPORTED; idx++) {
|
||||
if (idx != devcom->idx) {
|
||||
ret = rcu_dereference_protected(comp->device[idx].data,
|
||||
lockdep_is_held(&comp->sem));
|
||||
if (ret)
|
||||
list_for_each_entry_continue(tmp, &comp->comp_dev_list_head, list) {
|
||||
if (tmp != devcom) {
|
||||
data = rcu_dereference_protected(tmp->data, lockdep_is_held(&comp->sem));
|
||||
if (data)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (idx == MLX5_DEVCOM_PORTS_SUPPORTED) {
|
||||
*i = idx;
|
||||
if (list_entry_is_head(tmp, &comp->comp_dev_list_head, list))
|
||||
return NULL;
|
||||
}
|
||||
*i = idx + 1;
|
||||
|
||||
return ret;
|
||||
*pos = tmp;
|
||||
return data;
|
||||
}
|
||||
|
||||
void *mlx5_devcom_get_next_peer_data_rcu(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id,
|
||||
int *i)
|
||||
void *mlx5_devcom_get_next_peer_data_rcu(struct mlx5_devcom_comp_dev *devcom,
|
||||
struct mlx5_devcom_comp_dev **pos)
|
||||
{
|
||||
struct mlx5_devcom_component *comp;
|
||||
void *ret;
|
||||
int idx;
|
||||
struct mlx5_devcom_comp *comp = devcom->comp;
|
||||
struct mlx5_devcom_comp_dev *tmp;
|
||||
void *data;
|
||||
|
||||
comp = &devcom->priv->components[id];
|
||||
tmp = list_prepare_entry(*pos, &comp->comp_dev_list_head, list);
|
||||
|
||||
if (*i == MLX5_DEVCOM_PORTS_SUPPORTED)
|
||||
return NULL;
|
||||
for (idx = *i; idx < MLX5_DEVCOM_PORTS_SUPPORTED; idx++) {
|
||||
if (idx != devcom->idx) {
|
||||
list_for_each_entry_continue(tmp, &comp->comp_dev_list_head, list) {
|
||||
if (tmp != devcom) {
|
||||
/* This can change concurrently, however 'data' pointer will remain
|
||||
* valid for the duration of RCU read section.
|
||||
*/
|
||||
if (!READ_ONCE(comp->ready))
|
||||
return NULL;
|
||||
ret = rcu_dereference(comp->device[idx].data);
|
||||
if (ret)
|
||||
data = rcu_dereference(tmp->data);
|
||||
if (data)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (idx == MLX5_DEVCOM_PORTS_SUPPORTED) {
|
||||
*i = idx;
|
||||
if (list_entry_is_head(tmp, &comp->comp_dev_list_head, list))
|
||||
return NULL;
|
||||
}
|
||||
*i = idx + 1;
|
||||
|
||||
return ret;
|
||||
*pos = tmp;
|
||||
return data;
|
||||
}
|
||||
|
||||
@@ -6,11 +6,8 @@
|
||||
|
||||
#include <linux/mlx5/driver.h>
|
||||
|
||||
#define MLX5_DEVCOM_PORTS_SUPPORTED 4
|
||||
|
||||
enum mlx5_devcom_components {
|
||||
enum mlx5_devcom_component {
|
||||
MLX5_DEVCOM_ESW_OFFLOADS,
|
||||
|
||||
MLX5_DEVCOM_NUM_COMPONENTS,
|
||||
};
|
||||
|
||||
@@ -18,45 +15,40 @@ typedef int (*mlx5_devcom_event_handler_t)(int event,
|
||||
void *my_data,
|
||||
void *event_data);
|
||||
|
||||
struct mlx5_devcom *mlx5_devcom_register_device(struct mlx5_core_dev *dev);
|
||||
void mlx5_devcom_unregister_device(struct mlx5_devcom *devcom);
|
||||
struct mlx5_devcom_dev *mlx5_devcom_register_device(struct mlx5_core_dev *dev);
|
||||
void mlx5_devcom_unregister_device(struct mlx5_devcom_dev *devc);
|
||||
|
||||
void mlx5_devcom_register_component(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id,
|
||||
mlx5_devcom_event_handler_t handler,
|
||||
void *data);
|
||||
void mlx5_devcom_unregister_component(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id);
|
||||
struct mlx5_devcom_comp_dev *
|
||||
mlx5_devcom_register_component(struct mlx5_devcom_dev *devc,
|
||||
enum mlx5_devcom_component id,
|
||||
u64 key,
|
||||
mlx5_devcom_event_handler_t handler,
|
||||
void *data);
|
||||
void mlx5_devcom_unregister_component(struct mlx5_devcom_comp_dev *devcom);
|
||||
|
||||
int mlx5_devcom_send_event(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id,
|
||||
int mlx5_devcom_send_event(struct mlx5_devcom_comp_dev *devcom,
|
||||
int event, int rollback_event,
|
||||
void *event_data);
|
||||
|
||||
void mlx5_devcom_comp_set_ready(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id,
|
||||
bool ready);
|
||||
bool mlx5_devcom_comp_is_ready(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id);
|
||||
void mlx5_devcom_comp_set_ready(struct mlx5_devcom_comp_dev *devcom, bool ready);
|
||||
bool mlx5_devcom_comp_is_ready(struct mlx5_devcom_comp_dev *devcom);
|
||||
|
||||
bool mlx5_devcom_for_each_peer_begin(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id);
|
||||
void mlx5_devcom_for_each_peer_end(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id);
|
||||
void *mlx5_devcom_get_next_peer_data(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id, int *i);
|
||||
bool mlx5_devcom_for_each_peer_begin(struct mlx5_devcom_comp_dev *devcom);
|
||||
void mlx5_devcom_for_each_peer_end(struct mlx5_devcom_comp_dev *devcom);
|
||||
void *mlx5_devcom_get_next_peer_data(struct mlx5_devcom_comp_dev *devcom,
|
||||
struct mlx5_devcom_comp_dev **pos);
|
||||
|
||||
#define mlx5_devcom_for_each_peer_entry(devcom, id, data, i) \
|
||||
for (i = 0, data = mlx5_devcom_get_next_peer_data(devcom, id, &i); \
|
||||
data; \
|
||||
data = mlx5_devcom_get_next_peer_data(devcom, id, &i))
|
||||
#define mlx5_devcom_for_each_peer_entry(devcom, data, pos) \
|
||||
for (pos = NULL, data = mlx5_devcom_get_next_peer_data(devcom, &pos); \
|
||||
data; \
|
||||
data = mlx5_devcom_get_next_peer_data(devcom, &pos))
|
||||
|
||||
void *mlx5_devcom_get_next_peer_data_rcu(struct mlx5_devcom *devcom,
|
||||
enum mlx5_devcom_components id, int *i);
|
||||
void *mlx5_devcom_get_next_peer_data_rcu(struct mlx5_devcom_comp_dev *devcom,
|
||||
struct mlx5_devcom_comp_dev **pos);
|
||||
|
||||
#define mlx5_devcom_for_each_peer_entry_rcu(devcom, id, data, i) \
|
||||
for (i = 0, data = mlx5_devcom_get_next_peer_data_rcu(devcom, id, &i); \
|
||||
data; \
|
||||
data = mlx5_devcom_get_next_peer_data_rcu(devcom, id, &i))
|
||||
#define mlx5_devcom_for_each_peer_entry_rcu(devcom, data, pos) \
|
||||
for (pos = NULL, data = mlx5_devcom_get_next_peer_data_rcu(devcom, &pos); \
|
||||
data; \
|
||||
data = mlx5_devcom_get_next_peer_data_rcu(devcom, &pos))
|
||||
|
||||
#endif
|
||||
#endif /* __LIB_MLX5_DEVCOM_H__ */
|
||||
|
||||
@@ -951,10 +951,10 @@ static int mlx5_init_once(struct mlx5_core_dev *dev)
|
||||
{
|
||||
int err;
|
||||
|
||||
dev->priv.devcom = mlx5_devcom_register_device(dev);
|
||||
if (IS_ERR(dev->priv.devcom))
|
||||
mlx5_core_err(dev, "failed to register with devcom (0x%p)\n",
|
||||
dev->priv.devcom);
|
||||
dev->priv.devc = mlx5_devcom_register_device(dev);
|
||||
if (IS_ERR(dev->priv.devc))
|
||||
mlx5_core_warn(dev, "failed to register devcom device %ld\n",
|
||||
PTR_ERR(dev->priv.devc));
|
||||
|
||||
err = mlx5_query_board_id(dev);
|
||||
if (err) {
|
||||
@@ -1089,7 +1089,7 @@ static int mlx5_init_once(struct mlx5_core_dev *dev)
|
||||
err_irq_cleanup:
|
||||
mlx5_irq_table_cleanup(dev);
|
||||
err_devcom:
|
||||
mlx5_devcom_unregister_device(dev->priv.devcom);
|
||||
mlx5_devcom_unregister_device(dev->priv.devc);
|
||||
|
||||
return err;
|
||||
}
|
||||
@@ -1118,7 +1118,7 @@ static void mlx5_cleanup_once(struct mlx5_core_dev *dev)
|
||||
mlx5_events_cleanup(dev);
|
||||
mlx5_eq_table_cleanup(dev);
|
||||
mlx5_irq_table_cleanup(dev);
|
||||
mlx5_devcom_unregister_device(dev->priv.devcom);
|
||||
mlx5_devcom_unregister_device(dev->priv.devc);
|
||||
}
|
||||
|
||||
static int mlx5_function_enable(struct mlx5_core_dev *dev, bool boot, u64 timeout)
|
||||
@@ -1142,7 +1142,7 @@ static int mlx5_function_enable(struct mlx5_core_dev *dev, bool boot, u64 timeou
|
||||
return err;
|
||||
}
|
||||
|
||||
err = mlx5_cmd_init(dev);
|
||||
err = mlx5_cmd_enable(dev);
|
||||
if (err) {
|
||||
mlx5_core_err(dev, "Failed initializing command interface, aborting\n");
|
||||
return err;
|
||||
@@ -1196,7 +1196,7 @@ static int mlx5_function_enable(struct mlx5_core_dev *dev, bool boot, u64 timeou
|
||||
mlx5_stop_health_poll(dev, boot);
|
||||
err_cmd_cleanup:
|
||||
mlx5_cmd_set_state(dev, MLX5_CMDIF_STATE_DOWN);
|
||||
mlx5_cmd_cleanup(dev);
|
||||
mlx5_cmd_disable(dev);
|
||||
|
||||
return err;
|
||||
}
|
||||
@@ -1207,7 +1207,7 @@ static void mlx5_function_disable(struct mlx5_core_dev *dev, bool boot)
|
||||
mlx5_core_disable_hca(dev, 0);
|
||||
mlx5_stop_health_poll(dev, boot);
|
||||
mlx5_cmd_set_state(dev, MLX5_CMDIF_STATE_DOWN);
|
||||
mlx5_cmd_cleanup(dev);
|
||||
mlx5_cmd_disable(dev);
|
||||
}
|
||||
|
||||
static int mlx5_function_open(struct mlx5_core_dev *dev)
|
||||
@@ -1796,6 +1796,12 @@ int mlx5_mdev_init(struct mlx5_core_dev *dev, int profile_idx)
|
||||
debugfs_create_file("vhca_id", 0400, priv->dbg.dbg_root, dev, &vhca_id_fops);
|
||||
INIT_LIST_HEAD(&priv->traps);
|
||||
|
||||
err = mlx5_cmd_init(dev);
|
||||
if (err) {
|
||||
mlx5_core_err(dev, "Failed initializing cmdif SW structs, aborting\n");
|
||||
goto err_cmd_init;
|
||||
}
|
||||
|
||||
err = mlx5_tout_init(dev);
|
||||
if (err) {
|
||||
mlx5_core_err(dev, "Failed initializing timeouts, aborting\n");
|
||||
@@ -1841,6 +1847,8 @@ int mlx5_mdev_init(struct mlx5_core_dev *dev, int profile_idx)
|
||||
err_health_init:
|
||||
mlx5_tout_cleanup(dev);
|
||||
err_timeout_init:
|
||||
mlx5_cmd_cleanup(dev);
|
||||
err_cmd_init:
|
||||
debugfs_remove(dev->priv.dbg.dbg_root);
|
||||
mutex_destroy(&priv->pgdir_mutex);
|
||||
mutex_destroy(&priv->alloc_mutex);
|
||||
@@ -1863,6 +1871,7 @@ void mlx5_mdev_uninit(struct mlx5_core_dev *dev)
|
||||
mlx5_pagealloc_cleanup(dev);
|
||||
mlx5_health_cleanup(dev);
|
||||
mlx5_tout_cleanup(dev);
|
||||
mlx5_cmd_cleanup(dev);
|
||||
debugfs_remove_recursive(dev->priv.dbg.dbg_root);
|
||||
mutex_destroy(&priv->pgdir_mutex);
|
||||
mutex_destroy(&priv->alloc_mutex);
|
||||
|
||||
@@ -178,6 +178,8 @@ int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
|
||||
int mlx5_query_board_id(struct mlx5_core_dev *dev);
|
||||
int mlx5_cmd_init(struct mlx5_core_dev *dev);
|
||||
void mlx5_cmd_cleanup(struct mlx5_core_dev *dev);
|
||||
int mlx5_cmd_enable(struct mlx5_core_dev *dev);
|
||||
void mlx5_cmd_disable(struct mlx5_core_dev *dev);
|
||||
void mlx5_cmd_set_state(struct mlx5_core_dev *dev,
|
||||
enum mlx5_cmdif_state cmdif_state);
|
||||
int mlx5_cmd_init_hca(struct mlx5_core_dev *dev, uint32_t *sw_owner_id);
|
||||
|
||||
@@ -287,18 +287,23 @@ struct mlx5_cmd_stats {
|
||||
struct mlx5_cmd {
|
||||
struct mlx5_nb nb;
|
||||
|
||||
/* members which needs to be queried or reinitialized each reload */
|
||||
struct {
|
||||
u16 cmdif_rev;
|
||||
u8 log_sz;
|
||||
u8 log_stride;
|
||||
int max_reg_cmds;
|
||||
unsigned long bitmask;
|
||||
struct semaphore sem;
|
||||
struct semaphore pages_sem;
|
||||
struct semaphore throttle_sem;
|
||||
} vars;
|
||||
enum mlx5_cmdif_state state;
|
||||
void *cmd_alloc_buf;
|
||||
dma_addr_t alloc_dma;
|
||||
int alloc_size;
|
||||
void *cmd_buf;
|
||||
dma_addr_t dma;
|
||||
u16 cmdif_rev;
|
||||
u8 log_sz;
|
||||
u8 log_stride;
|
||||
int max_reg_cmds;
|
||||
int events;
|
||||
u32 __iomem *vector;
|
||||
|
||||
/* protect command queue allocations
|
||||
*/
|
||||
@@ -308,12 +313,8 @@ struct mlx5_cmd {
|
||||
*/
|
||||
spinlock_t token_lock;
|
||||
u8 token;
|
||||
unsigned long bitmask;
|
||||
char wq_name[MLX5_CMD_WQ_MAX_NAME];
|
||||
struct workqueue_struct *wq;
|
||||
struct semaphore sem;
|
||||
struct semaphore pages_sem;
|
||||
struct semaphore throttle_sem;
|
||||
int mode;
|
||||
u16 allowed_opcode;
|
||||
struct mlx5_cmd_work_ent *ent_arr[MLX5_MAX_COMMANDS];
|
||||
@@ -321,7 +322,7 @@ struct mlx5_cmd {
|
||||
struct mlx5_cmd_debug dbg;
|
||||
struct cmd_msg_cache cache[MLX5_NUM_COMMAND_CACHES];
|
||||
int checksum_disabled;
|
||||
struct mlx5_cmd_stats stats[MLX5_CMD_OP_MAX];
|
||||
struct xarray stats;
|
||||
};
|
||||
|
||||
struct mlx5_cmd_mailbox {
|
||||
@@ -501,7 +502,7 @@ struct mlx5_events;
|
||||
struct mlx5_mpfs;
|
||||
struct mlx5_eswitch;
|
||||
struct mlx5_lag;
|
||||
struct mlx5_devcom;
|
||||
struct mlx5_devcom_dev;
|
||||
struct mlx5_fw_reset;
|
||||
struct mlx5_eq_table;
|
||||
struct mlx5_irq_table;
|
||||
@@ -618,7 +619,7 @@ struct mlx5_priv {
|
||||
struct mlx5_core_sriov sriov;
|
||||
struct mlx5_lag *lag;
|
||||
u32 flags;
|
||||
struct mlx5_devcom *devcom;
|
||||
struct mlx5_devcom_dev *devc;
|
||||
struct mlx5_fw_reset *fw_reset;
|
||||
struct mlx5_core_roce roce;
|
||||
struct mlx5_fc_stats fc_stats;
|
||||
|
||||
Reference in New Issue
Block a user