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scsi: ufs: core: Fix bRefClkFreq write failure in HS-LSS mode
According to the UFS spec, the bRefClkFreq attribute can only be written when both sub-links are in LS-MODE. However, in HS LSS mode with resetmode = HS_MODE, if the UFS device's default bRefClkFreq value differs from the host controller's dev_ref_clk_freq setting, the write operation will fail. To fix this issue, introduce ufshcd_get_op_mode() function to detect the current link operational mode. Call ufshcd_set_dev_ref_clk() only when both sub-links are in LS-MODE to ensure the attribute can be written successfully. Signed-off-by: Wang Shuaiwei <wangshuaiwei1@xiaomi.com> Link: https://patch.msgid.link/20260414033718.1459540-1-wangshuaiwei1@xiaomi.com Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
committed by
Martin K. Petersen
parent
47e66bec3e
commit
b06cf63d83
@@ -9259,6 +9259,30 @@ static void ufshcd_config_mcq(struct ufs_hba *hba)
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hba->nutrs);
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}
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/**
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* ufshcd_get_op_mode - get UFS operating mode.
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* @hba: per-adapter instance
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*
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* Use the PA_PWRMODE value to represent the operating mode of UFS.
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*
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*/
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static enum ufs_op_mode ufshcd_get_op_mode(struct ufs_hba *hba)
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{
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u32 mode;
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u8 rx_mode;
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u8 tx_mode;
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ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
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rx_mode = (mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK;
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tx_mode = mode & PWRMODE_MASK;
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if ((rx_mode == SLOW_MODE || rx_mode == SLOWAUTO_MODE) &&
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(tx_mode == SLOW_MODE || tx_mode == SLOWAUTO_MODE))
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return LS_MODE;
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return HS_MODE;
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}
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static int ufshcd_post_device_init(struct ufs_hba *hba)
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{
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int ret;
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@@ -9281,11 +9305,13 @@ static int ufshcd_post_device_init(struct ufs_hba *hba)
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return 0;
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/*
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* Set the right value to bRefClkFreq before attempting to
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* Set the right value to bRefClkFreq in LS_MODE before attempting to
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* switch to HS gears.
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*/
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if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
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if (ufshcd_get_op_mode(hba) == LS_MODE &&
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hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
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ufshcd_set_dev_ref_clk(hba);
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/* Gear up to HS gear. */
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ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info,
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UFSHCD_PMC_POLICY_DONT_FORCE);
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@@ -333,6 +333,11 @@ enum ufs_eom_eye_mask {
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#define DME_LocalTC0ReplayTimeOutVal 0xD042
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#define DME_LocalAFC0ReqTimeOutVal 0xD043
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enum ufs_op_mode {
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LS_MODE = 1,
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HS_MODE = 2,
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};
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/* PA power modes */
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enum ufs_pa_pwr_mode {
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FAST_MODE = 1,
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