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Merge tag 'drm-intel-next-fixes-2023-04-13' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Just one Cc:stable fix for sampler indirect state in bindless heap. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZDfxo+PXyw9ivFLI@jlahtine-mobl.ger.corp.intel.com
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@@ -1145,6 +1145,7 @@
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#define SC_DISABLE_POWER_OPTIMIZATION_EBB REG_BIT(9)
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#define GEN11_SAMPLER_ENABLE_HEADLESS_MSG REG_BIT(5)
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#define MTL_DISABLE_SAMPLER_SC_OOO REG_BIT(3)
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#define GEN11_INDIRECT_STATE_BASE_ADDR_OVERRIDE REG_BIT(0)
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#define GEN9_HALF_SLICE_CHICKEN7 MCR_REG(0xe194)
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#define DG2_DISABLE_ROUND_ENABLE_ALLOW_FOR_SSLA REG_BIT(15)
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@@ -2971,6 +2971,25 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li
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add_render_compute_tuning_settings(i915, wal);
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if (GRAPHICS_VER(i915) >= 11) {
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/* This is not a Wa (although referred to as
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* WaSetInidrectStateOverride in places), this allows
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* applications that reference sampler states through
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* the BindlessSamplerStateBaseAddress to have their
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* border color relative to DynamicStateBaseAddress
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* rather than BindlessSamplerStateBaseAddress.
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*
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* Otherwise SAMPLER_STATE border colors have to be
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* copied in multiple heaps (DynamicStateBaseAddress &
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* BindlessSamplerStateBaseAddress)
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*
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* BSpec: 46052
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*/
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wa_mcr_masked_en(wal,
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GEN10_SAMPLER_MODE,
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GEN11_INDIRECT_STATE_BASE_ADDR_OVERRIDE);
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}
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if (IS_MTL_GRAPHICS_STEP(i915, M, STEP_B0, STEP_FOREVER) ||
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IS_MTL_GRAPHICS_STEP(i915, P, STEP_B0, STEP_FOREVER))
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/* Wa_14017856879 */
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