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wifi: rtw89: coex: Add Wi-Fi role info version 10

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Because the new generation Bluetooth will able to work on 5/6GHz band,
it will suffer 5/6GHz Wi-Fi, the mechanism need to cover more scenario
with different Wi-Fi/Bluetooth combination.

Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260712030506.43438-2-pkshih@realtek.com
This commit is contained in:
Ching-Te Ku
2026-07-12 11:04:56 +08:00
committed by Ping-Ke Shih
parent d4157cd3ae
commit af7f59e8e8
12 changed files with 1412 additions and 1709 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2493
drivers/net/wireless/realtek/rtw89/coex.c
View File

File diff suppressed because it is too large Load Diff

34
drivers/net/wireless/realtek/rtw89/coex.h
View File

@@ -11,6 +11,40 @@
#define BTC_TLV_SLOT_ID_LEN_V7 1
#define BTC_SLOT_REQ_TH 2
#define BTC_FREQ_W2G 2412
#define BTC_FREQ_W5G 5005
#define BTC_FREQ_W6G 5955
#define BTC_FREQ_B2G 2402
#define BTC_FREQ_B6G 5125
#define BTC_FREQ_W2G_CH14 2484
#define BTC_LO_2G_DNM 125 /* LO Coefficient Denominator */
#define BTC_LO_5G_DNM 125
#define BTC_LO_6G_DNM 150
#define BTC_LO_2G_NMR 400 /* LO Coefficient Numerator */
#define BTC_LO_5G_NMR 200
#define BTC_LO_6G_NMR 200
#define BTC_CH_W2G_MIN 1 /* start from 2412MHz */
#define BTC_CH_W2G_MAX 14
#define BTC_CH_W5G_MIN 1 /* start from 5005MHz */
#define BTC_CH_W5G_MAX 165
#define BTC_CH_W6G_MIN 1 /* start from 5955MHz */
#define BTC_CH_W6G_MAX 233
#define BTC_CH_B2G_MIN 0 /* start from 2402MHz */
#define BTC_CH_B2G_MAX 78
#define BTC_CH_B5G_MIN 600 /* start from 5725MHz */
#define BTC_CH_B5G_MAX 1300
#define BTC_VCO_GUARD_W2W 10 /* WiFi to WiFi VCO freq forbiddened range (MHZ) */
#define BTC_VCO_GUARD_W2B 25 /* WiFi to WiFi VCO freq forbiddened range (MHZ) */
#define BTC_VCO_GUARD_B2B 10 /* WiFi to WiFi VCO freq forbiddened range (MHZ) */
enum btc_mode {
BTC_MODE_NORMAL,
BTC_MODE_WL,

153
drivers/net/wireless/realtek/rtw89/core.h
View File

@@ -1854,7 +1854,7 @@ union rtw89_btc_wl_role_info_map {
struct rtw89_btc_wl_role_info_bpos role;
};
struct rtw89_btc_wl_role_info { /* struct size must be n*4 bytes */
struct rtw89_btc_wl_role_info_v0 { /* struct size must be n*4 bytes */
u8 connect_cnt;
u8 link_mode;
union rtw89_btc_wl_role_info_map role_map;
@@ -1891,7 +1891,7 @@ struct rtw89_btc_wl_role_info_v2 { /* struct size must be n*4 bytes */
u32 rsvd: 27;
};
struct rtw89_btc_wl_rlink { /* H2C info, struct size must be n*4 bytes */
struct rtw89_btc_wl_rlink_v0 { /* H2C info, struct size must be n*4 bytes */
u8 connected;
u8 pid;
u8 phy;
@@ -1908,6 +1908,28 @@ struct rtw89_btc_wl_rlink { /* H2C info, struct size must be n*4 bytes */
u8 mode; /* wifi protocol */
} __packed;
struct rtw89_btc_wl_rlink_v10 { /* H2C info, struct size must be n*4 bytes */
u8 connected;
u8 pid;
u8 phy;
u8 noa;
u8 rf_band; /* enum band_type RF band: 2.4G/5G/6G */
u8 active; /* 0:rlink is under doze */
u8 bw; /* enum channel_width */
u8 role; /*enum role_type */
u8 ch;
u8 noa_dur; /* ms */
u8 client_cnt; /* for Role = P2P-Go/AP */
u8 mode; /* wifi protocol */
u8 mac_id;
u8 rsvd0;
u8 rsvd1;
u8 rsvd2;
} __packed;
#define RTW89_BE_BTC_WL_MAX_ROLE_NUMBER 6
struct rtw89_btc_wl_role_info_v7 { /* struct size must be n*4 bytes */
u8 connect_cnt;
@@ -1917,12 +1939,12 @@ struct rtw89_btc_wl_role_info_v7 { /* struct size must be n*4 bytes */
struct rtw89_btc_wl_active_role_v7 active_role[RTW89_BE_BTC_WL_MAX_ROLE_NUMBER];
u32 role_map;
u32 mrole_type; /* btc_wl_mrole_type */
u32 mrole_noa_duration; /* ms */
u32 dbcc_en;
u32 dbcc_chg;
u32 dbcc_2g_phy; /* which phy operate in 2G, HW_PHY_0 or HW_PHY_1 */
__le32 role_map;
__le32 mrole_type; /* btc_wl_mrole_type */
__le32 mrole_noa_duration; /* ms */
__le32 dbcc_en;
__le32 dbcc_chg;
__le32 dbcc_2g_phy; /* which phy operate in 2G, HW_PHY_0 or HW_PHY_1 */
} __packed;
struct rtw89_btc_wl_role_info_v8 { /* H2C info, struct size must be n*4 bytes */
@@ -1936,12 +1958,90 @@ struct rtw89_btc_wl_role_info_v8 { /* H2C info, struct size must be n*4 bytes */
u8 dbcc_chg;
u8 dbcc_2g_phy; /* which phy operate in 2G, HW_PHY_0 or HW_PHY_1 */
struct rtw89_btc_wl_rlink_v0 rlink[RTW89_BE_BTC_WL_MAX_ROLE_NUMBER][RTW89_MAC_NUM];
__le32 role_map;
__le32 mrole_type; /* btc_wl_mrole_type */
__le32 mrole_noa_duration; /* ms */
} __packed;
struct rtw89_btc_wl_role_info_v10 { /* H2C info, struct size must be n*4 bytes */
struct rtw89_btc_wl_rlink_v10 rlink[RTW89_BE_BTC_WL_MAX_ROLE_NUMBER][RTW89_MAC_NUM];
u8 link_mode;
u8 link_mode_hb1;
u8 p2p_exist;
u8 p2p_exist_hb1;
u8 pta_req_band;
u8 dbcc_en; /* 1+1 and 2.4G-included */
u8 dbcc_2g_phy; /* which phy operate in 2G, HW_PHY_0 or HW_PHY_1 */
u8 rsvd;
__le32 role_map;
__le32 role_map_hb1;
__le32 mrole_type; /* btc_wl_mrole_type: [31:16]:band1, [15:0]:band0 */
} __packed;
struct rtw89_btc_wl_rlink { /* Logic dynamic using */
u8 connected;
u8 pid;
u8 phy;
u8 noa;
u8 rf_band; /* enum band_type RF band: 2.4G/5G/6G */
u8 active; /* 0:rlink is under doze */
u8 bw; /* enum channel_width */
u8 role; /*enum role_type */
u8 ch;
u8 noa_dur; /* ms */
u8 client_cnt; /* for Role = P2P-Go/AP */
u8 mode; /* wifi protocol */
/*v0 v1*/
u16 tx_lvl;
u16 rx_lvl;
u16 tx_rate;
u16 rx_rate;
/* v7 */
u8 client_ps; /*v7 v2 v1 v0*/
/* v10 */
u8 mac_id;
u8 rsvd0;
u8 rsvd1;
u8 rsvd2;
};
struct rtw89_btc_wl_role_info { /* Logic dynamic using */
struct rtw89_btc_wl_rlink rlink[RTW89_BE_BTC_WL_MAX_ROLE_NUMBER][RTW89_MAC_NUM];
u8 link_mode;
u8 link_mode_hb1;
u8 p2p_exist;
u8 p2p_exist_hb1;
u8 pta_req_band;
u8 dbcc_en; /* 1+1 and 2.4G-included */
u8 dbcc_2g_phy; /* which phy operate in 2G, HW_PHY_0 or HW_PHY_1 */
u8 rsvd;
u32 role_map;
u32 mrole_type; /* btc_wl_mrole_type */
u32 mrole_noa_duration; /* ms */
} __packed;
u32 role_map_hb1;
u32 mrole_type; /* btc_wl_mrole_type: [31:16]:band1, [15:0]:band0 */
/* Before v10 use this linkmode */
u8 link_mode_v0;
/* v7 */
u8 connect_cnt;
u32 dbcc_chg; /* v7 v2*/
/* v8 */
u8 link_mode_chg; /* v8, v7 v2*/
u8 p2p_2g; /* v8, v7 */
u32 mrole_noa_duration; /* v8, v7 v2*/
};
struct rtw89_btc_wl_ver_info {
u32 fw_coex; /* match with which coex_ver */
@@ -1955,7 +2055,7 @@ struct rtw89_btc_wl_afh_info {
u8 en;
u8 ch;
u8 bw;
u8 rsvd;
u8 band;
} __packed;
struct rtw89_btc_wl_rfk_info {
@@ -2167,16 +2267,13 @@ struct rtw89_btc_wl_nhm {
};
struct rtw89_btc_wl_info {
struct rtw89_btc_wl_link_info link_info[RTW89_PORT_NUM];
struct rtw89_btc_wl_link_info rlink_info[RTW89_BE_BTC_WL_MAX_ROLE_NUMBER][RTW89_MAC_NUM];
struct rtw89_btc_chdef rf_ch_info[RTW89_PHY_NUM];
struct rtw89_btc_wl_rfk_info rfk_info;
struct rtw89_btc_wl_ver_info ver_info;
struct rtw89_btc_wl_afh_info afh_info;
struct rtw89_btc_wl_ver_info ver_info;
struct rtw89_btc_wl_afh_info afh_info[RTW89_MAC_NUM][RTW89_BAND_NUM];
struct rtw89_btc_wl_afh_info afh_info_last[RTW89_MAC_NUM][RTW89_BAND_NUM];
struct rtw89_btc_wl_role_info role_info;
struct rtw89_btc_wl_role_info_v1 role_info_v1;
struct rtw89_btc_wl_role_info_v2 role_info_v2;
struct rtw89_btc_wl_role_info_v7 role_info_v7;
struct rtw89_btc_wl_role_info_v8 role_info_v8;
struct rtw89_btc_wl_scan_info scan_info;
struct rtw89_btc_wl_dbcc_info dbcc_info;
struct rtw89_btc_wl_mlo_info mlo_info;
@@ -2191,12 +2288,18 @@ struct rtw89_btc_wl_info {
u8 pta_req_mac;
u8 bt_polut_type[RTW89_PHY_NUM]; /* BT polluted WL-Tx type for phy0/1 */
u8 rf_band_map[RTW89_PHY_NUM]; /* rf_band bit-map */
u8 ch_map[12];
u8 ch_map_le[5];
bool is_5g_hi_channel;
bool is_5g_hi_ch;
bool is_5g_hi_ch_hb1;
bool go_client_exist;
bool go_client_exist_hb1;
bool noa_exist;
bool noa_exist_hb1;
bool pta_reg_mac_chg;
bool bg_mode;
bool bg_mode_hb1;
bool he_mode;
bool scbd_chg[BTC_ALL_BT];
bool fw_ver_mismatch;
@@ -3280,6 +3383,14 @@ struct rtw89_btc_fbtc_outsrc_set_info {
u8 rf_gbt_source;
u8 bt_enable_state;
u8 wl_btg_standby_chg;
/* bit[15]-> 0:2G/1:5G,6G, bit[14:0]-> WL HWBx ch freq in MHz */
/* forbidden group-> bit[1]:fbd rf-band, bit[0]: fbd enable */
u8 fbd_group_en[RTW89_MAC_NUM][2]; /* HWB0/1 +.Group0/1 */
u16 rf_center_freq[RTW89_MAC_NUM]; /* HWB0/1 */
/* forbidden group boundary: [15:8]->UP, [7:0]->LO */
u16 fbd_group_bound[RTW89_MAC_NUM][2]; /* HWB0/1 +.Group0/1 */
/* 11-bit in MHz, freq diff threshold */
u16 freq_diff_thres[RTW89_MAC_NUM][BTC_ALL_BT_EZL]; /* HWB0/1 vs.BT0/1/2 */
} __packed;
union rtw89_btc_fbtc_slot_u {
@@ -3363,6 +3474,7 @@ struct rtw89_btc_dm {
u8 lps_ctrl_change: 1;
u8 scbd_write_instant;
bool scbd_b2w_update;
bool pre_agc_chg;
};
struct rtw89_btc_ctrl {
@@ -4961,6 +5073,7 @@ struct rtw89_chip_info {
u8 mailbox;
u8 afh_guard_ch;
u16 fdd_iso_freq;
const u8 *wl_rssi_thres;
const u8 *bt_rssi_thres;
u8 rssi_tol;

384
drivers/net/wireless/realtek/rtw89/fw.c
View File

@@ -5922,14 +5922,14 @@ int rtw89_fw_h2c_cxdrv_init_v10(struct rtw89_dev *rtwdev, u8 type)
int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev, u8 type)
{
struct rtw89_btc *btc = &rtwdev->btc;
const struct rtw89_btc_ver *ver = btc->ver;
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
struct rtw89_btc_wl_role_info *role_info = &wl->role_info;
struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role;
struct rtw89_btc_wl_active_role *active = role_info->active_role;
struct rtw89_btc_wl_role_info *r = &wl->role_info;
const struct rtw89_btc_ver *ver = btc->ver;
struct rtw89_btc_wl_rlink *rl;
struct sk_buff *skb;
u32 len;
u32 rmap = r->role_map;
u8 offset = 0;
u32 len;
u8 *cmd;
int ret;
int i;
@@ -5947,36 +5947,37 @@ int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev, u8 type)
RTW89_SET_FWCMD_CXHDR_TYPE(cmd, type);
RTW89_SET_FWCMD_CXHDR_LEN(cmd, len - H2C_LEN_CXDRVHDR);
RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt);
RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode);
RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, r->connect_cnt);
RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, r->link_mode);
RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none);
RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station);
RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap);
RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap);
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc);
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master);
RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh);
RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter);
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device);
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc);
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go);
RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan);
RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_NONE)));
RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_STATION)));
RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_AP)));
RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_AP_VLAN)));
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_ADHOC)));
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_ADHOC_MASTER)));
RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_MESH_POINT)));
RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_MONITOR)));
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_P2P_DEVICE)));
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_P2P_CLIENT)));
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_P2P_GO)));
RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_NAN)));
for (i = 0; i < RTW89_PORT_NUM; i++, active++) {
RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, active->connected, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, active->pid, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, active->phy, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, active->noa, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, active->band, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, active->client_ps, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, active->bw, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, active->role, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, active->ch, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, active->tx_lvl, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, active->rx_lvl, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, active->tx_rate, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, active->rx_rate, i, offset);
for (i = 0; i < RTW89_PORT_NUM; i++) {
rl = &r->rlink[i][RTW89_MAC_0];
RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, rl->connected, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, rl->pid, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, rl->phy, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, rl->noa, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, rl->rf_band, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, rl->client_ps, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, rl->bw, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, rl->role, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, rl->ch, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, rl->tx_lvl, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, rl->rx_lvl, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, rl->tx_rate, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, rl->rx_rate, i, offset);
}
rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
@@ -6005,12 +6006,12 @@ int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev, u8 type)
struct rtw89_btc *btc = &rtwdev->btc;
const struct rtw89_btc_ver *ver = btc->ver;
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
struct rtw89_btc_wl_role_info_v1 *role_info = &wl->role_info_v1;
struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role;
struct rtw89_btc_wl_active_role_v1 *active = role_info->active_role_v1;
struct rtw89_btc_wl_role_info *r = &wl->role_info;
struct rtw89_btc_wl_rlink *rl;
struct sk_buff *skb;
u32 len;
u32 rmap = r->role_map;
u8 *cmd, offset;
u32 len;
int ret;
int i;
@@ -6027,47 +6028,49 @@ int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev, u8 type)
RTW89_SET_FWCMD_CXHDR_TYPE(cmd, type);
RTW89_SET_FWCMD_CXHDR_LEN(cmd, len - H2C_LEN_CXDRVHDR);
RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt);
RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode);
RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, r->connect_cnt);
RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, r->link_mode);
RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none);
RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station);
RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap);
RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap);
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc);
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master);
RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh);
RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter);
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device);
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc);
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go);
RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan);
RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_NONE)));
RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_STATION)));
RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_AP)));
RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_AP_VLAN)));
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_ADHOC)));
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_ADHOC_MASTER)));
RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_MESH_POINT)));
RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_MONITOR)));
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_P2P_DEVICE)));
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_P2P_CLIENT)));
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_P2P_GO)));
RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_NAN)));
offset = PORT_DATA_OFFSET;
for (i = 0; i < RTW89_PORT_NUM; i++, active++) {
RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, active->connected, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, active->pid, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, active->phy, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, active->noa, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, active->band, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, active->client_ps, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, active->bw, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, active->role, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, active->ch, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, active->tx_lvl, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, active->rx_lvl, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, active->tx_rate, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, active->rx_rate, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR(cmd, active->noa_duration, i, offset);
for (i = 0; i < RTW89_PORT_NUM; i++) {
rl = &r->rlink[i][RTW89_MAC_0];
RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, rl->connected, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, rl->pid, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, rl->phy, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, rl->noa, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, rl->rf_band, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, rl->client_ps, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, rl->bw, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, rl->role, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, rl->ch, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, rl->tx_lvl, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, rl->rx_lvl, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, rl->tx_rate, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, rl->rx_rate, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR(cmd, rl->noa_dur, i, offset);
}
offset = len - H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN;
RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(cmd, role_info->mrole_type, offset);
RTW89_SET_FWCMD_CXROLE_MROLE_NOA(cmd, role_info->mrole_noa_duration, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_EN(cmd, role_info->dbcc_en, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_CHG(cmd, role_info->dbcc_chg, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY(cmd, role_info->dbcc_2g_phy, offset);
RTW89_SET_FWCMD_CXROLE_LINK_MODE_CHG(cmd, role_info->link_mode_chg, offset);
RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(cmd, r->mrole_type, offset);
RTW89_SET_FWCMD_CXROLE_MROLE_NOA(cmd, r->mrole_noa_duration, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_EN(cmd, r->dbcc_en, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_CHG(cmd, r->dbcc_chg, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY(cmd, r->dbcc_2g_phy, offset);
RTW89_SET_FWCMD_CXROLE_LINK_MODE_CHG(cmd, r->link_mode_chg, offset);
rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
H2C_CAT_OUTSRC, BTFC_SET,
@@ -6095,10 +6098,10 @@ int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev, u8 type)
struct rtw89_btc *btc = &rtwdev->btc;
const struct rtw89_btc_ver *ver = btc->ver;
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
struct rtw89_btc_wl_role_info_v2 *role_info = &wl->role_info_v2;
struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role;
struct rtw89_btc_wl_active_role_v2 *active = role_info->active_role_v2;
struct rtw89_btc_wl_role_info *r = &wl->role_info;
struct rtw89_btc_wl_rlink *rl;
struct sk_buff *skb;
u32 rmap = r->role_map;
u32 len;
u8 *cmd, offset;
int ret;
@@ -6117,43 +6120,45 @@ int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev, u8 type)
RTW89_SET_FWCMD_CXHDR_TYPE(cmd, type);
RTW89_SET_FWCMD_CXHDR_LEN(cmd, len - H2C_LEN_CXDRVHDR);
RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt);
RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode);
RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, r->connect_cnt);
RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, r->link_mode);
RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none);
RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station);
RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap);
RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap);
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc);
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master);
RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh);
RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter);
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device);
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc);
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go);
RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan);
RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_NONE)));
RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_STATION)));
RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_AP)));
RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_AP_VLAN)));
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_ADHOC)));
RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_ADHOC_MASTER)));
RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_MESH_POINT)));
RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_MONITOR)));
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_P2P_DEVICE)));
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_P2P_CLIENT)));
RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_P2P_GO)));
RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, !!(rmap & BIT(RTW89_WIFI_ROLE_NAN)));
offset = PORT_DATA_OFFSET;
for (i = 0; i < RTW89_PORT_NUM; i++, active++) {
RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED_V2(cmd, active->connected, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PID_V2(cmd, active->pid, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PHY_V2(cmd, active->phy, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA_V2(cmd, active->noa, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BAND_V2(cmd, active->band, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS_V2(cmd, active->client_ps, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BW_V2(cmd, active->bw, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_ROLE_V2(cmd, active->role, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CH_V2(cmd, active->ch, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR_V2(cmd, active->noa_duration, i, offset);
for (i = 0; i < RTW89_PORT_NUM; i++) {
rl = &r->rlink[i][RTW89_MAC_0];
RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED_V2(cmd, rl->connected, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PID_V2(cmd, rl->pid, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_PHY_V2(cmd, rl->phy, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA_V2(cmd, rl->noa, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BAND_V2(cmd, rl->rf_band, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS_V2(cmd, rl->client_ps, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_BW_V2(cmd, rl->bw, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_ROLE_V2(cmd, rl->role, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_CH_V2(cmd, rl->ch, i, offset);
RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR_V2(cmd, rl->noa_dur, i, offset);
}
offset = len - H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN;
RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(cmd, role_info->mrole_type, offset);
RTW89_SET_FWCMD_CXROLE_MROLE_NOA(cmd, role_info->mrole_noa_duration, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_EN(cmd, role_info->dbcc_en, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_CHG(cmd, role_info->dbcc_chg, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY(cmd, role_info->dbcc_2g_phy, offset);
RTW89_SET_FWCMD_CXROLE_LINK_MODE_CHG(cmd, role_info->link_mode_chg, offset);
RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(cmd, r->mrole_type, offset);
RTW89_SET_FWCMD_CXROLE_MROLE_NOA(cmd, r->mrole_noa_duration, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_EN(cmd, r->dbcc_en, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_CHG(cmd, r->dbcc_chg, offset);
RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY(cmd, r->dbcc_2g_phy, offset);
RTW89_SET_FWCMD_CXROLE_LINK_MODE_CHG(cmd, r->link_mode_chg, offset);
rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
H2C_CAT_OUTSRC, BTFC_SET,
@@ -6175,12 +6180,14 @@ int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev, u8 type)
int rtw89_fw_h2c_cxdrv_role_v7(struct rtw89_dev *rtwdev, u8 type)
{
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_wl_role_info_v7 *role = &btc->cx.wl.role_info_v7;
struct rtw89_btc_wl_role_info *r = &rtwdev->btc.cx.wl.role_info;
struct rtw89_h2c_cxrole_v7 *h2c;
struct rtw89_btc_wl_rlink *rl;
u32 len = sizeof(*h2c);
struct sk_buff *skb;
__le32 rm;
int ret;
u8 i;
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
if (!skb) {
@@ -6190,16 +6197,35 @@ int rtw89_fw_h2c_cxdrv_role_v7(struct rtw89_dev *rtwdev, u8 type)
skb_put(skb, len);
h2c = (struct rtw89_h2c_cxrole_v7 *)skb->data;
h2c->hdr.type = type;
h2c->hdr.ver = btc->ver->fwlrole;
h2c->hdr.len = len - H2C_LEN_CXDRVHDR_V7;
memcpy(&h2c->_u8, role, sizeof(h2c->_u8));
h2c->_u32.role_map = cpu_to_le32(role->role_map);
h2c->_u32.mrole_type = cpu_to_le32(role->mrole_type);
h2c->_u32.mrole_noa_duration = cpu_to_le32(role->mrole_noa_duration);
h2c->_u32.dbcc_en = cpu_to_le32(role->dbcc_en);
h2c->_u32.dbcc_chg = cpu_to_le32(role->dbcc_chg);
h2c->_u32.dbcc_2g_phy = cpu_to_le32(role->dbcc_2g_phy);
h2c->r.connect_cnt = r->connect_cnt;
h2c->r.link_mode = r->link_mode;
h2c->r.link_mode_chg = r->link_mode_chg;
h2c->r.p2p_2g = r->p2p_2g;
for (i = 0; i < RTW89_BE_BTC_WL_MAX_ROLE_NUMBER; i++) {
rl = &r->rlink[i][RTW89_MAC_0];
h2c->r.active_role[i].connected = rl->connected;
h2c->r.active_role[i].pid = rl->pid;
h2c->r.active_role[i].phy = rl->phy;
h2c->r.active_role[i].noa = rl->noa;
h2c->r.active_role[i].band = rl->rf_band;
h2c->r.active_role[i].client_ps = rl->client_ps;
h2c->r.active_role[i].bw = rl->bw;
h2c->r.active_role[i].role = rl->role;
h2c->r.active_role[i].ch = rl->ch;
h2c->r.active_role[i].noa_dur = rl->noa_dur;
h2c->r.active_role[i].client_cnt = rl->client_cnt;
}
rm = cpu_to_le32(r->role_map);
memcpy(&h2c->r.role_map, &rm, sizeof(h2c->r.role_map));
h2c->r.mrole_type = cpu_to_le32(r->mrole_type);
h2c->r.mrole_noa_duration = cpu_to_le32(r->mrole_noa_duration);
h2c->r.dbcc_en = cpu_to_le32((u32)r->dbcc_en);
h2c->r.dbcc_chg = cpu_to_le32(r->dbcc_chg);
h2c->r.dbcc_2g_phy = cpu_to_le32(r->dbcc_2g_phy);
rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
H2C_CAT_OUTSRC, BTFC_SET,
@@ -6221,12 +6247,14 @@ int rtw89_fw_h2c_cxdrv_role_v7(struct rtw89_dev *rtwdev, u8 type)
int rtw89_fw_h2c_cxdrv_role_v8(struct rtw89_dev *rtwdev, u8 type)
{
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_wl_role_info_v8 *role = &btc->cx.wl.role_info_v8;
struct rtw89_btc_wl_role_info *r = &rtwdev->btc.cx.wl.role_info;
struct rtw89_h2c_cxrole_v8 *h2c;
struct rtw89_btc_wl_rlink *rl;
u32 len = sizeof(*h2c);
struct sk_buff *skb;
__le32 rm;
int ret;
u8 i, j;
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
if (!skb) {
@@ -6237,12 +6265,118 @@ int rtw89_fw_h2c_cxdrv_role_v8(struct rtw89_dev *rtwdev, u8 type)
h2c = (struct rtw89_h2c_cxrole_v8 *)skb->data;
h2c->hdr.type = type;
h2c->hdr.ver = btc->ver->fwlrole;
h2c->hdr.ver = rtwdev->btc.ver->fwlrole;
h2c->hdr.len = len - H2C_LEN_CXDRVHDR_V7;
memcpy(&h2c->_u8, role, sizeof(h2c->_u8));
h2c->_u32.role_map = cpu_to_le32(role->role_map);
h2c->_u32.mrole_type = cpu_to_le32(role->mrole_type);
h2c->_u32.mrole_noa_duration = cpu_to_le32(role->mrole_noa_duration);
h2c->r.connect_cnt = r->connect_cnt;
h2c->r.link_mode = r->link_mode;
h2c->r.link_mode_chg = r->link_mode_chg;
h2c->r.p2p_2g = r->p2p_2g;
h2c->r.pta_req_band = r->pta_req_band;
h2c->r.dbcc_en = r->dbcc_en;
h2c->r.dbcc_chg = r->dbcc_chg;
h2c->r.dbcc_2g_phy = r->dbcc_2g_phy;
for (j = RTW89_MAC_0; j <= RTW89_MAC_1; j++) {
for (i = 0; i < RTW89_BE_BTC_WL_MAX_ROLE_NUMBER; i++) {
rl = &r->rlink[i][j];
h2c->r.rlink[i][j].connected = rl->connected;
h2c->r.rlink[i][j].pid = rl->pid;
h2c->r.rlink[i][j].phy = rl->phy;
h2c->r.rlink[i][j].noa = rl->noa;
h2c->r.rlink[i][j].rf_band = rl->rf_band;
h2c->r.rlink[i][j].active = rl->active;
h2c->r.rlink[i][j].bw = rl->bw;
h2c->r.rlink[i][j].role = rl->role;
h2c->r.rlink[i][j].ch = rl->ch;
h2c->r.rlink[i][j].noa_dur = rl->noa_dur;
h2c->r.rlink[i][j].client_cnt = rl->client_cnt;
h2c->r.rlink[i][j].mode = rl->mode;
}
}
rm = cpu_to_le32(r->role_map);
memcpy(&h2c->r.role_map, &rm, sizeof(h2c->r.role_map));
h2c->r.mrole_type = cpu_to_le32(r->mrole_type);
h2c->r.mrole_noa_duration = cpu_to_le32(r->mrole_noa_duration);
rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
H2C_CAT_OUTSRC, BTFC_SET,
SET_DRV_INFO, 0, 0,
len);
ret = rtw89_h2c_tx(rtwdev, skb, false);
if (ret) {
rtw89_err(rtwdev, "failed to send h2c\n");
goto fail;
}
return 0;
fail:
dev_kfree_skb_any(skb);
return ret;
}
int rtw89_fw_h2c_cxdrv_role_v10(struct rtw89_dev *rtwdev, u8 type)
{
struct rtw89_btc_wl_role_info *r = &rtwdev->btc.cx.wl.role_info;
struct rtw89_h2c_cxrole_v10 *h2c;
struct rtw89_btc_wl_rlink *rl;
u32 len = sizeof(*h2c);
struct sk_buff *skb;
__le32 rm;
int ret;
u8 i, j;
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
if (!skb) {
rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n");
return -ENOMEM;
}
skb_put(skb, len);
h2c = (struct rtw89_h2c_cxrole_v10 *)skb->data;
h2c->hdr.type = type;
h2c->hdr.ver = rtwdev->btc.ver->fwlrole;
h2c->hdr.len = len - H2C_LEN_CXDRVHDR_V7;
for (j = RTW89_MAC_0; j <= RTW89_MAC_1; j++) {
for (i = 0; i < RTW89_BE_BTC_WL_MAX_ROLE_NUMBER; i++) {
rl = &r->rlink[i][j];
h2c->r.rlink[i][j].connected = rl->connected;
h2c->r.rlink[i][j].pid = rl->pid;
h2c->r.rlink[i][j].phy = rl->phy;
h2c->r.rlink[i][j].noa = rl->noa;
h2c->r.rlink[i][j].rf_band = rl->rf_band;
h2c->r.rlink[i][j].active = rl->active;
h2c->r.rlink[i][j].bw = rl->bw;
h2c->r.rlink[i][j].role = rl->role;
h2c->r.rlink[i][j].ch = rl->ch;
h2c->r.rlink[i][j].noa_dur = rl->noa_dur;
h2c->r.rlink[i][j].client_cnt = rl->client_cnt;
h2c->r.rlink[i][j].mode = rl->mode;
h2c->r.rlink[i][j].mac_id = rl->mac_id;
}
}
h2c->r.link_mode = r->link_mode;
h2c->r.link_mode_hb1 = r->link_mode_hb1;
h2c->r.p2p_exist = r->p2p_exist;
h2c->r.p2p_exist_hb1 = r->p2p_exist_hb1;
h2c->r.pta_req_band = r->pta_req_band;
h2c->r.dbcc_en = r->dbcc_en;
h2c->r.dbcc_2g_phy = r->dbcc_2g_phy;
rm = cpu_to_le32(r->role_map);
memcpy(&h2c->r.role_map, &rm, sizeof(h2c->r.role_map));
rm = cpu_to_le32(r->role_map_hb1);
memcpy(&h2c->r.role_map_hb1, &rm, sizeof(h2c->r.role_map_hb1));
h2c->r.mrole_type = cpu_to_le32(r->mrole_type);
rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
H2C_CAT_OUTSRC, BTFC_SET,

50
drivers/net/wireless/realtek/rtw89/fw.h
View File

@@ -2433,54 +2433,19 @@ struct rtw89_h2c_cxctrl_v7 {
#define H2C_LEN_CXDRVHDR sizeof(struct rtw89_h2c_cxhdr)
#define H2C_LEN_CXDRVHDR_V7 sizeof(struct rtw89_h2c_cxhdr_v7)
struct rtw89_btc_wl_role_info_v7_u8 {
u8 connect_cnt;
u8 link_mode;
u8 link_mode_chg;
u8 p2p_2g;
struct rtw89_btc_wl_active_role_v7 active_role[RTW89_BE_BTC_WL_MAX_ROLE_NUMBER];
} __packed;
struct rtw89_btc_wl_role_info_v7_u32 {
__le32 role_map;
__le32 mrole_type;
__le32 mrole_noa_duration;
__le32 dbcc_en;
__le32 dbcc_chg;
__le32 dbcc_2g_phy;
} __packed;
struct rtw89_h2c_cxrole_v7 {
struct rtw89_h2c_cxhdr_v7 hdr;
struct rtw89_btc_wl_role_info_v7_u8 _u8;
struct rtw89_btc_wl_role_info_v7_u32 _u32;
} __packed;
struct rtw89_btc_wl_role_info_v8_u8 {
u8 connect_cnt;
u8 link_mode;
u8 link_mode_chg;
u8 p2p_2g;
u8 pta_req_band;
u8 dbcc_en;
u8 dbcc_chg;
u8 dbcc_2g_phy;
struct rtw89_btc_wl_rlink rlink[RTW89_BE_BTC_WL_MAX_ROLE_NUMBER][RTW89_MAC_NUM];
} __packed;
struct rtw89_btc_wl_role_info_v8_u32 {
__le32 role_map;
__le32 mrole_type;
__le32 mrole_noa_duration;
struct rtw89_btc_wl_role_info_v7 r;
} __packed;
struct rtw89_h2c_cxrole_v8 {
struct rtw89_h2c_cxhdr_v7 hdr;
struct rtw89_btc_wl_role_info_v8_u8 _u8;
struct rtw89_btc_wl_role_info_v8_u32 _u32;
struct rtw89_btc_wl_role_info_v8 r;
} __packed;
struct rtw89_h2c_cxrole_v10 {
struct rtw89_h2c_cxhdr_v7 hdr;
struct rtw89_btc_wl_role_info_v10 r;
} __packed;
struct rtw89_h2c_cxosi {
@@ -5413,6 +5378,7 @@ int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev, u8 type);
int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev, u8 type);
int rtw89_fw_h2c_cxdrv_role_v7(struct rtw89_dev *rtwdev, u8 type);
int rtw89_fw_h2c_cxdrv_role_v8(struct rtw89_dev *rtwdev, u8 type);
int rtw89_fw_h2c_cxdrv_role_v10(struct rtw89_dev *rtwdev, u8 type);
int rtw89_fw_h2c_cxdrv_osi_info(struct rtw89_dev *rtwdev, u8 type);
int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev, u8 type);
int rtw89_fw_h2c_cxdrv_ctrl_v7(struct rtw89_dev *rtwdev, u8 type);

1
drivers/net/wireless/realtek/rtw89/rtw8851b.c
View File

@@ -2725,6 +2725,7 @@ const struct rtw89_chip_info rtw8851b_chip_info = {
.mailbox = 0x1,
.afh_guard_ch = 6,
.fdd_iso_freq = 1000,
.wl_rssi_thres = rtw89_btc_8851b_wl_rssi_thres,
.bt_rssi_thres = rtw89_btc_8851b_bt_rssi_thres,
.rssi_tol = 2,

1
drivers/net/wireless/realtek/rtw89/rtw8852a.c
View File

@@ -2464,6 +2464,7 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
.mailbox = 0x1,
.afh_guard_ch = 6,
.fdd_iso_freq = 1000,
.wl_rssi_thres = rtw89_btc_8852a_wl_rssi_thres,
.bt_rssi_thres = rtw89_btc_8852a_bt_rssi_thres,
.rssi_tol = 2,

1
drivers/net/wireless/realtek/rtw89/rtw8852b.c
View File

@@ -1060,6 +1060,7 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
.mailbox = 0x1,
.afh_guard_ch = 6,
.fdd_iso_freq = 1000,
.wl_rssi_thres = rtw89_btc_8852b_wl_rssi_thres,
.bt_rssi_thres = rtw89_btc_8852b_bt_rssi_thres,
.rssi_tol = 2,

1
drivers/net/wireless/realtek/rtw89/rtw8852bt.c
View File

@@ -898,6 +898,7 @@ const struct rtw89_chip_info rtw8852bt_chip_info = {
.mailbox = 0x1,
.afh_guard_ch = 6,
.fdd_iso_freq = 1000,
.wl_rssi_thres = rtw89_btc_8852bt_wl_rssi_thres,
.bt_rssi_thres = rtw89_btc_8852bt_bt_rssi_thres,
.rssi_tol = 2,

1
drivers/net/wireless/realtek/rtw89/rtw8852c.c
View File

@@ -3266,6 +3266,7 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
.mailbox = 0x1,
.afh_guard_ch = 6,
.fdd_iso_freq = 1000,
.wl_rssi_thres = rtw89_btc_8852c_wl_rssi_thres,
.bt_rssi_thres = rtw89_btc_8852c_bt_rssi_thres,
.rssi_tol = 2,

1
drivers/net/wireless/realtek/rtw89/rtw8922a.c
View File

@@ -3249,6 +3249,7 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
.mailbox = 0x1,
.afh_guard_ch = 6,
.fdd_iso_freq = 1000,
.wl_rssi_thres = rtw89_btc_8922a_wl_rssi_thres,
.bt_rssi_thres = rtw89_btc_8922a_bt_rssi_thres,
.rssi_tol = 2,

1
drivers/net/wireless/realtek/rtw89/rtw8922d.c
View File

@@ -3535,6 +3535,7 @@ const struct rtw89_chip_info rtw8922d_chip_info = {
.mailbox = 0x1,
.afh_guard_ch = 6,
.fdd_iso_freq = 1000,
.wl_rssi_thres = rtw89_btc_8922d_wl_rssi_thres,
.bt_rssi_thres = rtw89_btc_8922d_bt_rssi_thres,
.rssi_tol = 2,