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ice: Use PTP auxbus for all PHYs restart in E822

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The E822 (and other devices based on the same PHY) is having issue while
setting the PHC timer - the PHY timers are drifting from the PHC. After
such a set all PHYs need to be restarted and resynchronised - do it
using auxiliary bus.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Michal Michalik <michal.michalik@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
Michal Michalik
2023-07-27 15:50:35 +02:00
committed by Tony Nguyen
parent d938a8cca8
commit af3c5c8748
1 changed files with 21 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/net/ethernet/intel/ice/ice_ptp.c
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@@ -1488,6 +1488,24 @@ static void ice_ptp_reset_phy_timestamping(struct ice_pf *pf)
ice_ptp_port_phy_restart(&pf->ptp.port);
}
/**
* ice_ptp_restart_all_phy - Restart all PHYs to recalibrate timestamping
* @pf: Board private structure
*/
static void ice_ptp_restart_all_phy(struct ice_pf *pf)
{
struct list_head *entry;
list_for_each(entry, &pf->ptp.ports_owner.ports) {
struct ice_ptp_port *port = list_entry(entry,
struct ice_ptp_port,
list_member);
if (port->link_up)
ice_ptp_port_phy_restart(port);
}
}
/**
* ice_ptp_adjfine - Adjust clock increment rate
* @info: the driver's PTP info structure
@@ -1925,9 +1943,9 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts)
/* Reenable periodic outputs */
ice_ptp_enable_all_clkout(pf);
/* Recalibrate and re-enable timestamp block */
if (pf->ptp.port.link_up)
ice_ptp_port_phy_restart(&pf->ptp.port);
/* Recalibrate and re-enable timestamp blocks for E822/E823 */
if (hw->phy_model == ICE_PHY_E822)
ice_ptp_restart_all_phy(pf);
exit:
if (err) {
dev_err(ice_pf_to_dev(pf), "PTP failed to set time %d\n", err);