mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-09 03:10:30 -04:00
media: dt-bindings: qcom,venus: cleanup
Cleanup the Qualcomm SoC Venus bindings: - Drop unneeded blank lines and quotes, - Fix indentation in example to 4-space (to match DT schema bindings style), - Add SoC name in each title. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
committed by
Mauro Carvalho Chehab
parent
bfce6a12e5
commit
af2270e043
@@ -1,11 +1,10 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm MSM8916 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
@@ -97,26 +96,26 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8916.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8916.h>
|
||||
|
||||
video-codec@1d00000 {
|
||||
compatible = "qcom,msm8916-venus";
|
||||
reg = <0x01d00000 0xff000>;
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
|
||||
<&gcc GCC_VENUS0_AHB_CLK>,
|
||||
<&gcc GCC_VENUS0_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus";
|
||||
power-domains = <&gcc VENUS_GDSC>;
|
||||
iommus = <&apps_iommu 5>;
|
||||
memory-region = <&venus_mem>;
|
||||
video-codec@1d00000 {
|
||||
compatible = "qcom,msm8916-venus";
|
||||
reg = <0x01d00000 0xff000>;
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
|
||||
<&gcc GCC_VENUS0_AHB_CLK>,
|
||||
<&gcc GCC_VENUS0_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus";
|
||||
power-domains = <&gcc VENUS_GDSC>;
|
||||
iommus = <&apps_iommu 5>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,11 +1,10 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm MSM8996 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
@@ -124,52 +123,52 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
|
||||
|
||||
video-codec@c00000 {
|
||||
compatible = "qcom,msm8996-venus";
|
||||
reg = <0x00c00000 0xff000>;
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mmcc VIDEO_CORE_CLK>,
|
||||
<&mmcc VIDEO_AHB_CLK>,
|
||||
<&mmcc VIDEO_AXI_CLK>,
|
||||
<&mmcc VIDEO_MAXI_CLK>;
|
||||
clock-names = "core", "iface", "bus", "mbus";
|
||||
power-domains = <&mmcc VENUS_GDSC>;
|
||||
iommus = <&venus_smmu 0x00>,
|
||||
<&venus_smmu 0x01>,
|
||||
<&venus_smmu 0x0a>,
|
||||
<&venus_smmu 0x07>,
|
||||
<&venus_smmu 0x0e>,
|
||||
<&venus_smmu 0x0f>,
|
||||
<&venus_smmu 0x08>,
|
||||
<&venus_smmu 0x09>,
|
||||
<&venus_smmu 0x0b>,
|
||||
<&venus_smmu 0x0c>,
|
||||
<&venus_smmu 0x0d>,
|
||||
<&venus_smmu 0x10>,
|
||||
<&venus_smmu 0x11>,
|
||||
<&venus_smmu 0x21>,
|
||||
<&venus_smmu 0x28>,
|
||||
<&venus_smmu 0x29>,
|
||||
<&venus_smmu 0x2b>,
|
||||
<&venus_smmu 0x2c>,
|
||||
<&venus_smmu 0x2d>,
|
||||
<&venus_smmu 0x31>;
|
||||
memory-region = <&venus_mem>;
|
||||
video-codec@c00000 {
|
||||
compatible = "qcom,msm8996-venus";
|
||||
reg = <0x00c00000 0xff000>;
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mmcc VIDEO_CORE_CLK>,
|
||||
<&mmcc VIDEO_AHB_CLK>,
|
||||
<&mmcc VIDEO_AXI_CLK>,
|
||||
<&mmcc VIDEO_MAXI_CLK>;
|
||||
clock-names = "core", "iface", "bus", "mbus";
|
||||
power-domains = <&mmcc VENUS_GDSC>;
|
||||
iommus = <&venus_smmu 0x00>,
|
||||
<&venus_smmu 0x01>,
|
||||
<&venus_smmu 0x0a>,
|
||||
<&venus_smmu 0x07>,
|
||||
<&venus_smmu 0x0e>,
|
||||
<&venus_smmu 0x0f>,
|
||||
<&venus_smmu 0x08>,
|
||||
<&venus_smmu 0x09>,
|
||||
<&venus_smmu 0x0b>,
|
||||
<&venus_smmu 0x0c>,
|
||||
<&venus_smmu 0x0d>,
|
||||
<&venus_smmu 0x10>,
|
||||
<&venus_smmu 0x11>,
|
||||
<&venus_smmu 0x21>,
|
||||
<&venus_smmu 0x28>,
|
||||
<&venus_smmu 0x29>,
|
||||
<&venus_smmu 0x2b>,
|
||||
<&venus_smmu 0x2c>,
|
||||
<&venus_smmu 0x2d>,
|
||||
<&venus_smmu 0x31>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
|
||||
clock-names = "core";
|
||||
power-domains = <&mmcc VENUS_CORE1_GDSC>;
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
|
||||
clock-names = "core";
|
||||
power-domains = <&mmcc VENUS_CORE1_GDSC>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,11 +1,10 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SC7180 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
@@ -116,31 +115,31 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sc7180.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sc7180.h>
|
||||
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sc7180-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&videocc VENUS_GDSC>,
|
||||
<&videocc VCODEC0_GDSC>;
|
||||
power-domain-names = "venus", "vcodec0";
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus",
|
||||
"vcodec0_core", "vcodec0_bus";
|
||||
iommus = <&apps_smmu 0x0c00 0x60>;
|
||||
memory-region = <&venus_mem>;
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sc7180-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&videocc VENUS_GDSC>,
|
||||
<&videocc VCODEC0_GDSC>;
|
||||
power-domain-names = "venus", "vcodec0";
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus",
|
||||
"vcodec0_core", "vcodec0_bus";
|
||||
iommus = <&apps_smmu 0x0c00 0x60>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,11 +1,10 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SC7280 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
@@ -116,47 +115,47 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sc7280.h>
|
||||
#include <dt-bindings/interconnect/qcom,sc7280.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sc7280.h>
|
||||
#include <dt-bindings/interconnect/qcom,sc7280.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sc7280-venus";
|
||||
reg = <0x0aa00000 0xd0600>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sc7280-venus";
|
||||
reg = <0x0aa00000 0xd0600>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&videocc VIDEO_CC_MVSC_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_AXI_CLK>;
|
||||
clock-names = "core", "bus", "iface",
|
||||
"vcodec_core", "vcodec_bus";
|
||||
clocks = <&videocc VIDEO_CC_MVSC_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_AXI_CLK>;
|
||||
clock-names = "core", "bus", "iface",
|
||||
"vcodec_core", "vcodec_bus";
|
||||
|
||||
power-domains = <&videocc MVSC_GDSC>,
|
||||
<&videocc MVS0_GDSC>,
|
||||
<&rpmhpd SC7280_CX>;
|
||||
power-domain-names = "venus", "vcodec0", "cx";
|
||||
power-domains = <&videocc MVSC_GDSC>,
|
||||
<&videocc MVS0_GDSC>,
|
||||
<&rpmhpd SC7280_CX>;
|
||||
power-domain-names = "venus", "vcodec0", "cx";
|
||||
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>,
|
||||
<&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>,
|
||||
<&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
|
||||
iommus = <&apps_smmu 0x2180 0x20>,
|
||||
<&apps_smmu 0x2184 0x20>;
|
||||
iommus = <&apps_smmu 0x2180 0x20>,
|
||||
<&apps_smmu 0x2184 0x20>;
|
||||
|
||||
memory-region = <&video_mem>;
|
||||
memory-region = <&video_mem>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
|
||||
video-firmware {
|
||||
iommus = <&apps_smmu 0x21a2 0x0>;
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
|
||||
video-firmware {
|
||||
iommus = <&apps_smmu 0x21a2 0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,11 +1,10 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SDM660 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
@@ -133,55 +132,55 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
video-codec@cc00000 {
|
||||
compatible = "qcom,sdm660-venus";
|
||||
reg = <0x0cc00000 0xff000>;
|
||||
clocks = <&mmcc VIDEO_CORE_CLK>,
|
||||
<&mmcc VIDEO_AHB_CLK>,
|
||||
<&mmcc VIDEO_AXI_CLK>,
|
||||
<&mmcc THROTTLE_VIDEO_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus", "bus_throttle";
|
||||
interconnects = <&gnoc 0 &mnoc 13>,
|
||||
<&mnoc 4 &bimc 5>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&mmss_smmu 0x400>,
|
||||
<&mmss_smmu 0x401>,
|
||||
<&mmss_smmu 0x40a>,
|
||||
<&mmss_smmu 0x407>,
|
||||
<&mmss_smmu 0x40e>,
|
||||
<&mmss_smmu 0x40f>,
|
||||
<&mmss_smmu 0x408>,
|
||||
<&mmss_smmu 0x409>,
|
||||
<&mmss_smmu 0x40b>,
|
||||
<&mmss_smmu 0x40c>,
|
||||
<&mmss_smmu 0x40d>,
|
||||
<&mmss_smmu 0x410>,
|
||||
<&mmss_smmu 0x421>,
|
||||
<&mmss_smmu 0x428>,
|
||||
<&mmss_smmu 0x429>,
|
||||
<&mmss_smmu 0x42b>,
|
||||
<&mmss_smmu 0x42c>,
|
||||
<&mmss_smmu 0x42d>,
|
||||
<&mmss_smmu 0x411>,
|
||||
<&mmss_smmu 0x431>;
|
||||
memory-region = <&venus_region>;
|
||||
power-domains = <&mmcc VENUS_GDSC>;
|
||||
video-codec@cc00000 {
|
||||
compatible = "qcom,sdm660-venus";
|
||||
reg = <0x0cc00000 0xff000>;
|
||||
clocks = <&mmcc VIDEO_CORE_CLK>,
|
||||
<&mmcc VIDEO_AHB_CLK>,
|
||||
<&mmcc VIDEO_AXI_CLK>,
|
||||
<&mmcc THROTTLE_VIDEO_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus", "bus_throttle";
|
||||
interconnects = <&gnoc 0 &mnoc 13>,
|
||||
<&mnoc 4 &bimc 5>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&mmss_smmu 0x400>,
|
||||
<&mmss_smmu 0x401>,
|
||||
<&mmss_smmu 0x40a>,
|
||||
<&mmss_smmu 0x407>,
|
||||
<&mmss_smmu 0x40e>,
|
||||
<&mmss_smmu 0x40f>,
|
||||
<&mmss_smmu 0x408>,
|
||||
<&mmss_smmu 0x409>,
|
||||
<&mmss_smmu 0x40b>,
|
||||
<&mmss_smmu 0x40c>,
|
||||
<&mmss_smmu 0x40d>,
|
||||
<&mmss_smmu 0x410>,
|
||||
<&mmss_smmu 0x421>,
|
||||
<&mmss_smmu 0x428>,
|
||||
<&mmss_smmu 0x429>,
|
||||
<&mmss_smmu 0x42b>,
|
||||
<&mmss_smmu 0x42c>,
|
||||
<&mmss_smmu 0x42d>,
|
||||
<&mmss_smmu 0x411>,
|
||||
<&mmss_smmu 0x431>;
|
||||
memory-region = <&venus_region>;
|
||||
power-domains = <&mmcc VENUS_GDSC>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "vcodec0_core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "vcodec0_core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "vcodec0_core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "vcodec0_core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,11 +1,10 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SDM845 Venus v2 video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
@@ -111,36 +110,36 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
|
||||
|
||||
video-codec@aa00000 {
|
||||
compatible = "qcom,sdm845-venus-v2";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus",
|
||||
"vcodec0_core", "vcodec0_bus",
|
||||
"vcodec1_core", "vcodec1_bus";
|
||||
power-domains = <&videocc VENUS_GDSC>,
|
||||
<&videocc VCODEC0_GDSC>,
|
||||
<&videocc VCODEC1_GDSC>;
|
||||
power-domain-names = "venus", "vcodec0", "vcodec1";
|
||||
iommus = <&apps_smmu 0x10a0 0x8>,
|
||||
<&apps_smmu 0x10b0 0x0>;
|
||||
memory-region = <&venus_mem>;
|
||||
video-codec@aa00000 {
|
||||
compatible = "qcom,sdm845-venus-v2";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus",
|
||||
"vcodec0_core", "vcodec0_bus",
|
||||
"vcodec1_core", "vcodec1_bus";
|
||||
power-domains = <&videocc VENUS_GDSC>,
|
||||
<&videocc VCODEC0_GDSC>,
|
||||
<&videocc VCODEC1_GDSC>;
|
||||
power-domain-names = "venus", "vcodec0", "vcodec1";
|
||||
iommus = <&apps_smmu 0x10a0 0x8>,
|
||||
<&apps_smmu 0x10b0 0x0>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-core0 {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-core1 {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
video-core0 {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-core1 {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,11 +1,10 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SDM845 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
@@ -125,35 +124,35 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
|
||||
|
||||
video-codec@aa00000 {
|
||||
compatible = "qcom,sdm845-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus";
|
||||
power-domains = <&videocc VENUS_GDSC>;
|
||||
iommus = <&apps_smmu 0x10a0 0x8>,
|
||||
<&apps_smmu 0x10b0 0x0>;
|
||||
memory-region = <&venus_mem>;
|
||||
video-codec@aa00000 {
|
||||
compatible = "qcom,sdm845-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus";
|
||||
power-domains = <&videocc VENUS_GDSC>;
|
||||
iommus = <&apps_smmu 0x10a0 0x8>,
|
||||
<&apps_smmu 0x10b0 0x0>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-core0 {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
|
||||
clock-names = "core", "bus";
|
||||
power-domains = <&videocc VCODEC0_GDSC>;
|
||||
};
|
||||
|
||||
video-core1 {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
|
||||
clock-names = "core", "bus";
|
||||
power-domains = <&videocc VCODEC1_GDSC>;
|
||||
};
|
||||
video-core0 {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
|
||||
clock-names = "core", "bus";
|
||||
power-domains = <&videocc VCODEC0_GDSC>;
|
||||
};
|
||||
|
||||
video-core1 {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
|
||||
clock-names = "core", "bus";
|
||||
power-domains = <&videocc VCODEC1_GDSC>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,11 +1,10 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SM8250 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
@@ -126,42 +125,42 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sm8250.h>
|
||||
#include <dt-bindings/interconnect/qcom,sm8250.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-sm8250.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sm8250.h>
|
||||
#include <dt-bindings/interconnect/qcom,sm8250.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-sm8250.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sm8250-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&videocc MVS0C_GDSC>,
|
||||
<&videocc MVS0_GDSC>,
|
||||
<&rpmhpd SM8250_MX>;
|
||||
power-domain-names = "venus", "vcodec0", "mx";
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sm8250-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&videocc MVS0C_GDSC>,
|
||||
<&videocc MVS0_GDSC>,
|
||||
<&rpmhpd SM8250_MX>;
|
||||
power-domain-names = "venus", "vcodec0", "mx";
|
||||
|
||||
clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK>;
|
||||
clock-names = "iface", "core", "vcodec0_core";
|
||||
clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK>;
|
||||
clock-names = "iface", "core", "vcodec0_core";
|
||||
|
||||
interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
|
||||
<&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
|
||||
<&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
|
||||
iommus = <&apps_smmu 0x2100 0x0400>;
|
||||
memory-region = <&video_mem>;
|
||||
iommus = <&apps_smmu 0x2100 0x0400>;
|
||||
memory-region = <&video_mem>;
|
||||
|
||||
resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK_ARES>;
|
||||
reset-names = "bus", "core";
|
||||
resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK_ARES>;
|
||||
reset-names = "bus", "core";
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user