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net: dsa: b53: mmap: Add syscon reference and register layout for bcm63268

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On bcm63xx SoCs there are registers that control the PHYs in
the GPIO controller. Allow the b53 driver to access them
by passing in the syscon through the device tree.

Add a structure to describe the ephy control register
and add register info for bcm63268.

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/20250724035300.20497-5-kylehendrydev@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Kyle Hendry
2025-07-23 20:52:43 -07:00
committed by Jakub Kicinski
parent fcf02a462f
commit aed2aaa3c9
1 changed files with 25 additions and 0 deletions
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25
drivers/net/dsa/b53/b53_mmap.c
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@@ -21,13 +21,32 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/io.h>
#include <linux/mfd/syscon.h>
#include <linux/platform_device.h>
#include <linux/platform_data/b53.h>
#include "b53_priv.h"
struct b53_phy_info {
u32 ephy_enable_mask;
u32 ephy_port_mask;
u32 ephy_bias_bit;
const u32 *ephy_offset;
};
struct b53_mmap_priv {
void __iomem *regs;
struct regmap *gpio_ctrl;
const struct b53_phy_info *phy_info;
};
static const u32 bcm63268_ephy_offsets[] = {4, 9, 14};
static const struct b53_phy_info bcm63268_ephy_info = {
.ephy_enable_mask = GENMASK(4, 0),
.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm63268_ephy_offsets) - 1), 0),
.ephy_bias_bit = 24,
.ephy_offset = bcm63268_ephy_offsets,
};
static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
@@ -313,6 +332,12 @@ static int b53_mmap_probe(struct platform_device *pdev)
priv->regs = pdata->regs;
priv->gpio_ctrl = syscon_regmap_lookup_by_phandle(np, "brcm,gpio-ctrl");
if (!IS_ERR(priv->gpio_ctrl)) {
if (pdata->chip_id == BCM63268_DEVICE_ID)
priv->phy_info = &bcm63268_ephy_info;
}
dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, priv);
if (!dev)
return -ENOMEM;