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arm64: dts: marvell: add missing cache properties

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As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

  ac5-98dx35xx-rd.dtb: l2-cache: 'cache-unified' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Krzysztof Kozlowski
2023-04-22 00:31:59 +02:00
committed by Gregory CLEMENT
parent ac9a78681b
commit ae1c0d6eb4
4 changed files with 6 additions and 0 deletions
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1
arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
View File

@@ -50,6 +50,7 @@ cpu1: cpu@1 {
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

1
arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
View File

@@ -52,6 +52,7 @@ l2: l2-cache {
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
cache-unified;
};
};

2
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
View File

@@ -82,6 +82,7 @@ l2_0: l2-cache0 {
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
cache-unified;
};
l2_1: l2-cache1 {
@@ -90,6 +91,7 @@ l2_1: l2-cache1 {
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
cache-unified;
};
};
};

2
arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
View File

@@ -82,6 +82,7 @@ l2_0: l2-cache0 {
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
cache-unified;
};
l2_1: l2-cache1 {
@@ -90,6 +91,7 @@ l2_1: l2-cache1 {
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
cache-unified;
};
};
};