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bpf: Allow instructions with arena source and non-arena dest registers
The compiler sometimes stores the result of a PTR_TO_ARENA and SCALAR
operation into the scalar register rather than the pointer register.
Relax the verifier to allow operations between a source arena register
and a destination non-arena register, marking the destination's value
as a PTR_TO_ARENA.
Signed-off-by: Emil Tsalapatis <emil@etsalapatis.com>
Acked-by: Song Liu <song@kernel.org>
Fixes: 6082b6c328 ("bpf: Recognize addr_space_cast instruction in the verifier.")
Link: https://lore.kernel.org/r/20260412174546.18684-2-emil@etsalapatis.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
This commit is contained in:
committed by
Alexei Starovoitov
parent
9623c3c69e
commit
ac61bffe91
@@ -15051,11 +15051,20 @@ static int adjust_reg_min_max_vals(struct bpf_verifier_env *env,
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int err;
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dst_reg = ®s[insn->dst_reg];
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src_reg = NULL;
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if (BPF_SRC(insn->code) == BPF_X)
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src_reg = ®s[insn->src_reg];
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else
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src_reg = NULL;
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if (dst_reg->type == PTR_TO_ARENA) {
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/* Case where at least one operand is an arena. */
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if (dst_reg->type == PTR_TO_ARENA || (src_reg && src_reg->type == PTR_TO_ARENA)) {
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struct bpf_insn_aux_data *aux = cur_aux(env);
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if (dst_reg->type != PTR_TO_ARENA)
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*dst_reg = *src_reg;
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dst_reg->subreg_def = env->insn_idx + 1;
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if (BPF_CLASS(insn->code) == BPF_ALU64)
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/*
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* 32-bit operations zero upper bits automatically.
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@@ -15071,7 +15080,6 @@ static int adjust_reg_min_max_vals(struct bpf_verifier_env *env,
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ptr_reg = dst_reg;
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if (BPF_SRC(insn->code) == BPF_X) {
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src_reg = ®s[insn->src_reg];
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if (src_reg->type != SCALAR_VALUE) {
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if (dst_reg->type != SCALAR_VALUE) {
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/* Combining two pointers by any ALU op yields
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