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@@ -253,7 +253,7 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
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fxp_q4_to_frac(bpp_step_x16)));
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if (is_mst) {
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mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst_mgr);
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mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst.mgr);
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if (IS_ERR(mst_state))
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return PTR_ERR(mst_state);
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@@ -355,7 +355,7 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
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drm_WARN_ON(display->drm, remote_tu < crtc_state->dp_m_n.tu);
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crtc_state->dp_m_n.tu = remote_tu;
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slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
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slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst.mgr,
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connector->port,
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dfixed_trunc(pbn));
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} else {
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@@ -479,7 +479,7 @@ static int mst_stream_update_slots(struct intel_dp *intel_dp,
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struct drm_connector_state *conn_state)
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{
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struct intel_display *display = to_intel_display(intel_dp);
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struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
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struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst.mgr;
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struct drm_dp_mst_topology_state *topology_state;
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u8 link_coding_cap = intel_dp_is_uhbr(crtc_state) ?
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DP_CAP_ANSI_128B132B : DP_CAP_ANSI_8B10B;
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@@ -769,7 +769,7 @@ static u8 get_pipes_downstream_of_mst_port(struct intel_atomic_state *state,
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if (!conn_state->base.crtc)
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continue;
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if (&connector->mst_port->mst_mgr != mst_mgr)
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if (&connector->mst_port->mst.mgr != mst_mgr)
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continue;
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if (connector->port != parent_port &&
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@@ -981,7 +981,7 @@ mst_connector_atomic_check(struct drm_connector *_connector,
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}
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return drm_dp_atomic_release_time_slots(&state->base,
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&connector->mst_port->mst_mgr,
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&connector->mst_port->mst.mgr,
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connector->port);
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}
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@@ -998,9 +998,9 @@ static void mst_stream_disable(struct intel_atomic_state *state,
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enum transcoder trans = old_crtc_state->cpu_transcoder;
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drm_dbg_kms(display->drm, "active links %d\n",
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intel_dp->active_mst_links);
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intel_dp->mst.active_links);
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if (intel_dp->active_mst_links == 1)
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if (intel_dp->mst.active_links == 1)
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intel_dp->link_trained = false;
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intel_hdcp_disable(intel_mst->connector);
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@@ -1023,9 +1023,9 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
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struct intel_connector *connector =
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to_intel_connector(old_conn_state->connector);
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struct drm_dp_mst_topology_state *old_mst_state =
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drm_atomic_get_old_mst_topology_state(&state->base, &intel_dp->mst_mgr);
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drm_atomic_get_old_mst_topology_state(&state->base, &intel_dp->mst.mgr);
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struct drm_dp_mst_topology_state *new_mst_state =
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drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst_mgr);
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drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst.mgr);
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const struct drm_dp_mst_atomic_payload *old_payload =
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drm_atomic_get_mst_payload_state(old_mst_state, connector->port);
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struct drm_dp_mst_atomic_payload *new_payload =
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@@ -1034,8 +1034,8 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
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bool last_mst_stream;
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int i;
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intel_dp->active_mst_links--;
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last_mst_stream = intel_dp->active_mst_links == 0;
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intel_dp->mst.active_links--;
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last_mst_stream = intel_dp->mst.active_links == 0;
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drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 12 && last_mst_stream &&
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!intel_dp_mst_is_master_trans(old_crtc_state));
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@@ -1048,7 +1048,7 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
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intel_disable_transcoder(old_crtc_state);
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drm_dp_remove_payload_part1(&intel_dp->mst_mgr, new_mst_state, new_payload);
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drm_dp_remove_payload_part1(&intel_dp->mst.mgr, new_mst_state, new_payload);
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intel_ddi_clear_act_sent(encoder, old_crtc_state);
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@@ -1057,9 +1057,9 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
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TRANS_DDI_DP_VC_PAYLOAD_ALLOC, 0);
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intel_ddi_wait_for_act_sent(encoder, old_crtc_state);
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drm_dp_check_act_status(&intel_dp->mst_mgr);
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drm_dp_check_act_status(&intel_dp->mst.mgr);
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drm_dp_remove_payload_part2(&intel_dp->mst_mgr, new_mst_state,
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drm_dp_remove_payload_part2(&intel_dp->mst.mgr, new_mst_state,
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old_payload, new_payload);
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intel_ddi_disable_transcoder_func(old_crtc_state);
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@@ -1080,7 +1080,7 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
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* Power down mst path before disabling the port, otherwise we end
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* up getting interrupts from the sink upon detecting link loss.
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*/
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drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
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drm_dp_send_power_updown_phy(&intel_dp->mst.mgr, connector->port,
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false);
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/*
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@@ -1105,7 +1105,7 @@ static void mst_stream_post_disable(struct intel_atomic_state *state,
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old_crtc_state, NULL);
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drm_dbg_kms(display->drm, "active links %d\n",
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intel_dp->active_mst_links);
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intel_dp->mst.active_links);
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}
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static void mst_stream_post_pll_disable(struct intel_atomic_state *state,
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@@ -1116,7 +1116,7 @@ static void mst_stream_post_pll_disable(struct intel_atomic_state *state,
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struct intel_encoder *primary_encoder = to_primary_encoder(encoder);
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struct intel_dp *intel_dp = to_primary_dp(encoder);
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if (intel_dp->active_mst_links == 0 &&
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if (intel_dp->mst.active_links == 0 &&
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primary_encoder->post_pll_disable)
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primary_encoder->post_pll_disable(state, primary_encoder, old_crtc_state, old_conn_state);
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}
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|
@@ -1129,7 +1129,7 @@ static void mst_stream_pre_pll_enable(struct intel_atomic_state *state,
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struct intel_encoder *primary_encoder = to_primary_encoder(encoder);
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struct intel_dp *intel_dp = to_primary_dp(encoder);
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if (intel_dp->active_mst_links == 0)
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if (intel_dp->mst.active_links == 0)
|
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primary_encoder->pre_pll_enable(state, primary_encoder,
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pipe_config, NULL);
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else
|
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|
@@ -1162,7 +1162,7 @@ static void intel_mst_reprobe_topology(struct intel_dp *intel_dp,
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crtc_state->port_clock, crtc_state->lane_count))
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return;
|
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drm_dp_mst_topology_queue_probe(&intel_dp->mst_mgr);
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drm_dp_mst_topology_queue_probe(&intel_dp->mst.mgr);
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intel_mst_set_probed_link_params(intel_dp,
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|
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crtc_state->port_clock, crtc_state->lane_count);
|
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|
@@ -1180,7 +1180,7 @@ static void mst_stream_pre_enable(struct intel_atomic_state *state,
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struct intel_connector *connector =
|
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to_intel_connector(conn_state->connector);
|
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|
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struct drm_dp_mst_topology_state *mst_state =
|
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|
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drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst_mgr);
|
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|
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drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst.mgr);
|
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|
|
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int ret;
|
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|
|
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bool first_mst_stream;
|
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|
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|
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|
|
@@ -1189,17 +1189,17 @@ static void mst_stream_pre_enable(struct intel_atomic_state *state,
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*/
|
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|
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connector->encoder = encoder;
|
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|
|
intel_mst->connector = connector;
|
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|
|
first_mst_stream = intel_dp->active_mst_links == 0;
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|
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first_mst_stream = intel_dp->mst.active_links == 0;
|
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|
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drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 12 && first_mst_stream &&
|
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|
|
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!intel_dp_mst_is_master_trans(pipe_config));
|
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|
|
|
|
|
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|
|
drm_dbg_kms(display->drm, "active links %d\n",
|
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|
|
|
intel_dp->active_mst_links);
|
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|
|
intel_dp->mst.active_links);
|
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|
|
|
|
|
|
|
|
if (first_mst_stream)
|
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|
|
intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
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|
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|
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|
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drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
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drm_dp_send_power_updown_phy(&intel_dp->mst.mgr, connector->port, true);
|
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|
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|
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intel_dp_sink_enable_decompression(state, connector, pipe_config);
|
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|
|
|
|
|
|
|
@@ -1210,9 +1210,9 @@ static void mst_stream_pre_enable(struct intel_atomic_state *state,
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intel_mst_reprobe_topology(intel_dp, pipe_config);
|
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|
|
|
}
|
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|
|
|
|
|
|
|
|
intel_dp->active_mst_links++;
|
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|
|
|
intel_dp->mst.active_links++;
|
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|
|
|
|
|
|
|
|
ret = drm_dp_add_payload_part1(&intel_dp->mst_mgr, mst_state,
|
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|
|
|
ret = drm_dp_add_payload_part1(&intel_dp->mst.mgr, mst_state,
|
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|
|
|
drm_atomic_get_mst_payload_state(mst_state, connector->port));
|
|
|
|
|
if (ret < 0)
|
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|
|
|
intel_dp_queue_modeset_retry_for_link(state, primary_encoder, pipe_config);
|
|
|
|
|
@@ -1277,9 +1277,9 @@ static void mst_stream_enable(struct intel_atomic_state *state,
|
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|
|
struct intel_dp *intel_dp = to_primary_dp(encoder);
|
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|
|
|
struct intel_connector *connector = to_intel_connector(conn_state->connector);
|
|
|
|
|
struct drm_dp_mst_topology_state *mst_state =
|
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|
|
|
drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst_mgr);
|
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|
|
|
drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst.mgr);
|
|
|
|
|
enum transcoder trans = pipe_config->cpu_transcoder;
|
|
|
|
|
bool first_mst_stream = intel_dp->active_mst_links == 1;
|
|
|
|
|
bool first_mst_stream = intel_dp->mst.active_links == 1;
|
|
|
|
|
struct intel_crtc *pipe_crtc;
|
|
|
|
|
int ret, i, min_hblank;
|
|
|
|
|
|
|
|
|
|
@@ -1329,15 +1329,15 @@ static void mst_stream_enable(struct intel_atomic_state *state,
|
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|
|
TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
|
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|
|
|
|
|
|
|
|
drm_dbg_kms(display->drm, "active links %d\n",
|
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|
|
|
intel_dp->active_mst_links);
|
|
|
|
|
intel_dp->mst.active_links);
|
|
|
|
|
|
|
|
|
|
intel_ddi_wait_for_act_sent(encoder, pipe_config);
|
|
|
|
|
drm_dp_check_act_status(&intel_dp->mst_mgr);
|
|
|
|
|
drm_dp_check_act_status(&intel_dp->mst.mgr);
|
|
|
|
|
|
|
|
|
|
if (first_mst_stream)
|
|
|
|
|
intel_ddi_wait_for_fec_status(encoder, pipe_config, true);
|
|
|
|
|
|
|
|
|
|
ret = drm_dp_add_payload_part2(&intel_dp->mst_mgr,
|
|
|
|
|
ret = drm_dp_add_payload_part2(&intel_dp->mst.mgr,
|
|
|
|
|
drm_atomic_get_mst_payload_state(mst_state,
|
|
|
|
|
connector->port));
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
@@ -1402,7 +1402,7 @@ static int mst_connector_get_ddc_modes(struct drm_connector *_connector)
|
|
|
|
|
if (!intel_display_driver_check_access(display))
|
|
|
|
|
return drm_edid_connector_add_modes(&connector->base);
|
|
|
|
|
|
|
|
|
|
drm_edid = drm_dp_mst_edid_read(&connector->base, &intel_dp->mst_mgr, connector->port);
|
|
|
|
|
drm_edid = drm_dp_mst_edid_read(&connector->base, &intel_dp->mst.mgr, connector->port);
|
|
|
|
|
|
|
|
|
|
ret = intel_connector_update_modes(&connector->base, drm_edid);
|
|
|
|
|
|
|
|
|
|
@@ -1464,7 +1464,7 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
|
|
|
|
|
struct intel_connector *connector = to_intel_connector(_connector);
|
|
|
|
|
struct intel_display *display = to_intel_display(connector);
|
|
|
|
|
struct intel_dp *intel_dp = connector->mst_port;
|
|
|
|
|
struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
|
|
|
|
|
struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst.mgr;
|
|
|
|
|
struct drm_dp_mst_port *port = connector->port;
|
|
|
|
|
const int min_bpp = 18;
|
|
|
|
|
int max_dotclk = display->cdclk.max_dotclk_freq;
|
|
|
|
|
@@ -1579,7 +1579,7 @@ mst_connector_atomic_best_encoder(struct drm_connector *_connector,
|
|
|
|
|
struct intel_dp *intel_dp = connector->mst_port;
|
|
|
|
|
struct intel_crtc *crtc = to_intel_crtc(connector_state->crtc);
|
|
|
|
|
|
|
|
|
|
return &intel_dp->mst_encoders[crtc->pipe]->base.base;
|
|
|
|
|
return &intel_dp->mst.stream_encoders[crtc->pipe]->base.base;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
@@ -1601,7 +1601,7 @@ mst_connector_detect_ctx(struct drm_connector *_connector,
|
|
|
|
|
|
|
|
|
|
intel_dp_flush_connector_commits(connector);
|
|
|
|
|
|
|
|
|
|
return drm_dp_mst_detect_port(&connector->base, ctx, &intel_dp->mst_mgr,
|
|
|
|
|
return drm_dp_mst_detect_port(&connector->base, ctx, &intel_dp->mst.mgr,
|
|
|
|
|
connector->port);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
@@ -1731,7 +1731,7 @@ mst_topology_add_connector(struct drm_dp_mst_topology_mgr *mgr,
|
|
|
|
|
struct drm_dp_mst_port *port,
|
|
|
|
|
const char *pathprop)
|
|
|
|
|
{
|
|
|
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struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
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struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst.mgr);
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struct intel_display *display = to_intel_display(intel_dp);
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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struct intel_connector *connector;
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@@ -1762,7 +1762,7 @@ mst_topology_add_connector(struct drm_dp_mst_topology_mgr *mgr,
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for_each_pipe(display, pipe) {
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struct drm_encoder *enc =
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&intel_dp->mst_encoders[pipe]->base.base;
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&intel_dp->mst.stream_encoders[pipe]->base.base;
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ret = drm_connector_attach_encoder(&connector->base, enc);
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if (ret)
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@@ -1792,7 +1792,7 @@ mst_topology_add_connector(struct drm_dp_mst_topology_mgr *mgr,
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static void
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mst_topology_poll_hpd_irq(struct drm_dp_mst_topology_mgr *mgr)
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{
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struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
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struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst.mgr);
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intel_hpd_trigger_irq(dp_to_dig_port(intel_dp));
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}
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@@ -1865,14 +1865,14 @@ mst_stream_encoders_create(struct intel_digital_port *dig_port)
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enum pipe pipe;
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for_each_pipe(display, pipe)
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intel_dp->mst_encoders[pipe] = mst_stream_encoder_create(dig_port, pipe);
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intel_dp->mst.stream_encoders[pipe] = mst_stream_encoder_create(dig_port, pipe);
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return true;
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}
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int
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intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port)
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{
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return dig_port->dp.active_mst_links;
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return dig_port->dp.mst.active_links;
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}
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int
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@@ -1892,15 +1892,15 @@ intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_base_id)
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if (DISPLAY_VER(display) < 11 && port == PORT_E)
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return 0;
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intel_dp->mst_mgr.cbs = &mst_topology_cbs;
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intel_dp->mst.mgr.cbs = &mst_topology_cbs;
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/* create encoders */
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mst_stream_encoders_create(dig_port);
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ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, display->drm,
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ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst.mgr, display->drm,
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&intel_dp->aux, 16,
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INTEL_NUM_PIPES(display), conn_base_id);
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if (ret) {
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intel_dp->mst_mgr.cbs = NULL;
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intel_dp->mst.mgr.cbs = NULL;
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return ret;
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}
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@@ -1909,7 +1909,7 @@ intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_base_id)
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bool intel_dp_mst_source_support(struct intel_dp *intel_dp)
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{
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return intel_dp->mst_mgr.cbs;
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return intel_dp->mst.mgr.cbs;
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}
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void
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@@ -1920,10 +1920,10 @@ intel_dp_mst_encoder_cleanup(struct intel_digital_port *dig_port)
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if (!intel_dp_mst_source_support(intel_dp))
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return;
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drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
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drm_dp_mst_topology_mgr_destroy(&intel_dp->mst.mgr);
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/* encoders will get killed by normal cleanup */
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intel_dp->mst_mgr.cbs = NULL;
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intel_dp->mst.mgr.cbs = NULL;
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}
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bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
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@@ -1958,7 +1958,7 @@ intel_dp_mst_add_topology_state_for_connector(struct intel_atomic_state *state,
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return 0;
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mst_state = drm_atomic_get_mst_topology_state(&state->base,
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&connector->mst_port->mst_mgr);
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&connector->mst_port->mst.mgr);
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if (IS_ERR(mst_state))
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return PTR_ERR(mst_state);
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@@ -2140,7 +2140,7 @@ bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp)
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if (!intel_dp->is_mst)
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return true;
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ret = drm_dp_dpcd_readb(intel_dp->mst_mgr.aux, DP_MSTM_CTRL, &val);
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ret = drm_dp_dpcd_readb(intel_dp->mst.mgr.aux, DP_MSTM_CTRL, &val);
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/* Adjust the expected register value for SST + SideBand. */
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if (ret < 0 || val != (DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC)) {
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