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drm/amd/display: Fix eDP receiver ready status check in T7 sequence

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[Why]
Some eDP panels return sinkstatus as 0x5, causing the original sinkstatus == 1
check to never match and resulting in unnecessary polling delay. The
equality check is too restrictive and doesn't properly validate the
specific status bit that indicates receiver readiness.

[How]
Replace direct value comparison with proper bitmask check using
DP_RECEIVE_PORT_0_STATUS constant.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Sung-huai Wang <Danny.Wang@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sung-huai Wang
2026-04-21 12:53:56 +08:00
committed by Alex Deucher
parent 67fb68996c
commit ab5c6213cf
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
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@@ -462,7 +462,7 @@ bool edp_receiver_ready_T9(struct dc_link *link)
do {
sinkstatus = 1;
result = core_link_read_dpcd(link, DP_SINK_STATUS, &sinkstatus, sizeof(sinkstatus));
if (sinkstatus == 0)
if (!(sinkstatus & DP_RECEIVE_PORT_0_STATUS))
break;
if (result != DC_OK)
break;
@@ -492,7 +492,7 @@ bool edp_receiver_ready_T7(struct dc_link *link)
do {
sinkstatus = 0;
result = core_link_read_dpcd(link, DP_SINK_STATUS, &sinkstatus, sizeof(sinkstatus));
if (sinkstatus == 1)
if (sinkstatus & DP_RECEIVE_PORT_0_STATUS)
break;
if (result != DC_OK)
break;