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net/mlx5e: SHAMPO, Rework header allocation loop
The current loop code was based on the assumption that there can be page leftovers from previous function calls. This patch changes the allocation loop to make it clearer how pages get allocated every MLX5E_SHAMPO_WQ_HEADER_PER_PAGE headers. This change has no functional implications. Signed-off-by: Dragos Tatulea <dtatulea@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20241107194357.683732-13-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
committed by
Jakub Kicinski
parent
945ca432bf
commit
ab4219db89
@@ -666,8 +666,7 @@ static int mlx5e_build_shampo_hd_umr(struct mlx5e_rq *rq,
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u16 pi, header_offset, err, wqe_bbs;
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u32 lkey = rq->mdev->mlx5e_res.hw_objs.mkey;
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struct mlx5e_umr_wqe *umr_wqe;
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int headroom, i;
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u64 addr = 0;
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int headroom, i = 0;
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headroom = rq->buff.headroom;
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wqe_bbs = MLX5E_KSM_UMR_WQEBBS(ksm_entries);
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@@ -676,22 +675,25 @@ static int mlx5e_build_shampo_hd_umr(struct mlx5e_rq *rq,
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build_ksm_umr(sq, umr_wqe, shampo->key, index, ksm_entries);
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WARN_ON_ONCE(ksm_entries & (MLX5E_SHAMPO_WQ_HEADER_PER_PAGE - 1));
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for (i = 0; i < ksm_entries; i++, index++) {
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header_offset = mlx5e_shampo_hd_offset(index);
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if (!header_offset) {
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struct mlx5e_frag_page *frag_page = mlx5e_shampo_hd_to_frag_page(rq, index);
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while (i < ksm_entries) {
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struct mlx5e_frag_page *frag_page = mlx5e_shampo_hd_to_frag_page(rq, index);
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u64 addr;
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err = mlx5e_page_alloc_fragmented(rq, frag_page);
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if (unlikely(err))
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goto err_unmap;
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err = mlx5e_page_alloc_fragmented(rq, frag_page);
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if (unlikely(err))
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goto err_unmap;
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addr = page_pool_get_dma_addr(frag_page->page);
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addr = page_pool_get_dma_addr(frag_page->page);
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for (int j = 0; j < MLX5E_SHAMPO_WQ_HEADER_PER_PAGE; j++) {
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header_offset = mlx5e_shampo_hd_offset(index++);
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umr_wqe->inline_ksms[i++] = (struct mlx5_ksm) {
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.key = cpu_to_be32(lkey),
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.va = cpu_to_be64(addr + header_offset + headroom),
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};
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}
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umr_wqe->inline_ksms[i] = (struct mlx5_ksm) {
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.key = cpu_to_be32(lkey),
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.va = cpu_to_be64(addr + header_offset + headroom),
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};
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}
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sq->db.wqe_info[pi] = (struct mlx5e_icosq_wqe_info) {
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