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Merge branch 'bnxt-ptp-optimizations'

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Pavan Chebbi says:

====================
bnxt PTP optimizations

Patches to
1. Enforce software based freq adjustments only on shared PHC NIC

2. A prerequisite change to expand capability storage field to
   accommodate more Firmware reported capabilities
====================

Link: https://lore.kernel.org/r/20230321144449.15289-1-pavan.chebbi@broadcom.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
2023-03-22 20:42:31 -07:00
parent 5c5945dc69 a02c331307
commit aab3c0a206
3 changed files with 42 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/net/ethernet/broadcom/bnxt/bnxt.c
View File

@@ -7769,7 +7769,7 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
if (flags & FUNC_QCAPS_RESP_FLAGS_WOL_MAGICPKT_SUPPORTED)
bp->flags |= BNXT_FLAG_WOL_CAP;
if (flags & FUNC_QCAPS_RESP_FLAGS_PTP_SUPPORTED) {
__bnxt_hwrm_ptp_qcfg(bp);
bp->fw_cap |= BNXT_FW_CAP_PTP;
} else {
bnxt_ptp_clear(bp);
kfree(bp->ptp_cfg);
@@ -12298,6 +12298,8 @@ static int bnxt_fw_init_one_p2(struct bnxt *bp)
bnxt_hwrm_vnic_qcaps(bp);
bnxt_hwrm_port_led_qcaps(bp);
bnxt_ethtool_init(bp);
if (bp->fw_cap & BNXT_FW_CAP_PTP)
__bnxt_hwrm_ptp_qcfg(bp);
bnxt_dcb_init(bp);
return 0;
}

57
drivers/net/ethernet/broadcom/bnxt/bnxt.h
View File

@@ -1968,34 +1968,35 @@ struct bnxt {
u32 msg_enable;
u32 fw_cap;
#define BNXT_FW_CAP_SHORT_CMD 0x00000001
#define BNXT_FW_CAP_LLDP_AGENT 0x00000002
#define BNXT_FW_CAP_DCBX_AGENT 0x00000004
#define BNXT_FW_CAP_NEW_RM 0x00000008
#define BNXT_FW_CAP_IF_CHANGE 0x00000010
#define BNXT_FW_CAP_KONG_MB_CHNL 0x00000080
#define BNXT_FW_CAP_OVS_64BIT_HANDLE 0x00000400
#define BNXT_FW_CAP_TRUSTED_VF 0x00000800
#define BNXT_FW_CAP_ERROR_RECOVERY 0x00002000
#define BNXT_FW_CAP_PKG_VER 0x00004000
#define BNXT_FW_CAP_CFA_ADV_FLOW 0x00008000
#define BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2 0x00010000
#define BNXT_FW_CAP_PCIE_STATS_SUPPORTED 0x00020000
#define BNXT_FW_CAP_EXT_STATS_SUPPORTED 0x00040000
#define BNXT_FW_CAP_RSS_HASH_TYPE_DELTA 0x00080000
#define BNXT_FW_CAP_ERR_RECOVER_RELOAD 0x00100000
#define BNXT_FW_CAP_HOT_RESET 0x00200000
#define BNXT_FW_CAP_PTP_RTC 0x00400000
#define BNXT_FW_CAP_RX_ALL_PKT_TS 0x00800000
#define BNXT_FW_CAP_VLAN_RX_STRIP 0x01000000
#define BNXT_FW_CAP_VLAN_TX_INSERT 0x02000000
#define BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED 0x04000000
#define BNXT_FW_CAP_LIVEPATCH 0x08000000
#define BNXT_FW_CAP_PTP_PPS 0x10000000
#define BNXT_FW_CAP_HOT_RESET_IF 0x20000000
#define BNXT_FW_CAP_RING_MONITOR 0x40000000
#define BNXT_FW_CAP_DBG_QCAPS 0x80000000
u64 fw_cap;
#define BNXT_FW_CAP_SHORT_CMD BIT_ULL(0)
#define BNXT_FW_CAP_LLDP_AGENT BIT_ULL(1)
#define BNXT_FW_CAP_DCBX_AGENT BIT_ULL(2)
#define BNXT_FW_CAP_NEW_RM BIT_ULL(3)
#define BNXT_FW_CAP_IF_CHANGE BIT_ULL(4)
#define BNXT_FW_CAP_KONG_MB_CHNL BIT_ULL(7)
#define BNXT_FW_CAP_OVS_64BIT_HANDLE BIT_ULL(10)
#define BNXT_FW_CAP_TRUSTED_VF BIT_ULL(11)
#define BNXT_FW_CAP_ERROR_RECOVERY BIT_ULL(13)
#define BNXT_FW_CAP_PKG_VER BIT_ULL(14)
#define BNXT_FW_CAP_CFA_ADV_FLOW BIT_ULL(15)
#define BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2 BIT_ULL(16)
#define BNXT_FW_CAP_PCIE_STATS_SUPPORTED BIT_ULL(17)
#define BNXT_FW_CAP_EXT_STATS_SUPPORTED BIT_ULL(18)
#define BNXT_FW_CAP_RSS_HASH_TYPE_DELTA BIT_ULL(19)
#define BNXT_FW_CAP_ERR_RECOVER_RELOAD BIT_ULL(20)
#define BNXT_FW_CAP_HOT_RESET BIT_ULL(21)
#define BNXT_FW_CAP_PTP_RTC BIT_ULL(22)
#define BNXT_FW_CAP_RX_ALL_PKT_TS BIT_ULL(23)
#define BNXT_FW_CAP_VLAN_RX_STRIP BIT_ULL(24)
#define BNXT_FW_CAP_VLAN_TX_INSERT BIT_ULL(25)
#define BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED BIT_ULL(26)
#define BNXT_FW_CAP_LIVEPATCH BIT_ULL(27)
#define BNXT_FW_CAP_PTP_PPS BIT_ULL(28)
#define BNXT_FW_CAP_HOT_RESET_IF BIT_ULL(29)
#define BNXT_FW_CAP_RING_MONITOR BIT_ULL(30)
#define BNXT_FW_CAP_DBG_QCAPS BIT_ULL(31)
#define BNXT_FW_CAP_PTP BIT_ULL(32)
u32 fw_dbg_cap;

14
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
View File

@@ -230,7 +230,7 @@ static int bnxt_ptp_adjfine(struct ptp_clock_info *ptp_info, long scaled_ppm)
ptp_info);
struct bnxt *bp = ptp->bp;
if (BNXT_PTP_USE_RTC(bp))
if (!BNXT_MH(bp))
return bnxt_ptp_adjfine_rtc(bp, scaled_ppm);
spin_lock_bh(&ptp->ptp_lock);
@@ -861,9 +861,15 @@ static void bnxt_ptp_timecounter_init(struct bnxt *bp, bool init_tc)
memset(&ptp->cc, 0, sizeof(ptp->cc));
ptp->cc.read = bnxt_cc_read;
ptp->cc.mask = CYCLECOUNTER_MASK(48);
ptp->cc.shift = BNXT_CYCLES_SHIFT;
ptp->cc.mult = clocksource_khz2mult(BNXT_DEVCLK_FREQ, ptp->cc.shift);
ptp->cmult = ptp->cc.mult;
if (BNXT_MH(bp)) {
/* Use timecounter based non-real time mode */
ptp->cc.shift = BNXT_CYCLES_SHIFT;
ptp->cc.mult = clocksource_khz2mult(BNXT_DEVCLK_FREQ, ptp->cc.shift);
ptp->cmult = ptp->cc.mult;
} else {
ptp->cc.shift = 0;
ptp->cc.mult = 1;
}
ptp->next_overflow_check = jiffies + BNXT_PHC_OVERFLOW_PERIOD;
}
if (init_tc)