Merge tag 'sound-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "We've received a lot of activities in this cycle, mostly about leaf
  driver codes rather than the core part, but with a good mixture of
  code cleanups and new driver additions. Below are some highlights:

  ASoC:
   - Support for automatically enumerating DAIs from standards
     conforming SoundWire SDCA devices; not much used as of this
     writing, rather for future implementations
   - Conversion of quite a few drivers to newer GPIO APIs
   - Continued cleanups and helper usages in allover places
   - Support for a wider range of Intel AVS platforms
   - Support for AMD ACP 7.x platforms, Cirrus Logic CS35L63 and CS48L32
     Everest Semiconductor ES8375 and ES8389, Longsoon-1 AC'97
     controllers, nVidia Tegra264, Richtek ALC203 and RT9123 and
     Rockchip SAI controllers

  HD-audio:
   - Lots of cleanups of TAS2781 codec drivers
   - A new HD-audio control bound via ACPI for Nvidia
   - Support for Tegra264, Intel WCL, usual new codec quirks

  USB-audio:
   - Fix a race at removal of MIDI device
   - Pioneer DJM-V10 support, Scarlett2 driver cleanups

  Misc:
   - Cleanups of deprecated PCI functions
   - Removal of unused / dead function codes"

* tag 'sound-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (364 commits)
  firmware: cs_dsp: Fix OOB memory read access in KUnit test
  ASoC: codecs: add support for ES8375
  ASoC: dt-bindings: Add Everest ES8375 audio CODEC
  ALSA: hda: acpi: Make driver's match data const static
  ALSA: hda: acpi: Use SYSTEM_SLEEP_PM_OPS()
  ALSA: atmel: Replace deprecated strcpy() with strscpy()
  ALSA: core: fix up bus match const issues.
  ASoC: wm_adsp: Make cirrus_dir const
  ASoC: tegra: Tegra264 support in isomgr_bw
  ASoC: tegra: AHUB: Add Tegra264 support
  ASoC: tegra: ADX: Add Tegra264 support
  ASoC: tegra: AMX: Add Tegra264 support
  ASoC: tegra: I2S: Add Tegra264 support
  ASoC: tegra: Update PLL rate for Tegra264
  ASoC: tegra: ASRC: Update ARAM address
  ASoC: tegra: ADMAIF: Add Tegra264 support
  ASoC: tegra: CIF: Add Tegra264 support
  dt-bindings: ASoC: Document Tegra264 APE support
  dt-bindings: ASoC: admaif: Add missing properties
  ASoC: dt-bindings: audio-graph-card2: reference audio-graph routing property
  ...
This commit is contained in:
Linus Torvalds
2025-05-27 15:05:18 -07:00
389 changed files with 21930 additions and 7157 deletions

View File

@@ -21,6 +21,7 @@ properties:
- const: nvidia,tegra210-aconnect
- items:
- enum:
- nvidia,tegra264-aconnect
- nvidia,tegra234-aconnect
- nvidia,tegra186-aconnect
- nvidia,tegra194-aconnect

View File

@@ -18,11 +18,7 @@ properties:
label:
maxItems: 1
routing:
description: |
A list of the connections between audio components.
Each entry is a pair of strings, the first being the
connection's sink, the second being the connection's source.
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
$ref: audio-graph.yaml#/properties/routing
aux-devs:
description: |
List of phandles pointing to auxiliary devices, such
@@ -39,6 +35,8 @@ properties:
description: Codec to Codec node
hp-det-gpios:
$ref: audio-graph.yaml#/properties/hp-det-gpios
mic-det-gpios:
$ref: audio-graph.yaml#/properties/mic-det-gpios
widgets:
$ref: audio-graph.yaml#/properties/widgets

View File

@@ -0,0 +1,195 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/cirrus,cs48l32.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Cirrus Logic CS48L32 audio DSP.
maintainers:
- patches@opensource.cirrus.com
description: |
The CS48L32 is a high-performance low-power audio DSP for smartphones and
other portable audio devices. The CS48L32 combines a programmable Halo Core
DSP with a variety of power-efficient fixed-function audio processors.
See also the binding headers:
include/dt-bindings/sound/cs48l32.yaml
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- cirrus,cs48l32
reg:
description: SPI chip-select number.
maxItems: 1
spi-max-frequency:
maximum: 25000000
vdd-a-supply:
description: Regulator supplying VDD_A
vdd-d-supply:
description: Regulator supplying VDD_D
vdd-io-supply:
description: Regulator supplying VDD_IO
vdd-cp-supply:
description: Regulator supplying VDD_CP
reset-gpios:
description:
One entry specifying the GPIO controlling /RESET. Although optional,
it is strongly recommended to use a hardware reset.
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: The clock supplied on MCLK1
clock-names:
const: mclk1
'#sound-dai-cells':
const: 1
cirrus,in-type:
description: |
A list of input type settings for each ADC input.
Inputs are one of these types:
CS48L32_IN_TYPE_DIFF : analog differential (default)
CS48L32_IN_TYPE_SE : analog single-ended
The type of the left (L) and right (R) channel on each input is
independently configured, as are the two groups of pins muxable to
the input (referred to in the datasheet as "1" and "2").
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
- description:
IN1L_1 analog input type. One of the CS48L32_IN_TYPE_xxx.
minimum: 0
maximum: 1
default: 0
- description:
IN1R_1 analog input type. One of the CS48L32_IN_TYPE_xxx.
minimum: 0
maximum: 1
default: 0
- description:
IN1L_2 analog input type. One of the CS48L32_IN_TYPE_xxx.
minimum: 0
maximum: 1
default: 0
- description:
IN1R_2 analog input type. One of the CS48L32_IN_TYPE_xxx.
minimum: 0
maximum: 1
default: 0
cirrus,pdm-sup:
description: |
Indicate which MICBIAS output supplies bias to the microphone.
There is one cell per input (IN1, IN2, ...).
One of the CS48L32_MICBIAS_xxx values.
CS48L32_PDM_SUP_VOUT_MIC : mic biased from VOUT_MIC
CS48L32_PDM_SUP_MICBIAS1 : mic biased from MICBIAS1
Also see the INn_PDM_SUP field in the datasheet.
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
- description: IN1 PDM supply source
minimum: 0
maximum: 1
default: 0
- description: IN2 PDM supply source
minimum: 0
maximum: 1
default: 0
required:
- compatible
- reg
- vdd-a-supply
- vdd-d-supply
- vdd-io-supply
- vdd-cp-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/sound/cs48l32.h>
spi@e0006000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0xe0006000 0x1000>;
codec@1 {
compatible = "cirrus,cs48l32";
reg = <0x1>;
spi-max-frequency = <2500000>;
vdd-a-supply = <&regulator_1v8>;
vdd-d-supply = <&regulator_1v2>;
vdd-io-supply = <&regulator_1v8>;
vdd-cp-supply = <&regulator_1v8>;
reset-gpios = <&gpio 0 0>;
clocks = <&clks 0>;
clock-names = "mclk1";
interrupt-parent = <&gpio0>;
interrupts = <56 8>;
#sound-dai-cells = <1>;
cirrus,in-type = <
CS48L32_IN_TYPE_DIFF CS48L32_IN_TYPE_DIFF
CS48L32_IN_TYPE_SE CS48L32_IN_TYPE_SE
>;
cirrus,pdm-sup = <
CS48L32_PDM_SUP_MICBIAS1 CS48L32_PDM_SUP_MICBIAS1
>;
};
};
#
# Minimal config
#
- |
#include <dt-bindings/sound/cs48l32.h>
spi@e0006000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0xe0006000 0x1000>;
codec@1 {
compatible = "cirrus,cs48l32";
reg = <0x1>;
vdd-a-supply = <&regulator_1v8>;
vdd-d-supply = <&regulator_1v2>;
vdd-io-supply = <&regulator_1v8>;
vdd-cp-supply = <&regulator_1v8>;
};
};

View File

@@ -0,0 +1,71 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/everest,es8375.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Everest ES8375 audio CODEC
maintainers:
- Michael Zhang <zhangyi@everest-semi.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: everest,es8375
reg:
maxItems: 1
clocks:
items:
- description: clock for master clock (MCLK)
clock-names:
items:
- const: mclk
vdda-supply:
description:
Analogue power supply.
vddd-supply:
description:
Interface power supply.
everest,mclk-src:
$ref: /schemas/types.yaml#/definitions/uint8
description: |
Represents the MCLK/SCLK pair pins used as the internal clock.
0 represents selecting MCLK.
1 represents selecting SCLK.
enum: [0, 1]
default: 0
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
- "#sound-dai-cells"
- vdda-supply
- vddd-supply
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
es8375: codec@18 {
compatible = "everest,es8375";
reg = <0x18>;
vdda-supply = <&vdd3v3>;
vddd-supply = <&vdd3v3>;
#sound-dai-cells = <0>;
};
};

View File

@@ -0,0 +1,50 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/everest,es8389.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Everest ES8389 audio CODEC
maintainers:
- Michael Zhang <zhangyi@everest-semi.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: everest,es8389
reg:
maxItems: 1
clocks:
items:
- description: clock for master clock (MCLK)
clock-names:
items:
- const: mclk
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
- "#sound-dai-cells"
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
es8389: codec@10 {
compatible = "everest,es8389";
reg = <0x10>;
#sound-dai-cells = <0>;
};
};

View File

@@ -28,6 +28,9 @@ properties:
- fsl,imx95-aonmix-mqs
- fsl,imx95-netcmix-mqs
"#sound-dai-cells":
const: 0
clocks:
minItems: 1
maxItems: 2
@@ -49,12 +52,17 @@ properties:
resets:
maxItems: 1
port:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
required:
- compatible
- clocks
- clock-names
allOf:
- $ref: dai-common.yaml#
- if:
properties:
compatible:
@@ -86,7 +94,7 @@ allOf:
required:
- gpr
additionalProperties: false
unevaluatedProperties: false
examples:
- |

View File

@@ -0,0 +1,68 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/loongson,ls1b-ac97.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Loongson-1 AC97 Controller
maintainers:
- Keguang Zhang <keguang.zhang@gmail.com>
description:
The Loongson-1 AC97 controller supports 2-channel stereo output and input.
It is paired with the DMA engine to handle playback and capture functions.
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
oneOf:
- const: loongson,ls1b-ac97
- items:
- enum:
- loongson,ls1a-ac97
- loongson,ls1c-ac97
- const: loongson,ls1b-ac97
reg:
maxItems: 3
reg-names:
items:
- const: ac97
- const: audio-tx
- const: audio-rx
dmas:
maxItems: 2
dma-names:
items:
- const: tx
- const: rx
'#sound-dai-cells':
const: 0
required:
- compatible
- reg
- reg-names
- dmas
- dma-names
- '#sound-dai-cells'
unevaluatedProperties: false
examples:
- |
audio-controller@1fe74000 {
compatible = "loongson,ls1b-ac97";
reg = <0x1fe74000 0x60>, <0x1fe72420 0x4>, <0x1fe74c4c 0x4>;
reg-names = "ac97", "audio-tx", "audio-rx";
dmas = <&dma 1>, <&dma 2>;
dma-names = "tx", "rx";
#sound-dai-cells = <0>;
};

View File

@@ -77,11 +77,11 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/gpio/gpio.h>
audio-codec@3a {
compatible = "maxim,max98927";
reg = <0x3a>;

View File

@@ -96,10 +96,9 @@ patternProperties:
mediatek,clk-provider:
$ref: /schemas/types.yaml#/definitions/string
description: Indicates dai-link clock master.
items:
enum:
- cpu
- codec
enum:
- cpu
- codec
additionalProperties: false

View File

@@ -124,10 +124,9 @@ patternProperties:
mediatek,clk-provider:
$ref: /schemas/types.yaml#/definitions/string
description: Indicates dai-link clock master.
items:
enum:
- cpu
- codec
enum:
- cpu
- codec
required:
- link-name

View File

@@ -21,6 +21,7 @@ properties:
- mediatek,mt8195_mt6359_rt1019_rt5682
- mediatek,mt8195_mt6359_rt1011_rt5682
- mediatek,mt8195_mt6359_max98390_rt5682
- mediatek,mt8195_mt6359
model:
$ref: /schemas/types.yaml#/definitions/string
@@ -44,6 +45,8 @@ properties:
- Right Spk
# Sources
- Headphone L
- Headphone R
- Headset Mic
- HPOL
- HPOR
@@ -88,6 +91,7 @@ patternProperties:
link-name:
description: Indicates dai-link name and PCM stream name
enum:
- DL_SRC_BE
- DPTX_BE
- ETDM1_IN_BE
- ETDM2_IN_BE

View File

@@ -23,6 +23,7 @@ properties:
enum:
- nvidia,tegra210-audio-graph-card
- nvidia,tegra186-audio-graph-card
- nvidia,tegra264-audio-graph-card
clocks:
minItems: 2

View File

@@ -31,7 +31,9 @@ properties:
compatible:
oneOf:
- const: nvidia,tegra186-asrc
- enum:
- nvidia,tegra186-asrc
- nvidia,tegra264-asrc
- items:
- enum:
- nvidia,tegra234-asrc

View File

@@ -29,6 +29,7 @@ properties:
- const: nvidia,tegra186-dspk
- items:
- enum:
- nvidia,tegra264-dspk
- nvidia,tegra234-dspk
- nvidia,tegra194-dspk
- const: nvidia,tegra186-dspk

View File

@@ -26,6 +26,7 @@ properties:
- enum:
- nvidia,tegra210-admaif
- nvidia,tegra186-admaif
- nvidia,tegra264-admaif
- items:
- enum:
- nvidia,tegra234-admaif
@@ -39,6 +40,19 @@ properties:
dma-names: true
interconnects:
items:
- description: APE read memory client
- description: APE write memory client
interconnect-names:
items:
- const: dma-mem # read
- const: write
iommus:
maxItems: 1
ports:
$ref: /schemas/graph.yaml#/properties/ports
description: |
@@ -74,6 +88,9 @@ then:
Should be "tx1", "tx2" ... "tx10" for DMA Tx channel
minItems: 1
maxItems: 20
interconnects: false
interconnect-names: false
iommus: false
else:
properties:

View File

@@ -27,7 +27,9 @@ properties:
compatible:
oneOf:
- const: nvidia,tegra210-adx
- enum:
- nvidia,tegra210-adx
- nvidia,tegra264-adx
- items:
- enum:
- nvidia,tegra234-adx

View File

@@ -27,6 +27,7 @@ properties:
- nvidia,tegra210-ahub
- nvidia,tegra186-ahub
- nvidia,tegra234-ahub
- nvidia,tegra264-ahub
- items:
- const: nvidia,tegra194-ahub
- const: nvidia,tegra186-ahub

View File

@@ -26,11 +26,13 @@ properties:
compatible:
oneOf:
- const: nvidia,tegra210-amx
- enum:
- nvidia,tegra210-amx
- nvidia,tegra194-amx
- nvidia,tegra264-amx
- items:
- const: nvidia,tegra186-amx
- const: nvidia,tegra210-amx
- const: nvidia,tegra194-amx
- items:
- const: nvidia,tegra234-amx
- const: nvidia,tegra194-amx

View File

@@ -28,6 +28,7 @@ properties:
- const: nvidia,tegra210-dmic
- items:
- enum:
- nvidia,tegra264-dmic
- nvidia,tegra234-dmic
- nvidia,tegra194-dmic
- nvidia,tegra186-dmic

View File

@@ -25,7 +25,9 @@ properties:
compatible:
oneOf:
- const: nvidia,tegra210-i2s
- enum:
- nvidia,tegra210-i2s
- nvidia,tegra264-i2s
- items:
- enum:
- nvidia,tegra234-i2s

View File

@@ -23,6 +23,7 @@ properties:
- const: nvidia,tegra210-mbdrc
- items:
- enum:
- nvidia,tegra264-mbdrc
- nvidia,tegra234-mbdrc
- nvidia,tegra194-mbdrc
- nvidia,tegra186-mbdrc

View File

@@ -28,6 +28,7 @@ properties:
- const: nvidia,tegra210-amixer
- items:
- enum:
- nvidia,tegra264-amixer
- nvidia,tegra234-amixer
- nvidia,tegra194-amixer
- nvidia,tegra186-amixer

View File

@@ -31,6 +31,7 @@ properties:
- const: nvidia,tegra210-mvc
- items:
- enum:
- nvidia,tegra264-mvc
- nvidia,tegra234-mvc
- nvidia,tegra194-mvc
- nvidia,tegra186-mvc

View File

@@ -25,6 +25,7 @@ properties:
- const: nvidia,tegra210-ope
- items:
- enum:
- nvidia,tegra264-ope
- nvidia,tegra234-ope
- nvidia,tegra194-ope
- nvidia,tegra186-ope

View File

@@ -24,6 +24,7 @@ properties:
- const: nvidia,tegra210-peq
- items:
- enum:
- nvidia,tegra264-peq
- nvidia,tegra234-peq
- nvidia,tegra194-peq
- nvidia,tegra186-peq

View File

@@ -28,6 +28,7 @@ properties:
- const: nvidia,tegra210-sfc
- items:
- enum:
- nvidia,tegra264-sfc
- nvidia,tegra234-sfc
- nvidia,tegra194-sfc
- nvidia,tegra186-sfc

View File

@@ -20,11 +20,13 @@ properties:
compatible:
oneOf:
- const: nvidia,tegra30-hda
- enum:
- nvidia,tegra30-hda
- nvidia,tegra194-hda
- nvidia,tegra234-hda
- nvidia,tegra264-hda
- items:
- enum:
- nvidia,tegra234-hda
- nvidia,tegra194-hda
- nvidia,tegra186-hda
- nvidia,tegra210-hda
- nvidia,tegra124-hda
@@ -43,15 +45,12 @@ properties:
maxItems: 1
clocks:
minItems: 2
minItems: 1
maxItems: 3
clock-names:
minItems: 2
items:
- const: hda
- const: hda2hdmi
- const: hda2codec_2x
minItems: 1
maxItems: 3
resets:
minItems: 2
@@ -59,10 +58,7 @@ properties:
reset-names:
minItems: 2
items:
- const: hda
- const: hda2hdmi
- const: hda2codec_2x
maxItems: 3
power-domains:
maxItems: 1
@@ -93,6 +89,92 @@ required:
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra30-hda
then:
properties:
clocks:
minItems: 3
clock-names:
items:
- const: hda
- const: hda2hdmi
- const: hda2codec_2x
resets:
minItems: 3
reset-names:
items:
- const: hda
- const: hda2hdmi
- const: hda2codec_2x
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra194-hda
then:
properties:
clocks:
minItems: 3
clock-names:
items:
- const: hda
- const: hda2hdmi
- const: hda2codec_2x
resets:
maxItems: 2
reset-names:
items:
- const: hda
- const: hda2hdmi
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra234-hda
then:
properties:
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: hda
- const: hda2codec_2x
resets:
maxItems: 2
reset-names:
items:
- const: hda
- const: hda2codec_2x
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra264-hda
then:
properties:
clocks:
maxItems: 1
clock-names:
items:
- const: hda
resets:
maxItems: 2
reset-names:
items:
- const: hda
- const: hda2codec_2x
power-domains: false
examples:
- |
#include<dt-bindings/clock/tegra124-car-common.h>

View File

@@ -31,6 +31,8 @@ properties:
- qcom,apq8096-sndcard
- qcom,qcm6490-idp-sndcard
- qcom,qcs6490-rb3gen2-sndcard
- qcom,qcs9075-sndcard
- qcom,qcs9100-sndcard
- qcom,qrb4210-rb2-sndcard
- qcom,qrb5165-rb5-sndcard
- qcom,sc7180-qdsp6-sndcard

View File

@@ -23,9 +23,15 @@ properties:
- qcom,wcd9380-codec
- qcom,wcd9385-codec
mux-controls:
description: A reference to the audio mux switch for
switching CTIA/OMTP Headset types
maxItems: 1
us-euro-gpios:
description: GPIO spec for swapping gnd and mic segments
maxItems: 1
deprecated: true
required:
- compatible

View File

@@ -0,0 +1,36 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/realtek,alc203.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Realtek ALC203 AC97 Audio Codec
maintainers:
- Keguang Zhang <keguang.zhang@gmail.com>
description:
ALC203 is a full duplex AC97 2.3 compatible stereo audio codec.
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: realtek,alc203
'#sound-dai-cells':
const: 0
required:
- compatible
- '#sound-dai-cells'
unevaluatedProperties: false
examples:
- |
audio-codec {
compatible = "realtek,alc203";
#sound-dai-cells = <0>;
};

View File

@@ -0,0 +1,56 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/richtek,rt9123.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Richtek RT9123 Audio Amplifier
maintainers:
- ChiYuan Huang <cy_huang@richtek.com>
description:
RT9123 is a 3.2W mono Class-D audio amplifier that features high efficiency
and performance with ultra-low quiescent current. The digital audio interface
support various formats, including I2S, left-justified, right-justified, and
TDM formats.
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- richtek,rt9123
reg:
maxItems: 1
'#sound-dai-cells':
const: 0
enable-gpios:
maxItems: 1
required:
- compatible
- reg
- '#sound-dai-cells'
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
amplifier@5e {
compatible = "richtek,rt9123";
reg = <0x5e>;
enable-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
};

View File

@@ -0,0 +1,48 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/richtek,rt9123p.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Richtek RT9123P Audio Amplifier
maintainers:
- ChiYuan Huang <cy_huang@richtek.com>
description:
RT9123P is a RT9123 variant which does not support I2C control.
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- richtek,rt9123p
'#sound-dai-cells':
const: 0
enable-gpios:
maxItems: 1
enable-delay-ms:
description:
Delay time for 'ENABLE' pin changes intended to make I2S clocks ready to
prevent speaker pop noise. The unit is in millisecond.
required:
- compatible
- '#sound-dai-cells'
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
amplifier {
compatible = "richtek,rt9123p";
enable-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};

View File

@@ -0,0 +1,144 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/rockchip,rk3576-sai.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip Serial Audio Interface Controller
description:
The Rockchip Serial Audio Interface (SAI) controller is a flexible audio
controller that implements the I2S, I2S/TDM and the PDM standards.
maintainers:
- Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: rockchip,rk3576-sai
reg:
maxItems: 1
interrupts:
maxItems: 1
dmas:
minItems: 1
maxItems: 2
dma-names:
minItems: 1
items:
- enum: [tx, rx]
- const: rx
clocks:
items:
- description: master audio clock
- description: AHB clock driving the interface
clock-names:
items:
- const: mclk
- const: hclk
resets:
minItems: 1
items:
- description: reset for the mclk domain
- description: reset for the hclk domain
reset-names:
minItems: 1
items:
- const: m
- const: h
port:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
power-domains:
maxItems: 1
"#sound-dai-cells":
const: 0
rockchip,sai-rx-route:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
Defines the mapping of the controller's SDI ports to actual input lanes,
as well as the number of input lanes.
rockchip,sai-rx-route = <3> would mean sdi3 is receiving from data0, and
that there is only one receiving lane.
This property's absence is to be understood as only one receiving lane
being used if the controller has capture capabilities.
maxItems: 4
items:
minimum: 0
maximum: 3
rockchip,sai-tx-route:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
Defines the mapping of the controller's SDO ports to actual output lanes,
as well as the number of output lanes.
rockchip,sai-tx-route = <3> would mean sdo3 is sending to data0, and
that there is only one transmitting lane.
This property's absence is to be understood as only one transmitting lane
being used if the controller has playback capabilities.
maxItems: 4
items:
minimum: 0
maximum: 3
required:
- compatible
- reg
- dmas
- dma-names
- clocks
- clock-names
- "#sound-dai-cells"
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/rockchip,rk3576-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/power/rockchip,rk3576-power.h>
#include <dt-bindings/reset/rockchip,rk3576-cru.h>
bus {
#address-cells = <2>;
#size-cells = <2>;
sai1: sai@2a610000 {
compatible = "rockchip,rk3576-sai";
reg = <0x0 0x2a610000 0x0 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru MCLK_SAI1_8CH>, <&cru HCLK_SAI1_8CH>;
clock-names = "mclk", "hclk";
dmas = <&dmac0 2>, <&dmac0 3>;
dma-names = "tx", "rx";
power-domains = <&power RK3576_PD_AUDIO>;
resets = <&cru SRST_M_SAI1_8CH>, <&cru SRST_H_SAI1_8CH>;
reset-names = "m", "h";
pinctrl-names = "default";
pinctrl-0 = <&sai1m0_lrck
&sai1m0_sclk
&sai1m0_sdi0
&sai1m0_sdo0
&sai1m0_sdo1
&sai1m0_sdo2
&sai1m0_sdo3>;
rockchip,sai-tx-route = <3 1 2 0>;
#sound-dai-cells = <0>;
};
};

View File

@@ -4,14 +4,11 @@
$id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas MSIOF SPI controller
title: Renesas MSIOF SPI / I2S controller
maintainers:
- Geert Uytterhoeven <geert+renesas@glider.be>
allOf:
- $ref: spi-controller.yaml#
properties:
compatible:
oneOf:
@@ -146,24 +143,38 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
default: 64
# for MSIOF-I2S
port:
$ref: ../sound/audio-graph-port.yaml#
unevaluatedProperties: false
required:
- compatible
- reg
- interrupts
- clocks
- power-domains
- '#address-cells'
- '#size-cells'
if:
not:
properties:
compatible:
contains:
const: renesas,sh-mobile-msiof
then:
required:
- resets
allOf:
# additional "required""
- if:
not:
properties:
compatible:
contains:
const: renesas,sh-mobile-msiof
then:
required:
- resets
# If it doesn't have "port" node, it is "MSIOF-SPI"
- if:
not:
required:
- port
then:
allOf:
- $ref: spi-controller.yaml#
unevaluatedProperties: false

View File

@@ -5656,7 +5656,6 @@ F: include/sound/cs*
F: sound/pci/hda/cirrus*
F: sound/pci/hda/cs*
F: sound/pci/hda/hda_component*
F: sound/pci/hda/hda_cs_dsp_ctl.*
F: sound/soc/codecs/cs*
CIRRUS LOGIC HAPTIC DRIVERS
@@ -16439,6 +16438,7 @@ F: arch/mips/include/asm/mach-loongson32/
F: arch/mips/loongson32/
F: drivers/*/*loongson1*
F: drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c
F: sound/soc/loongson/loongson1_ac97.c
MIPS/LOONGSON2EF ARCHITECTURE
M: Jiaxun Yang <jiaxun.yang@flygoat.com>
@@ -21146,6 +21146,13 @@ F: Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml
F: sound/soc/codecs/rk3308_codec.c
F: sound/soc/codecs/rk3308_codec.h
ROCKCHIP SAI DRIVER
M: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
L: linux-rockchip@lists.infradead.org
S: Maintained
F: Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml
F: sound/soc/rockchip/rockchip_sai.*
ROCKCHIP VIDEO DECODER DRIVER
M: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
L: linux-media@vger.kernel.org
@@ -22891,10 +22898,10 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
F: Documentation/devicetree/bindings/sound/
F: Documentation/sound/soc/
F: include/dt-bindings/sound/
F: include/sound/cs-amp-lib.h
F: include/sound/cs35l*
F: include/sound/cs4271.h
F: include/sound/cs42l*
F: include/sound/cs*
X: include/sound/cs4231-regs.h
X: include/sound/cs8403.h
X: include/sound/cs8427.h
F: include/sound/madera-pdata.h
F: include/sound/soc*
F: include/sound/sof.h
@@ -24122,7 +24129,6 @@ F: Documentation/devicetree/bindings/sound/ti,tlv320*.yaml
F: Documentation/devicetree/bindings/sound/ti,tlv320adcx140.yaml
F: include/sound/tas2*.h
F: include/sound/tlv320*.h
F: include/sound/tpa6130a2-plat.h
F: sound/pci/hda/tas2781_hda_i2c.c
F: sound/soc/codecs/pcm1681.c
F: sound/soc/codecs/pcm1789*.*

View File

@@ -96,10 +96,11 @@ static void cs_dsp_mock_bin_add_name_or_info(struct cs_dsp_mock_bin_builder *bui
if (info_len % 4) {
/* Create a padded string with length a multiple of 4 */
size_t copy_len = info_len;
info_len = round_up(info_len, 4);
tmp = kunit_kzalloc(builder->test_priv->test, info_len, GFP_KERNEL);
KUNIT_ASSERT_NOT_ERR_OR_NULL(builder->test_priv->test, tmp);
memcpy(tmp, info, info_len);
memcpy(tmp, info, copy_len);
info = tmp;
}
@@ -176,6 +177,9 @@ struct cs_dsp_mock_bin_builder *cs_dsp_mock_bin_init(struct cs_dsp_test *priv,
struct cs_dsp_mock_bin_builder *builder;
struct wmfw_coeff_hdr *hdr;
KUNIT_ASSERT_LE(priv->test, format_version, 0xff);
KUNIT_ASSERT_LE(priv->test, fw_version, 0xffffff);
builder = kunit_kzalloc(priv->test, sizeof(*builder), GFP_KERNEL);
KUNIT_ASSERT_NOT_ERR_OR_NULL(priv->test, builder);
builder->test_priv = priv;

View File

@@ -505,9 +505,11 @@ void cs_dsp_mock_xm_header_drop_from_regmap_cache(struct cs_dsp_test *priv)
* Could be one 32-bit register or two 16-bit registers.
* A raw read will read the requested number of bytes.
*/
regmap_raw_read(priv->dsp->regmap,
xm + (offsetof(struct wmfw_adsp2_id_hdr, n_algs) / 2),
&num_algs_be32, sizeof(num_algs_be32));
KUNIT_ASSERT_GE(priv->test, 0,
regmap_raw_read(priv->dsp->regmap,
xm +
(offsetof(struct wmfw_adsp2_id_hdr, n_algs) / 2),
&num_algs_be32, sizeof(num_algs_be32)));
num_algs = be32_to_cpu(num_algs_be32);
bytes = sizeof(struct wmfw_adsp2_id_hdr) +
(num_algs * sizeof(struct wmfw_adsp2_alg_hdr)) +
@@ -516,9 +518,10 @@ void cs_dsp_mock_xm_header_drop_from_regmap_cache(struct cs_dsp_test *priv)
regcache_drop_region(priv->dsp->regmap, xm, xm + (bytes / 2) - 1);
break;
case WMFW_HALO:
regmap_read(priv->dsp->regmap,
xm + offsetof(struct wmfw_halo_id_hdr, n_algs),
&num_algs);
KUNIT_ASSERT_GE(priv->test, 0,
regmap_read(priv->dsp->regmap,
xm + offsetof(struct wmfw_halo_id_hdr, n_algs),
&num_algs));
bytes = sizeof(struct wmfw_halo_id_hdr) +
(num_algs * sizeof(struct wmfw_halo_alg_hdr)) +
4 /* terminator word */;

View File

@@ -178,6 +178,8 @@ void cs_dsp_mock_wmfw_start_alg_info_block(struct cs_dsp_mock_wmfw_builder *buil
size_t bytes_needed, name_len, description_len;
int offset;
KUNIT_ASSERT_LE(builder->test_priv->test, alg_id, 0xffffff);
/* Bytes needed for region header */
bytes_needed = offsetof(struct wmfw_region, data);
@@ -435,6 +437,8 @@ struct cs_dsp_mock_wmfw_builder *cs_dsp_mock_wmfw_init(struct cs_dsp_test *priv,
{
struct cs_dsp_mock_wmfw_builder *builder;
KUNIT_ASSERT_LE(priv->test, format_version, 0xff);
/* If format version isn't given use the default for the target core */
if (format_version < 0) {
switch (priv->dsp->type) {

View File

@@ -20,6 +20,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_graph.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/sh_dma.h>
@@ -1276,20 +1277,26 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
const struct sh_msiof_chipdata *chipdata;
struct sh_msiof_spi_info *info;
struct sh_msiof_spi_priv *p;
struct device *dev = &pdev->dev;
unsigned long clksrc;
int i;
int ret;
chipdata = of_device_get_match_data(&pdev->dev);
/* Check whether MSIOF is used as I2S mode or SPI mode by checking "port" node */
struct device_node *port __free(device_node) = of_graph_get_next_port(dev->of_node, NULL);
if (port) /* It was MSIOF-I2S */
return -ENODEV;
chipdata = of_device_get_match_data(dev);
if (chipdata) {
info = sh_msiof_spi_parse_dt(&pdev->dev);
info = sh_msiof_spi_parse_dt(dev);
} else {
chipdata = (const void *)pdev->id_entry->driver_data;
info = dev_get_platdata(&pdev->dev);
info = dev_get_platdata(dev);
}
if (!info) {
dev_err(&pdev->dev, "failed to obtain device info\n");
dev_err(dev, "failed to obtain device info\n");
return -ENXIO;
}
@@ -1297,11 +1304,9 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
info->dtdl = 200;
if (info->mode == MSIOF_SPI_TARGET)
ctlr = spi_alloc_target(&pdev->dev,
sizeof(struct sh_msiof_spi_priv));
ctlr = spi_alloc_target(dev, sizeof(struct sh_msiof_spi_priv));
else
ctlr = spi_alloc_host(&pdev->dev,
sizeof(struct sh_msiof_spi_priv));
ctlr = spi_alloc_host(dev, sizeof(struct sh_msiof_spi_priv));
if (ctlr == NULL)
return -ENOMEM;
@@ -1315,9 +1320,9 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
init_completion(&p->done);
init_completion(&p->done_txdma);
p->clk = devm_clk_get(&pdev->dev, NULL);
p->clk = devm_clk_get(dev, NULL);
if (IS_ERR(p->clk)) {
dev_err(&pdev->dev, "cannot get clock\n");
dev_err(dev, "cannot get clock\n");
ret = PTR_ERR(p->clk);
goto err1;
}
@@ -1334,15 +1339,14 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
goto err1;
}
ret = devm_request_irq(&pdev->dev, i, sh_msiof_spi_irq, 0,
dev_name(&pdev->dev), p);
ret = devm_request_irq(dev, i, sh_msiof_spi_irq, 0, dev_name(&pdev->dev), p);
if (ret) {
dev_err(&pdev->dev, "unable to request irq\n");
dev_err(dev, "unable to request irq\n");
goto err1;
}
p->pdev = pdev;
pm_runtime_enable(&pdev->dev);
pm_runtime_enable(dev);
/* Platform data may override FIFO sizes */
p->tx_fifo_size = chipdata->tx_fifo_size;
@@ -1361,7 +1365,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
ctlr->flags = chipdata->ctlr_flags;
ctlr->bus_num = pdev->id;
ctlr->num_chipselect = p->info->num_chipselect;
ctlr->dev.of_node = pdev->dev.of_node;
ctlr->dev.of_node = dev->of_node;
ctlr->setup = sh_msiof_spi_setup;
ctlr->prepare_message = sh_msiof_prepare_message;
ctlr->target_abort = sh_msiof_target_abort;
@@ -1373,11 +1377,11 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
ret = sh_msiof_request_dma(p);
if (ret < 0)
dev_warn(&pdev->dev, "DMA not available, using PIO\n");
dev_warn(dev, "DMA not available, using PIO\n");
ret = devm_spi_register_controller(&pdev->dev, ctlr);
ret = devm_spi_register_controller(dev, ctlr);
if (ret < 0) {
dev_err(&pdev->dev, "devm_spi_register_controller error.\n");
dev_err(dev, "devm_spi_register_controller error.\n");
goto err2;
}
@@ -1385,7 +1389,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
err2:
sh_msiof_release_dma(p);
pm_runtime_disable(&pdev->dev);
pm_runtime_disable(dev);
err1:
spi_controller_put(ctlr);
return ret;

View File

@@ -0,0 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
/*
* Device Tree defines for CS48L32 DSP.
*
* Copyright (C) 2016-2018, 2022, 2025 Cirrus Logic, Inc. and
* Cirrus Logic International Semiconductor Ltd.
*/
#ifndef DT_BINDINGS_SOUND_CS48L32_H
#define DT_BINDINGS_SOUND_CS48L32_H
/* Values for cirrus,in-type */
#define CS48L32_IN_TYPE_DIFF 0
#define CS48L32_IN_TYPE_SE 1
/* Values for cirrus,pdm-sup */
#define CS48L32_PDM_SUP_VOUT_MIC 0
#define CS48L32_PDM_SUP_MICBIAS1 1
#endif

View File

@@ -3049,6 +3049,7 @@
#define PCI_DEVICE_ID_INTEL_HDA_DG1 0x490d
#define PCI_DEVICE_ID_INTEL_HDA_EHL_0 0x4b55
#define PCI_DEVICE_ID_INTEL_HDA_EHL_3 0x4b58
#define PCI_DEVICE_ID_INTEL_HDA_WCL 0x4d28
#define PCI_DEVICE_ID_INTEL_HDA_JSL_N 0x4dc8
#define PCI_DEVICE_ID_INTEL_HDA_DG2_0 0x4f90
#define PCI_DEVICE_ID_INTEL_HDA_DG2_1 0x4f91
@@ -3070,6 +3071,7 @@
#define PCI_DEVICE_ID_INTEL_5100_21 0x65f5
#define PCI_DEVICE_ID_INTEL_5100_22 0x65f6
#define PCI_DEVICE_ID_INTEL_IOAT_SCNB 0x65ff
#define PCI_DEVICE_ID_INTEL_HDA_FCL 0x67a8
#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020

View File

@@ -31,6 +31,7 @@ enum string_size_units {
int string_get_size(u64 size, u64 blk_size, const enum string_size_units units,
char *buf, int len);
int parse_int_array(const char *buf, size_t count, int **array);
int parse_int_array_user(const char __user *from, size_t count, int **array);
#define UNESCAPE_SPACE BIT(0)

View File

@@ -326,7 +326,6 @@ void snd_device_disconnect(struct snd_card *card, void *device_data);
void snd_device_disconnect_all(struct snd_card *card);
void snd_device_free(struct snd_card *card, void *device_data);
void snd_device_free_all(struct snd_card *card);
int snd_device_get_state(struct snd_card *card, void *device_data);
/* isadma.c */

View File

@@ -23,7 +23,7 @@ struct cirrus_amp_cal_data {
struct cirrus_amp_efi_data {
u32 size;
u32 count;
struct cirrus_amp_cal_data data[];
struct cirrus_amp_cal_data data[] __counted_by(count);
} __packed;
/**

View File

@@ -71,6 +71,8 @@
#define CS35L56_DSP_VIRTUAL1_MBOX_6 0x0011034
#define CS35L56_DSP_VIRTUAL1_MBOX_7 0x0011038
#define CS35L56_DSP_VIRTUAL1_MBOX_8 0x001103C
#define CS35L56_DIE_STS1 0x0017040
#define CS35L56_DIE_STS2 0x0017044
#define CS35L56_DSP_RESTRICT_STS1 0x00190F0
#define CS35L56_DSP1_XMEM_PACKED_0 0x2000000
#define CS35L56_DSP1_XMEM_PACKED_6143 0x2005FFC
@@ -104,6 +106,15 @@
#define CS35L56_DSP1_PMEM_0 0x3800000
#define CS35L56_DSP1_PMEM_5114 0x3804FE8
#define CS35L63_DSP1_FW_VER CS35L56_DSP1_FW_VER
#define CS35L63_DSP1_HALO_STATE 0x280396C
#define CS35L63_DSP1_PM_CUR_STATE 0x28042C8
#define CS35L63_PROTECTION_STATUS 0x340009C
#define CS35L63_TRANSDUCER_ACTUAL_PS 0x34000F4
#define CS35L63_MAIN_RENDER_USER_MUTE 0x3400020
#define CS35L63_MAIN_RENDER_USER_VOLUME 0x3400028
#define CS35L63_MAIN_POSTURE_NUMBER 0x3400068
/* DEVID */
#define CS35L56_DEVID_MASK 0x00FFFFFF
@@ -267,6 +278,17 @@ struct cs35l56_spi_payload {
} __packed;
static_assert(sizeof(struct cs35l56_spi_payload) == 10);
struct cs35l56_fw_reg {
unsigned int fw_ver;
unsigned int halo_state;
unsigned int pm_cur_stat;
unsigned int prot_sts;
unsigned int transducer_actual_ps;
unsigned int user_mute;
unsigned int user_volume;
unsigned int posture_number;
};
struct cs35l56_base {
struct device *dev;
struct regmap *regmap;
@@ -283,6 +305,7 @@ struct cs35l56_base {
struct cirrus_amp_cal_data cal_data;
struct gpio_desc *reset_gpio;
struct cs35l56_spi_payload *spi_payload_buf;
const struct cs35l56_fw_reg *fw_reg;
};
static inline bool cs35l56_is_otp_register(unsigned int reg)
@@ -310,6 +333,11 @@ static inline bool cs35l56_is_spi(struct cs35l56_base *cs35l56)
extern const struct regmap_config cs35l56_regmap_i2c;
extern const struct regmap_config cs35l56_regmap_spi;
extern const struct regmap_config cs35l56_regmap_sdw;
extern const struct regmap_config cs35l63_regmap_i2c;
extern const struct regmap_config cs35l63_regmap_sdw;
extern const struct cs35l56_fw_reg cs35l56_fw_reg;
extern const struct cs35l56_fw_reg cs35l63_fw_reg;
extern const struct cirrus_amp_cal_controls cs35l56_calibration_controls;
@@ -332,6 +360,7 @@ void cs35l56_init_cs_dsp(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_ds
int cs35l56_get_calibration(struct cs35l56_base *cs35l56_base);
int cs35l56_read_prot_status(struct cs35l56_base *cs35l56_base,
bool *fw_missing, unsigned int *fw_version);
void cs35l56_log_tuning(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_dsp);
int cs35l56_hw_init(struct cs35l56_base *cs35l56_base);
int cs35l56_get_speaker_id(struct cs35l56_base *cs35l56_base);
int cs35l56_get_bclk_freq_id(unsigned int freq);

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* linux/sound/cs42l52.h -- Platform data for CS42L52
*
* Copyright (c) 2012 Cirrus Logic Inc.
*/
#ifndef __CS42L52_H
#define __CS42L52_H
struct cs42l52_platform_data {
/* MICBIAS Level. Check datasheet Pg48 */
unsigned int micbias_lvl;
/* MICA mode selection Differential or Single-ended */
bool mica_diff_cfg;
/* MICB mode selection Differential or Single-ended */
bool micb_diff_cfg;
/* Charge Pump Freq. Check datasheet Pg73 */
unsigned int chgfreq;
/* Reset GPIO */
unsigned int reset_gpio;
};
#endif /* __CS42L52_H */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* linux/sound/cs42l56.h -- Platform data for CS42L56
*
* Copyright (c) 2014 Cirrus Logic Inc.
*/
#ifndef __CS42L56_H
#define __CS42L56_H
struct cs42l56_platform_data {
/* GPIO for Reset */
unsigned int gpio_nreset;
/* MICBIAS Level. Check datasheet Pg48 */
unsigned int micbias_lvl;
/* Analog Input 1A Reference 0=Single 1=Pseudo-Differential */
unsigned int ain1a_ref_cfg;
/* Analog Input 2A Reference 0=Single 1=Pseudo-Differential */
unsigned int ain2a_ref_cfg;
/* Analog Input 1B Reference 0=Single 1=Pseudo-Differential */
unsigned int ain1b_ref_cfg;
/* Analog Input 2B Reference 0=Single 1=Pseudo-Differential */
unsigned int ain2b_ref_cfg;
/* Charge Pump Freq. Check datasheet Pg62 */
unsigned int chgfreq;
/* HighPass Filter Right Channel Corner Frequency */
unsigned int hpfb_freq;
/* HighPass Filter Left Channel Corner Frequency */
unsigned int hpfa_freq;
/* Adaptive Power Control for LO/HP */
unsigned int adaptive_pwr;
};
#endif /* __CS42L56_H */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* linux/sound/cs42l73.h -- Platform data for CS42L73
*
* Copyright (c) 2012 Cirrus Logic Inc.
*/
#ifndef __CS42L73_H
#define __CS42L73_H
struct cs42l73_platform_data {
/* RST GPIO */
unsigned int reset_gpio;
unsigned int chgfreq;
int jack_detection;
unsigned int mclk_freq;
};
#endif /* __CS42L73_H */

47
include/sound/cs48l32.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Register definitions for Cirrus Logic CS48L32
*
* Copyright (C) 2017-2018, 2020, 2022, 2025 Cirrus Logic, Inc. and
* Cirrus Logic International Semiconductor Ltd.
*/
#ifndef CS48L32_H
#define CS48L32_H
/* pll_id for snd_soc_component_set_pll() */
#define CS48L32_FLL1_REFCLK 1
/* source for snd_soc_component_set_pll() */
#define CS48L32_FLL_SRC_NONE -1
#define CS48L32_FLL_SRC_MCLK1 0
#define CS48L32_FLL_SRC_PDMCLK 5
#define CS48L32_FLL_SRC_ASP1_BCLK 8
#define CS48L32_FLL_SRC_ASP2_BCLK 9
#define CS48L32_FLL_SRC_ASP1_FSYNC 12
#define CS48L32_FLL_SRC_ASP2_FSYNC 13
/* clk_id for snd_soc_component_set_sysclk() and snd_soc_dai_set_sysclk() */
#define CS48L32_CLK_SYSCLK_1 1
#define CS48L32_CLK_SYSCLK_2 2
#define CS48L32_CLK_SYSCLK_3 3
#define CS48L32_CLK_SYSCLK_4 4
#define CS48L32_CLK_DSPCLK 7
#define CS48L32_CLK_PDM_FLLCLK 13
/* source for snd_soc_component_set_sysclk() */
#define CS48L32_CLK_SRC_MCLK1 0x0
#define CS48L32_CLK_SRC_FLL1 0x4
#define CS48L32_CLK_SRC_ASP1_BCLK 0x8
#define CS48L32_CLK_SRC_ASP2_BCLK 0x9
struct cs48l32 {
struct regmap *regmap;
struct device *dev;
struct gpio_desc *reset_gpio;
struct clk *mclk1;
struct regulator_bulk_data core_supplies[2];
struct regulator *vdd_d;
int irq;
};
#endif

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Register definitions for Cirrus Logic CS48L32
*
* Copyright (C) 2017-2018, 2020, 2022, 2025 Cirrus Logic, Inc. and
* Cirrus Logic International Semiconductor Ltd.
*/
#ifndef CS48L32_REGISTERS_H
#define CS48L32_REGISTERS_H
/* Register Addresses. */
#define CS48L32_DEVID 0x0
#define CS48L32_REVID 0x4
#define CS48L32_OTPID 0x10
#define CS48L32_SFT_RESET 0x20
#define CS48L32_CTRL_IF_DEBUG3 0xA8
#define CS48L32_MCU_CTRL1 0x804
#define CS48L32_GPIO1_CTRL1 0xc08
#define CS48L32_GPIO3_CTRL1 0xc10
#define CS48L32_GPIO7_CTRL1 0xc20
#define CS48L32_GPIO16_CTRL1 0xc44
#define CS48L32_OUTPUT_SYS_CLK 0x1020
#define CS48L32_AUXPDM_CTRL 0x1044
#define CS48L32_AUXPDM_CTRL2 0x105c
#define CS48L32_CLOCK32K 0x1400
#define CS48L32_SYSTEM_CLOCK1 0x1404
#define CS48L32_SYSTEM_CLOCK2 0x1408
#define CS48L32_SAMPLE_RATE1 0x1420
#define CS48L32_SAMPLE_RATE2 0x1424
#define CS48L32_SAMPLE_RATE3 0x1428
#define CS48L32_SAMPLE_RATE4 0x142c
#define CS48L32_DSP_CLOCK1 0x1510
#define CS48L32_FLL1_CONTROL1 0x1c00
#define CS48L32_FLL1_CONTROL5 0x1c10
#define CS48L32_FLL1_CONTROL6 0x1c14
#define CS48L32_FLL1_GPIO_CLOCK 0x1ca0
#define CS48L32_CHARGE_PUMP1 0x2000
#define CS48L32_LDO2_CTRL1 0x2408
#define CS48L32_MICBIAS_CTRL1 0x2410
#define CS48L32_MICBIAS_CTRL5 0x2418
#define CS48L32_IRQ1_CTRL_AOD 0x2710
#define CS48L32_AOD_PAD_CTRL 0x2718
#define CS48L32_INPUT_CONTROL 0x4000
#define CS48L32_INPUT_STATUS 0x4004
#define CS48L32_INPUT_RATE_CONTROL 0x4008
#define CS48L32_INPUT_CONTROL2 0x400c
#define CS48L32_INPUT_CONTROL3 0x4014
#define CS48L32_INPUT1_CONTROL1 0x4020
#define CS48L32_IN1L_CONTROL1 0x4024
#define CS48L32_IN1L_CONTROL2 0x4028
#define CS48L32_IN1R_CONTROL1 0x4044
#define CS48L32_IN1R_CONTROL2 0x4048
#define CS48L32_INPUT2_CONTROL1 0x4060
#define CS48L32_IN2L_CONTROL1 0x4064
#define CS48L32_IN2L_CONTROL2 0x4068
#define CS48L32_IN2R_CONTROL1 0x4084
#define CS48L32_IN2R_CONTROL2 0x4088
#define CS48L32_INPUT_HPF_CONTROL 0x4244
#define CS48L32_INPUT_VOL_CONTROL 0x4248
#define CS48L32_AUXPDM_CONTROL1 0x4300
#define CS48L32_AUXPDM_CONTROL2 0x4304
#define CS48L32_AUXPDM1_CONTROL1 0x4308
#define CS48L32_AUXPDM2_CONTROL1 0x4310
#define CS48L32_ADC1L_ANA_CONTROL1 0x4688
#define CS48L32_ADC1R_ANA_CONTROL1 0x468c
#define CS48L32_ASP1_ENABLES1 0x6000
#define CS48L32_ASP1_CONTROL3 0x600C
#define CS48L32_ASP1_DATA_CONTROL5 0x6040
#define CS48L32_ASP2_ENABLES1 0x6080
#define CS48L32_ASP2_CONTROL3 0x608C
#define CS48L32_ASP2_DATA_CONTROL5 0x60c0
#define CS48L32_ASP1TX1_INPUT1 0x8200
#define CS48L32_ASP1TX2_INPUT1 0x8210
#define CS48L32_ASP1TX3_INPUT1 0x8220
#define CS48L32_ASP1TX4_INPUT1 0x8230
#define CS48L32_ASP1TX5_INPUT1 0x8240
#define CS48L32_ASP1TX6_INPUT1 0x8250
#define CS48L32_ASP1TX7_INPUT1 0x8260
#define CS48L32_ASP1TX8_INPUT1 0x8270
#define CS48L32_ASP1TX8_INPUT4 0x827c
#define CS48L32_ASP2TX1_INPUT1 0x8300
#define CS48L32_ASP2TX2_INPUT1 0x8310
#define CS48L32_ASP2TX3_INPUT1 0x8320
#define CS48L32_ASP2TX4_INPUT1 0x8330
#define CS48L32_ASP2TX4_INPUT4 0x833c
#define CS48L32_ISRC1INT1_INPUT1 0x8980
#define CS48L32_ISRC1INT2_INPUT1 0x8990
#define CS48L32_ISRC1INT3_INPUT1 0x89a0
#define CS48L32_ISRC1INT4_INPUT1 0x89b0
#define CS48L32_ISRC1DEC1_INPUT1 0x89c0
#define CS48L32_ISRC1DEC2_INPUT1 0x89d0
#define CS48L32_ISRC1DEC3_INPUT1 0x89e0
#define CS48L32_ISRC1DEC4_INPUT1 0x89f0
#define CS48L32_ISRC2INT1_INPUT1 0x8a00
#define CS48L32_ISRC2INT2_INPUT1 0x8a10
#define CS48L32_ISRC2DEC1_INPUT1 0x8a40
#define CS48L32_ISRC2DEC2_INPUT1 0x8a50
#define CS48L32_ISRC3INT1_INPUT1 0x8a80
#define CS48L32_ISRC3INT2_INPUT1 0x8a90
#define CS48L32_ISRC3DEC1_INPUT1 0x8ac0
#define CS48L32_ISRC3DEC2_INPUT1 0x8ad0
#define CS48L32_EQ1_INPUT1 0x8b80
#define CS48L32_EQ2_INPUT1 0x8b90
#define CS48L32_EQ3_INPUT1 0x8ba0
#define CS48L32_EQ4_INPUT1 0x8bb0
#define CS48L32_EQ4_INPUT4 0x8bbc
#define CS48L32_DRC1L_INPUT1 0x8c00
#define CS48L32_DRC1R_INPUT1 0x8c10
#define CS48L32_DRC1R_INPUT4 0x8c1c
#define CS48L32_DRC2L_INPUT1 0x8c20
#define CS48L32_DRC2R_INPUT1 0x8c30
#define CS48L32_DRC2R_INPUT4 0x8c3c
#define CS48L32_LHPF1_INPUT1 0x8c80
#define CS48L32_LHPF1_INPUT4 0x8c8c
#define CS48L32_LHPF2_INPUT1 0x8c90
#define CS48L32_LHPF2_INPUT4 0x8c9c
#define CS48L32_LHPF3_INPUT1 0x8ca0
#define CS48L32_LHPF3_INPUT4 0x8cac
#define CS48L32_LHPF4_INPUT1 0x8cb0
#define CS48L32_LHPF4_INPUT4 0x8cbc
#define CS48L32_DSP1RX1_INPUT1 0x9000
#define CS48L32_DSP1RX2_INPUT1 0x9010
#define CS48L32_DSP1RX3_INPUT1 0x9020
#define CS48L32_DSP1RX4_INPUT1 0x9030
#define CS48L32_DSP1RX5_INPUT1 0x9040
#define CS48L32_DSP1RX6_INPUT1 0x9050
#define CS48L32_DSP1RX7_INPUT1 0x9060
#define CS48L32_DSP1RX8_INPUT1 0x9070
#define CS48L32_DSP1RX8_INPUT4 0x907c
#define CS48L32_ISRC1_CONTROL1 0xa400
#define CS48L32_ISRC1_CONTROL2 0xa404
#define CS48L32_ISRC2_CONTROL1 0xa510
#define CS48L32_ISRC2_CONTROL2 0xa514
#define CS48L32_ISRC3_CONTROL1 0xa620
#define CS48L32_ISRC3_CONTROL2 0xa624
#define CS48L32_FX_SAMPLE_RATE 0xa800
#define CS48L32_EQ_CONTROL1 0xa808
#define CS48L32_EQ_CONTROL2 0xa80c
#define CS48L32_EQ1_GAIN1 0xa810
#define CS48L32_EQ1_GAIN2 0xa814
#define CS48L32_EQ1_BAND1_COEFF1 0xa818
#define CS48L32_EQ1_BAND1_COEFF2 0xa81c
#define CS48L32_EQ1_BAND1_PG 0xa820
#define CS48L32_EQ1_BAND2_COEFF1 0xa824
#define CS48L32_EQ1_BAND2_COEFF2 0xa828
#define CS48L32_EQ1_BAND2_PG 0xa82c
#define CS48L32_EQ1_BAND3_COEFF1 0xa830
#define CS48L32_EQ1_BAND3_COEFF2 0xa834
#define CS48L32_EQ1_BAND3_PG 0xa838
#define CS48L32_EQ1_BAND4_COEFF1 0xa83c
#define CS48L32_EQ1_BAND4_COEFF2 0xa840
#define CS48L32_EQ1_BAND4_PG 0xa844
#define CS48L32_EQ1_BAND5_COEFF1 0xa848
#define CS48L32_EQ1_BAND5_PG 0xa850
#define CS48L32_EQ2_GAIN1 0xa854
#define CS48L32_EQ2_GAIN2 0xa858
#define CS48L32_EQ2_BAND1_COEFF1 0xa85c
#define CS48L32_EQ2_BAND1_COEFF2 0xa860
#define CS48L32_EQ2_BAND1_PG 0xa864
#define CS48L32_EQ2_BAND2_COEFF1 0xa868
#define CS48L32_EQ2_BAND2_COEFF2 0xa86c
#define CS48L32_EQ2_BAND2_PG 0xa870
#define CS48L32_EQ2_BAND3_COEFF1 0xa874
#define CS48L32_EQ2_BAND3_COEFF2 0xa878
#define CS48L32_EQ2_BAND3_PG 0xa87c
#define CS48L32_EQ2_BAND4_COEFF1 0xa880
#define CS48L32_EQ2_BAND4_COEFF2 0xa884
#define CS48L32_EQ2_BAND4_PG 0xa888
#define CS48L32_EQ2_BAND5_COEFF1 0xa88c
#define CS48L32_EQ2_BAND5_PG 0xa894
#define CS48L32_EQ3_GAIN1 0xa898
#define CS48L32_EQ3_GAIN2 0xa89c
#define CS48L32_EQ3_BAND1_COEFF1 0xa8a0
#define CS48L32_EQ3_BAND1_COEFF2 0xa8a4
#define CS48L32_EQ3_BAND1_PG 0xa8a8
#define CS48L32_EQ3_BAND2_COEFF1 0xa8ac
#define CS48L32_EQ3_BAND2_COEFF2 0xa8b0
#define CS48L32_EQ3_BAND2_PG 0xa8b4
#define CS48L32_EQ3_BAND3_COEFF1 0xa8b8
#define CS48L32_EQ3_BAND3_COEFF2 0xa8bc
#define CS48L32_EQ3_BAND3_PG 0xa8c0
#define CS48L32_EQ3_BAND4_COEFF1 0xa8c4
#define CS48L32_EQ3_BAND4_COEFF2 0xa8c8
#define CS48L32_EQ3_BAND4_PG 0xa8cc
#define CS48L32_EQ3_BAND5_COEFF1 0xa8d0
#define CS48L32_EQ3_BAND5_PG 0xa8d8
#define CS48L32_EQ4_GAIN1 0xa8dc
#define CS48L32_EQ4_GAIN2 0xa8e0
#define CS48L32_EQ4_BAND1_COEFF1 0xa8e4
#define CS48L32_EQ4_BAND1_COEFF2 0xa8e8
#define CS48L32_EQ4_BAND1_PG 0xa8ec
#define CS48L32_EQ4_BAND2_COEFF1 0xa8f0
#define CS48L32_EQ4_BAND2_COEFF2 0xa8f4
#define CS48L32_EQ4_BAND2_PG 0xa8f8
#define CS48L32_EQ4_BAND3_COEFF1 0xa8fc
#define CS48L32_EQ4_BAND3_COEFF2 0xa900
#define CS48L32_EQ4_BAND3_PG 0xa904
#define CS48L32_EQ4_BAND4_COEFF1 0xa908
#define CS48L32_EQ4_BAND4_COEFF2 0xa90c
#define CS48L32_EQ4_BAND4_PG 0xa910
#define CS48L32_EQ4_BAND5_COEFF1 0xa914
#define CS48L32_EQ4_BAND5_PG 0xa91c
#define CS48L32_LHPF_CONTROL1 0xaa30
#define CS48L32_LHPF_CONTROL2 0xaa34
#define CS48L32_LHPF1_COEFF 0xaa38
#define CS48L32_LHPF2_COEFF 0xaa3c
#define CS48L32_LHPF3_COEFF 0xaa40
#define CS48L32_LHPF4_COEFF 0xaa44
#define CS48L32_DRC1_CONTROL1 0xab00
#define CS48L32_DRC1_CONTROL4 0xab0c
#define CS48L32_DRC2_CONTROL1 0xab14
#define CS48L32_DRC2_CONTROL4 0xab20
#define CS48L32_TONE_GENERATOR1 0xb000
#define CS48L32_TONE_GENERATOR2 0xb004
#define CS48L32_COMFORT_NOISE_GENERATOR 0xb400
#define CS48L32_US_CONTROL 0xb800
#define CS48L32_US1_CONTROL 0xb804
#define CS48L32_US1_DET_CONTROL 0xb808
#define CS48L32_US2_CONTROL 0xb814
#define CS48L32_US2_DET_CONTROL 0xb818
#define CS48L32_DSP1_XM_SRAM_IBUS_SETUP_0 0x1700c
#define CS48L32_DSP1_XM_SRAM_IBUS_SETUP_1 0x17010
#define CS48L32_DSP1_XM_SRAM_IBUS_SETUP_24 0x1706c
#define CS48L32_DSP1_YM_SRAM_IBUS_SETUP_0 0x17070
#define CS48L32_DSP1_YM_SRAM_IBUS_SETUP_1 0x17074
#define CS48L32_DSP1_YM_SRAM_IBUS_SETUP_8 0x17090
#define CS48L32_DSP1_PM_SRAM_IBUS_SETUP_0 0x17094
#define CS48L32_DSP1_PM_SRAM_IBUS_SETUP_1 0x17098
#define CS48L32_DSP1_PM_SRAM_IBUS_SETUP_7 0x170b0
#define CS48L32_IRQ1_STATUS 0x18004
#define CS48L32_IRQ1_EINT_1 0x18010
#define CS48L32_IRQ1_EINT_2 0x18014
#define CS48L32_IRQ1_EINT_7 0x18028
#define CS48L32_IRQ1_EINT_9 0x18030
#define CS48L32_IRQ1_EINT_11 0x18038
#define CS48L32_IRQ1_STS_1 0x18090
#define CS48L32_IRQ1_STS_6 0x180a4
#define CS48L32_IRQ1_STS_11 0x180b8
#define CS48L32_IRQ1_MASK_1 0x18110
#define CS48L32_IRQ1_MASK_2 0x18114
#define CS48L32_IRQ1_MASK_7 0x18128
#define CS48L32_IRQ1_MASK_9 0x18130
#define CS48L32_IRQ1_MASK_11 0x18138
#define CS48L32_DSP1_XMEM_PACKED_0 0x2000000
#define CS48L32_DSP1_XMEM_PACKED_LAST 0x208fff0
#define CS48L32_DSP1_SYS_INFO_ID 0x25e0000
#define CS48L32_DSP1_AHBM_WINDOW_DEBUG_1 0x25e2044
#define CS48L32_DSP1_XMEM_UNPACKED24_0 0x2800000
#define CS48L32_DSP1_XMEM_UNPACKED24_LAST 0x28bfff4
#define CS48L32_DSP1_CLOCK_FREQ 0x2b80000
#define CS48L32_DSP1_SAMPLE_RATE_TX8 0x2b802b8
#define CS48L32_DSP1_SCRATCH1 0x2b805c0
#define CS48L32_DSP1_SCRATCH4 0x2b805d8
#define CS48L32_DSP1_CCM_CORE_CONTROL 0x2bc1000
#define CS48L32_DSP1_STREAM_ARB_RESYNC_MSK1 0x2bc5a00
#define CS48L32_DSP1_YMEM_PACKED_0 0x2c00000
#define CS48L32_DSP1_YMEM_PACKED_LAST 0x2c2fff0
#define CS48L32_DSP1_YMEM_UNPACKED24_0 0x3400000
#define CS48L32_DSP1_YMEM_UNPACKED24_LAST 0x343fff4
#define CS48L32_DSP1_PMEM_0 0x3800000
#define CS48L32_DSP1_PMEM_LAST 0x3845fe8
/* (0x0) DEVID */
#define CS48L32_DEVID_MASK 0x00ffffff
#define CS48L32_DEVID_SHIFT 0
/* (0x4) REVID */
#define CS48L32_AREVID_MASK 0x000000f0
#define CS48L32_AREVID_SHIFT 4
#define CS48L32_MTLREVID_MASK 0x0000000f
#define CS48L32_MTLREVID_SHIFT 0
/* (0x10) OTPID */
#define CS48L32_OTPID_MASK 0x0000000f
/* (0x0804) MCU_CTRL1 */
#define CS48L32_MCU_STS_MASK 0x0000ff00
#define CS48L32_MCU_STS_SHIFT 8
/* (0xc08) GPIO1_CTRL1 */
#define CS48L32_GPIOX_CTRL1_FN_MASK 0x000003ff
/* (0x1020) OUTPUT_SYS_CLK */
#define CS48L32_OPCLK_EN_SHIFT 15
#define CS48L32_OPCLK_DIV_MASK 0x000000f8
#define CS48L32_OPCLK_DIV_SHIFT 3
#define CS48L32_OPCLK_SEL_MASK 0x00000007
/* (0x105c) AUXPDM_CTRL2 */
#define CS48L32_AUXPDMDAT2_SRC_SHIFT 4
#define CS48L32_AUXPDMDAT1_SRC_SHIFT 0
/* (0x1400) CLOCK32K */
#define CS48L32_CLK_32K_EN_MASK 0x00000040
#define CS48L32_CLK_32K_SRC_MASK 0x00000003
/* (0x1404) SYSTEM_CLOCK1 */
#define CS48L32_SYSCLK_FRAC_MASK 0x00008000
#define CS48L32_SYSCLK_FREQ_MASK 0x00000700
#define CS48L32_SYSCLK_FREQ_SHIFT 8
#define CS48L32_SYSCLK_EN_SHIFT 6
#define CS48L32_SYSCLK_SRC_MASK 0x0000001f
#define CS48L32_SYSCLK_SRC_SHIFT 0
/* (0x1408) SYSTEM_CLOCK2 */
#define CS48L32_SYSCLK_FREQ_STS_MASK 0x00000700
#define CS48L32_SYSCLK_FREQ_STS_SHIFT 8
/* (0x1420) SAMPLE_RATE1 */
#define CS48L32_SAMPLE_RATE_1_MASK 0x0000001f
#define CS48L32_SAMPLE_RATE_1_SHIFT 0
/* (0x1510) DSP_CLOCK1 */
#define CS48L32_DSP_CLK_FREQ_MASK 0xffff0000
#define CS48L32_DSP_CLK_FREQ_SHIFT 16
/* (0x1c00) FLL_CONTROL1 */
#define CS48L32_FLL_CTRL_UPD_MASK 0x00000004
#define CS48L32_FLL_HOLD_MASK 0x00000002
#define CS48L32_FLL_EN_MASK 0x00000001
/* (0x1c04) FLL_CONTROL2 */
#define CS48L32_FLL_LOCKDET_THR_MASK 0xf0000000
#define CS48L32_FLL_LOCKDET_THR_SHIFT 28
#define CS48L32_FLL_LOCKDET_MASK 0x08000000
#define CS48L32_FLL_PHASEDET_MASK 0x00400000
#define CS48L32_FLL_PHASEDET_SHIFT 22
#define CS48L32_FLL_REFCLK_DIV_MASK 0x00030000
#define CS48L32_FLL_REFCLK_DIV_SHIFT 16
#define CS48L32_FLL_REFCLK_SRC_MASK 0x0000f000
#define CS48L32_FLL_REFCLK_SRC_SHIFT 12
#define CS48L32_FLL_N_MASK 0x000003ff
#define CS48L32_FLL_N_SHIFT 0
/* (0x1c08) FLL_CONTROL3 */
#define CS48L32_FLL_LAMBDA_MASK 0xffff0000
#define CS48L32_FLL_LAMBDA_SHIFT 16
#define CS48L32_FLL_THETA_MASK 0x0000ffff
#define CS48L32_FLL_THETA_SHIFT 0
/* (0x1c0c) FLL_CONTROL4 */
#define CS48L32_FLL_FD_GAIN_COARSE_SHIFT 16
#define CS48L32_FLL_HP_MASK 0x00003000
#define CS48L32_FLL_HP_SHIFT 12
#define CS48L32_FLL_FB_DIV_MASK 0x000003ff
#define CS48L32_FLL_FB_DIV_SHIFT 0
/* (0x1c10) FLL_CONTROL5 */
#define CS48L32_FLL_FRC_INTEG_UPD_MASK 0x00008000
/* (0x2000) CHARGE_PUMP1 */
#define CS48L32_CP2_BYPASS_SHIFT 1
#define CS48L32_CP2_EN_SHIFT 0
/* (0x2408) LDO2_CTRL1 */
#define CS48L32_LDO2_VSEL_MASK 0x000007e0
#define CS48L32_LDO2_VSEL_SHIFT 5
/* (0x2410) MICBIAS_CTRL1 */
#define CS48L32_MICB1_LVL_MASK 0x000001e0
#define CS48L32_MICB1_LVL_SHIFT 5
#define CS48L32_MICB1_EN_SHIFT 0
/* (0x2418) MICBIAS_CTRL5 */
#define CS48L32_MICB1C_EN_SHIFT 8
#define CS48L32_MICB1B_EN_SHIFT 4
#define CS48L32_MICB1A_EN_SHIFT 0
/* (0x2710) IRQ1_CTRL_AOD */
#define CS48L32_IRQ_POL_MASK 0x00000400
/* (0x4000) INPUT_CONTROL */
#define CS48L32_IN2L_EN_SHIFT 3
#define CS48L32_IN2R_EN_SHIFT 2
#define CS48L32_IN1L_EN_SHIFT 1
#define CS48L32_IN1R_EN_SHIFT 0
/* (0x400c) INPUT_CONTROL2 */
#define CS48L32_PDM_FLLCLK_SRC_MASK 0x0000000f
#define CS48L32_PDM_FLLCLK_SRC_SHIFT 0
/* (0x4014) INPUT_CONTROL3 */
#define CS48L32_IN_VU 0x20000000
#define CS48L32_IN_VU_MASK 0x20000000
#define CS48L32_IN_VU_SHIFT 29
#define CS48L32_IN_VU_WIDTH 1
/* (0x4020) INPUT1_CONTROL1 */
#define CS48L32_IN1_OSR_SHIFT 16
#define CS48L32_IN1_PDM_SUP_MASK 0x00000300
#define CS48L32_IN1_PDM_SUP_SHIFT 8
#define CS48L32_IN1_MODE_SHIFT 0
/*
* (0x4024) IN1L_CONTROL1
* (0x4044) IN1R_CONTROL1
*/
#define CS48L32_INx_SRC_MASK 0x30000000
#define CS48L32_INx_SRC_SHIFT 28
#define CS48L32_INx_RATE_MASK 0x0000f800
#define CS48L32_INx_RATE_SHIFT 11
#define CS48L32_INx_HPF_SHIFT 2
#define CS48L32_INx_LP_MODE_SHIFT 0
/*
* (0x4028) IN1L_CONTROL2
* (0x4048) IN1R_CONTROL2
*/
#define CS48L32_INx_MUTE_MASK 0x10000000
#define CS48L32_INx_VOL_SHIFT 16
#define CS48L32_INx_PGA_VOL_SHIFT 1
/* (0x4244) INPUT_HPF_CONTROL */
#define CS48L32_IN_HPF_CUT_SHIFT 0
/* (0x4248) INPUT_VOL_CONTROL */
#define CS48L32_IN_VD_RAMP_SHIFT 4
#define CS48L32_IN_VI_RAMP_SHIFT 0
/* (0x4308) AUXPDM1_CONTROL1 */
#define CS48L32_AUXPDM1_FREQ_SHIFT 16
#define CS48L32_AUXPDM1_SRC_MASK 0x00000f00
#define CS48L32_AUXPDM1_SRC_SHIFT 8
/* (0x4688) ADC1L_ANA_CONTROL1 */
/* (0x468c) ADC1R_ANA_CONTROL1 */
#define CS48L32_ADC1x_INT_ENA_FRC_MASK 0x00000002
/* (0x6004) ASPn_CONTROL1 */
#define CS48L32_ASP_RATE_MASK 0x00001f00
#define CS48L32_ASP_RATE_SHIFT 8
#define CS48L32_ASP_BCLK_FREQ_MASK 0x0000003f
/* (0x6008) ASPn_CONTROL2 */
#define CS48L32_ASP_RX_WIDTH_MASK 0xff000000
#define CS48L32_ASP_RX_WIDTH_SHIFT 24
#define CS48L32_ASP_TX_WIDTH_MASK 0x00ff0000
#define CS48L32_ASP_TX_WIDTH_SHIFT 16
#define CS48L32_ASP_FMT_MASK 0x00000700
#define CS48L32_ASP_FMT_SHIFT 8
#define CS48L32_ASP_BCLK_INV_MASK 0x00000040
#define CS48L32_ASP_BCLK_MSTR_MASK 0x00000010
#define CS48L32_ASP_FSYNC_INV_MASK 0x00000004
#define CS48L32_ASP_FSYNC_MSTR_MASK 0x00000001
/* (0x6010) ASPn_CONTROL3 */
#define CS48L32_ASP_DOUT_HIZ_MASK 0x00000003
/* (0x6030) ASPn_DATA_CONTROL1 */
#define CS48L32_ASP_TX_WL_MASK 0x0000003f
/* (0x6040) ASPn_DATA_CONTROL5 */
#define CS48L32_ASP_RX_WL_MASK 0x0000003f
/* (0x82xx - 0x90xx) *_INPUT[1-4] */
#define CS48L32_MIXER_VOL_MASK 0x00FE0000
#define CS48L32_MIXER_VOL_SHIFT 17
#define CS48L32_MIXER_VOL_WIDTH 7
#define CS48L32_MIXER_SRC_MASK 0x000001ff
#define CS48L32_MIXER_SRC_SHIFT 0
#define CS48L32_MIXER_SRC_WIDTH 9
/* (0xa400) ISRC1_CONTROL1 */
#define CS48L32_ISRC1_FSL_MASK 0xf8000000
#define CS48L32_ISRC1_FSL_SHIFT 27
#define CS48L32_ISRC1_FSH_MASK 0x0000f800
#define CS48L32_ISRC1_FSH_SHIFT 11
/* (0xa404) ISRC1_CONTROL2 */
#define CS48L32_ISRC1_INT4_EN_SHIFT 11
#define CS48L32_ISRC1_INT3_EN_SHIFT 10
#define CS48L32_ISRC1_INT2_EN_SHIFT 9
#define CS48L32_ISRC1_INT1_EN_SHIFT 8
#define CS48L32_ISRC1_DEC4_EN_SHIFT 3
#define CS48L32_ISRC1_DEC3_EN_SHIFT 2
#define CS48L32_ISRC1_DEC2_EN_SHIFT 1
#define CS48L32_ISRC1_DEC1_EN_SHIFT 0
/* (0xa800) FX_SAMPLE_RATE */
#define CS48L32_FX_RATE_MASK 0x0000f800
#define CS48L32_FX_RATE_SHIFT 11
/* (0xab00) DRC1_CONTROL1 */
#define CS48L32_DRC1L_EN_SHIFT 1
#define CS48L32_DRC1R_EN_SHIFT 0
/* (0xb400) Comfort_Noise_Generator */
#define CS48L32_NOISE_GEN_RATE_MASK 0x0000f800
#define CS48L32_NOISE_GEN_RATE_SHIFT 11
#define CS48L32_NOISE_GEN_EN_SHIFT 5
#define CS48L32_NOISE_GEN_GAIN_SHIFT 0
/* (0xb800) US_CONTROL */
#define CS48L32_US1_DET_EN_SHIFT 8
/* (0xb804) US1_CONTROL */
#define CS48L32_US1_RATE_MASK 0xf8000000
#define CS48L32_US1_RATE_SHIFT 27
#define CS48L32_US1_GAIN_SHIFT 12
#define CS48L32_US1_SRC_MASK 0x00000f00
#define CS48L32_US1_SRC_SHIFT 8
#define CS48L32_US1_FREQ_MASK 0x00000070
#define CS48L32_US1_FREQ_SHIFT 4
/* (0xb808) US1_DET_CONTROL */
#define CS48L32_US1_DET_DCY_SHIFT 28
#define CS48L32_US1_DET_HOLD_SHIFT 24
#define CS48L32_US1_DET_NUM_SHIFT 20
#define CS48L32_US1_DET_THR_SHIFT 16
#define CS48L32_US1_DET_LPF_CUT_SHIFT 5
#define CS48L32_US1_DET_LPF_SHIFT 4
/* (0x18004) IRQ1_STATUS */
#define CS48L32_IRQ1_STS_MASK 0x00000001
/* (0x18014) IRQ1_EINT_2 */
#define CS48L32_BOOT_DONE_EINT1_MASK 0x00000008
/* (0x18028) IRQ1_EINT_7 */
#define CS48L32_DSP1_MPU_ERR_EINT1_MASK 0x00200000
#define CS48L32_DSP1_WDT_EXPIRE_EINT1_MASK 0x00100000
/* (0x18030) IRQ1_EINT_9 */
#define CS48L32_DSP1_IRQ0_EINT1_MASK 0x00000001
/* (0x180a4) IRQ1_STS_6 */
#define CS48L32_FLL1_LOCK_STS1_MASK 0x00000001
#endif

View File

@@ -38,8 +38,6 @@ int snd_dmaengine_pcm_open(struct snd_pcm_substream *substream,
int snd_dmaengine_pcm_close(struct snd_pcm_substream *substream);
int snd_dmaengine_pcm_sync_stop(struct snd_pcm_substream *substream);
int snd_dmaengine_pcm_open_request_chan(struct snd_pcm_substream *substream,
dma_filter_fn filter_fn, void *filter_data);
int snd_dmaengine_pcm_close_release_chan(struct snd_pcm_substream *substream);
struct dma_chan *snd_dmaengine_pcm_request_channel(dma_filter_fn filter_fn,

View File

@@ -513,22 +513,6 @@ struct _SND_IW_LFO_PROGRAM {
unsigned short depth;
};
#if 0
extern irqreturn_t snd_gf1_lfo_effect_interrupt(struct snd_gus_card * gus, snd_gf1_voice_t * voice);
#endif
extern void snd_gf1_lfo_init(struct snd_gus_card * gus);
extern void snd_gf1_lfo_done(struct snd_gus_card * gus);
extern void snd_gf1_lfo_program(struct snd_gus_card * gus, int voice, int lfo_type, struct _SND_IW_LFO_PROGRAM *program);
extern void snd_gf1_lfo_enable(struct snd_gus_card * gus, int voice, int lfo_type);
extern void snd_gf1_lfo_disable(struct snd_gus_card * gus, int voice, int lfo_type);
extern void snd_gf1_lfo_change_freq(struct snd_gus_card * gus, int voice, int lfo_type, int freq);
extern void snd_gf1_lfo_change_depth(struct snd_gus_card * gus, int voice, int lfo_type, int depth);
extern void snd_gf1_lfo_setup(struct snd_gus_card * gus, int voice, int lfo_type, int freq, int current_depth, int depth, int sweep, int shape);
extern void snd_gf1_lfo_shutdown(struct snd_gus_card * gus, int voice, int lfo_type);
#if 0
extern void snd_gf1_lfo_command(struct snd_gus_card * gus, int voice, unsigned char *command);
#endif
/* gus_mem.c */
void snd_gf1_mem_lock(struct snd_gf1_mem * alloc, int xup);
@@ -578,14 +562,8 @@ int snd_gf1_new_mixer(struct snd_gus_card * gus);
int snd_gf1_pcm_new(struct snd_gus_card *gus, int pcm_dev, int control_index);
#ifdef CONFIG_SND_DEBUG
extern void snd_gf1_print_voice_registers(struct snd_gus_card * gus);
#endif
/* gus.c */
int snd_gus_use_inc(struct snd_gus_card * gus);
void snd_gus_use_dec(struct snd_gus_card * gus);
int snd_gus_create(struct snd_card *card,
unsigned long port,
int irq, int dma1, int dma2,

View File

@@ -223,7 +223,7 @@ struct hdac_driver {
struct device_driver driver;
int type;
const struct hda_device_id *id_table;
int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
int (*match)(struct hdac_device *dev, const struct hdac_driver *drv);
void (*unsol_event)(struct hdac_device *dev, unsigned int event);
/* fields used by ext bus APIs */
@@ -235,7 +235,7 @@ struct hdac_driver {
#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
const struct hda_device_id *
hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
hdac_get_device_id(struct hdac_device *hdev, const struct hdac_driver *drv);
/*
* Bus verb operators
@@ -598,8 +598,6 @@ void snd_hdac_stream_spbcap_enable(struct hdac_bus *chip,
bool enable, int index);
int snd_hdac_stream_set_spib(struct hdac_bus *bus,
struct hdac_stream *azx_dev, u32 value);
int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus,
struct hdac_stream *azx_dev);
void snd_hdac_stream_drsm_enable(struct hdac_bus *bus,
bool enable, int index);
int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev);

View File

@@ -22,6 +22,7 @@ void snd_hdac_ext_bus_ppcap_enable(struct hdac_bus *chip, bool enable);
void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_bus *chip, bool enable);
int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_bus *bus);
struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_id(struct hdac_bus *bus, u32 id);
struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_addr(struct hdac_bus *bus, int addr);
struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_name(struct hdac_bus *bus,
const char *codec_name);
@@ -97,12 +98,17 @@ struct hdac_ext_link {
void __iomem *ml_addr; /* link output stream reg pointer */
u32 lcaps; /* link capablities */
u16 lsdiid; /* link sdi identifier */
u32 id;
u8 slcount;
int ref_count;
struct list_head list;
};
#define hdac_ext_link_alt(link) ((link)->lcaps & AZX_ML_HDA_LCAP_ALT)
#define hdac_ext_link_ofls(link) ((link)->lcaps & AZX_ML_HDA_LCAP_OFLS)
int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *hlink);
int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *hlink);
int snd_hdac_ext_bus_link_power_up_all(struct hdac_bus *bus);

View File

@@ -79,7 +79,6 @@ int snd_jack_new(struct snd_card *card, const char *id, int type,
struct snd_jack **jack, bool initial_kctl, bool phantom_jack);
int snd_jack_add_new_kctl(struct snd_jack *jack, const char * name, int mask);
#ifdef CONFIG_SND_JACK_INPUT_DEV
void snd_jack_set_parent(struct snd_jack *jack, struct device *parent);
int snd_jack_set_key(struct snd_jack *jack, enum snd_jack_types type,
int keytype);
#endif
@@ -104,11 +103,6 @@ static inline void snd_jack_report(struct snd_jack *jack, int status)
#endif
#if !defined(CONFIG_SND_JACK) || !defined(CONFIG_SND_JACK_INPUT_DEV)
static inline void snd_jack_set_parent(struct snd_jack *jack,
struct device *parent)
{
}
static inline int snd_jack_set_key(struct snd_jack *jack,
enum snd_jack_types type,
int keytype)

View File

@@ -1251,8 +1251,6 @@ unsigned int snd_pcm_rate_to_rate_bit(unsigned int rate);
unsigned int snd_pcm_rate_bit_to_rate(unsigned int rate_bit);
unsigned int snd_pcm_rate_mask_intersect(unsigned int rates_a,
unsigned int rates_b);
unsigned int snd_pcm_rate_range_to_bits(unsigned int rate_min,
unsigned int rate_max);
/**
* snd_pcm_set_runtime_buffer - Set the PCM runtime buffer

42
include/sound/sdca_asoc.h Normal file
View File

@@ -0,0 +1,42 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* The MIPI SDCA specification is available for public downloads at
* https://www.mipi.org/mipi-sdca-v1-0-download
*
* Copyright (C) 2025 Cirrus Logic, Inc. and
* Cirrus Logic International Semiconductor Ltd.
*/
#ifndef __SDCA_ASOC_H__
#define __SDCA_ASOC_H__
struct device;
struct sdca_function_data;
struct snd_kcontrol_new;
struct snd_soc_component_driver;
struct snd_soc_dai_driver;
struct snd_soc_dai_ops;
struct snd_soc_dapm_route;
struct snd_soc_dapm_widget;
int sdca_asoc_count_component(struct device *dev, struct sdca_function_data *function,
int *num_widgets, int *num_routes, int *num_controls,
int *num_dais);
int sdca_asoc_populate_dapm(struct device *dev, struct sdca_function_data *function,
struct snd_soc_dapm_widget *widgets,
struct snd_soc_dapm_route *routes);
int sdca_asoc_populate_controls(struct device *dev,
struct sdca_function_data *function,
struct snd_kcontrol_new *kctl);
int sdca_asoc_populate_dais(struct device *dev, struct sdca_function_data *function,
struct snd_soc_dai_driver *dais,
const struct snd_soc_dai_ops *ops);
int sdca_asoc_populate_component(struct device *dev,
struct sdca_function_data *function,
struct snd_soc_component_driver *component_drv,
struct snd_soc_dai_driver **dai_drv, int *num_dai_drv,
const struct snd_soc_dai_ops *ops);
#endif // __SDCA_ASOC_H__

View File

@@ -125,7 +125,7 @@ struct sdca_init_write {
* macros.
*
* Short hand to specific a Control type statically for example:
* SDAC_CTL_TYPE_S(IT, MIC_BIAS).
* SDCA_CTL_TYPE_S(IT, MIC_BIAS).
*/
#define SDCA_CTL_TYPE_S(ent, sel) SDCA_CTL_TYPE(SDCA_ENTITY_TYPE_##ent, \
SDCA_CTL_##ent##_##sel)
@@ -168,6 +168,20 @@ enum sdca_ot_controls {
SDCA_CTL_OT_NDAI_PACKETTYPE = 0x17,
};
/**
* enum sdca_usage_range - Column definitions for Usage
*/
enum sdca_usage_range {
SDCA_USAGE_NUMBER = 0,
SDCA_USAGE_CBN = 1,
SDCA_USAGE_SAMPLE_RATE = 2,
SDCA_USAGE_SAMPLE_WIDTH = 3,
SDCA_USAGE_FULL_SCALE = 4,
SDCA_USAGE_NOISE_FLOOR = 5,
SDCA_USAGE_TAG = 6,
SDCA_USAGE_NCOLS = 7,
};
/**
* enum sdca_mu_controls - SDCA Controls for Mixer Unit
*
@@ -206,6 +220,16 @@ enum sdca_fu_controls {
SDCA_CTL_FU_LATENCY = 0x10,
};
/**
* enum sdca_volume_range - Column definitions for Q7.8dB volumes/gains
*/
enum sdca_volume_range {
SDCA_VOLUME_LINEAR_MIN = 0,
SDCA_VOLUME_LINEAR_MAX = 1,
SDCA_VOLUME_LINEAR_STEP = 2,
SDCA_VOLUME_LINEAR_NCOLS = 3,
};
/**
* enum sdca_xu_controls - SDCA Controls for Extension Unit
*
@@ -236,6 +260,15 @@ enum sdca_cs_controls {
SDCA_CTL_CS_SAMPLERATEINDEX = 0x10,
};
/**
* enum sdca_samplerateindex_range - Column definitions for SampleRateIndex
*/
enum sdca_samplerateindex_range {
SDCA_SAMPLERATEINDEX_INDEX = 0,
SDCA_SAMPLERATEINDEX_RATE = 1,
SDCA_SAMPLERATEINDEX_NCOLS = 2,
};
/**
* enum sdca_cx_controls - SDCA Controls for Clock Selector
*
@@ -257,6 +290,14 @@ enum sdca_pde_controls {
SDCA_CTL_PDE_ACTUAL_PS = 0x10,
};
/**
* enum sdca_requested_ps_range - Column definitions for Requested PS
*/
enum sdca_requested_ps_range {
SDCA_REQUESTED_PS_STATE = 0,
SDCA_REQUESTED_PS_NCOLS = 1,
};
/**
* enum sdca_ge_controls - SDCA Controls for Group Unit
*
@@ -268,6 +309,15 @@ enum sdca_ge_controls {
SDCA_CTL_GE_DETECTED_MODE = 0x02,
};
/**
* enum sdca_selected_mode_range - Column definitions for Selected Mode
*/
enum sdca_selected_mode_range {
SDCA_SELECTED_MODE_INDEX = 0,
SDCA_SELECTED_MODE_TERM_TYPE = 1,
SDCA_SELECTED_MODE_NCOLS = 2,
};
/**
* enum sdca_spe_controls - SDCA Controls for Security & Privacy Unit
*
@@ -773,6 +823,25 @@ enum sdca_terminal_type {
SDCA_TERM_TYPE_PRIVACY_INDICATORS = 0x747,
};
#define SDCA_TERM_TYPE_LINEIN_STEREO_NAME "LineIn Stereo"
#define SDCA_TERM_TYPE_LINEIN_FRONT_LR_NAME "LineIn Front-LR"
#define SDCA_TERM_TYPE_LINEIN_CENTER_LFE_NAME "LineIn Center-LFE"
#define SDCA_TERM_TYPE_LINEIN_SURROUND_LR_NAME "LineIn Surround-LR"
#define SDCA_TERM_TYPE_LINEIN_REAR_LR_NAME "LineIn Rear-LR"
#define SDCA_TERM_TYPE_LINEOUT_STEREO_NAME "LineOut Stereo"
#define SDCA_TERM_TYPE_LINEOUT_FRONT_LR_NAME "LineOut Front-LR"
#define SDCA_TERM_TYPE_LINEOUT_CENTER_LFE_NAME "LineOut Center-LFE"
#define SDCA_TERM_TYPE_LINEOUT_SURROUND_LR_NAME "LineOut Surround-LR"
#define SDCA_TERM_TYPE_LINEOUT_REAR_LR_NAME "LineOut Rear-LR"
#define SDCA_TERM_TYPE_MIC_JACK_NAME "Microphone"
#define SDCA_TERM_TYPE_STEREO_JACK_NAME "Speaker Stereo"
#define SDCA_TERM_TYPE_FRONT_LR_JACK_NAME "Speaker Front-LR"
#define SDCA_TERM_TYPE_CENTER_LFE_JACK_NAME "Speaker Center-LFE"
#define SDCA_TERM_TYPE_SURROUND_LR_JACK_NAME "Speaker Surround-LR"
#define SDCA_TERM_TYPE_REAR_LR_JACK_NAME "Speaker Rear-LR"
#define SDCA_TERM_TYPE_HEADPHONE_JACK_NAME "Headphone"
#define SDCA_TERM_TYPE_HEADSET_JACK_NAME "Headset"
/**
* enum sdca_connector_type - SDCA Connector Types
*

View File

@@ -110,12 +110,8 @@ struct _snd_wavefront_card {
};
extern void snd_wavefront_internal_interrupt (snd_wavefront_card_t *card);
extern int snd_wavefront_detect_irq (snd_wavefront_t *dev) ;
extern int snd_wavefront_check_irq (snd_wavefront_t *dev, int irq);
extern int snd_wavefront_restart (snd_wavefront_t *dev);
extern int snd_wavefront_start (snd_wavefront_t *dev);
extern int snd_wavefront_detect (snd_wavefront_card_t *card);
extern int snd_wavefront_config_midi (snd_wavefront_t *dev) ;
extern int snd_wavefront_cmd (snd_wavefront_t *, int, unsigned char *,
unsigned char *);

View File

@@ -10,6 +10,7 @@
#include <linux/acpi.h>
#include <linux/mod_devicetable.h>
#include <linux/soundwire/sdw.h>
#include <sound/soc.h>
struct snd_soc_acpi_package_context {
char *name; /* package name */
@@ -193,6 +194,15 @@ struct snd_soc_acpi_link_adr {
* is not constant since this field may be updated at run-time
* @sof_tplg_filename: Sound Open Firmware topology file name, if enabled
* @tplg_quirk_mask: quirks to select different topology files dynamically
* @get_function_tplg_files: This is an optional callback, if specified then instead of
* the single sof_tplg_filename the callback will return the list of function topology
* files to be loaded.
* Return value: The number of the files or negative ERRNO. 0 means that the single topology
* file should be used, no function topology split can be used on the machine.
* @card: the pointer of the card
* @mach: the pointer of the machine driver
* @prefix: the prefix of the topology file name. Typically, it is the path.
* @tplg_files: the pointer of the array of the topology file names.
*/
/* Descriptor for SST ASoC machine driver */
struct snd_soc_acpi_mach {
@@ -212,6 +222,9 @@ struct snd_soc_acpi_mach {
struct snd_soc_acpi_mach_params mach_params;
const char *sof_tplg_filename;
const u32 tplg_quirk_mask;
int (*get_function_tplg_files)(struct snd_soc_card *card,
const struct snd_soc_acpi_mach *mach,
const char *prefix, const char ***tplg_files);
};
#define SND_SOC_ACPI_MAX_CODECS 3

View File

@@ -445,6 +445,10 @@ int snd_soc_dapm_get_pin_switch(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *uncontrol);
int snd_soc_dapm_put_pin_switch(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *uncontrol);
int snd_soc_dapm_get_component_pin_switch(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *uncontrol);
int snd_soc_dapm_put_component_pin_switch(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *uncontrol);
int snd_soc_dapm_new_controls(struct snd_soc_dapm_context *dapm,
const struct snd_soc_dapm_widget *widget, unsigned int num);
struct snd_soc_dapm_widget *snd_soc_dapm_new_control(struct snd_soc_dapm_context *dapm,

View File

@@ -394,27 +394,20 @@ struct platform_device;
#define SOC_ENUM_SINGLE_VIRT_DECL(name, xtexts) \
const struct soc_enum name = SOC_ENUM_SINGLE_VIRT(ARRAY_SIZE(xtexts), xtexts)
struct snd_jack;
struct snd_soc_card;
struct snd_soc_pcm_stream;
struct snd_soc_ops;
struct snd_soc_pcm_runtime;
struct snd_soc_dai;
struct snd_soc_dai_driver;
struct snd_soc_dai_link;
struct snd_soc_component;
struct snd_soc_component_driver;
struct soc_enum;
struct snd_soc_jack;
struct snd_soc_jack_zone;
struct snd_soc_jack_pin;
#include <sound/soc-dapm.h>
#include <sound/soc-dpcm.h>
#include <sound/soc-topology.h>
struct snd_soc_jack_gpio;
enum snd_soc_pcm_subclass {
SND_SOC_PCM_CLASS_PCM = 0,
SND_SOC_PCM_CLASS_BE = 1,
@@ -423,6 +416,7 @@ enum snd_soc_pcm_subclass {
int snd_soc_register_card(struct snd_soc_card *card);
void snd_soc_unregister_card(struct snd_soc_card *card);
int devm_snd_soc_register_card(struct device *dev, struct snd_soc_card *card);
int devm_snd_soc_register_deferrable_card(struct device *dev, struct snd_soc_card *card);
#ifdef CONFIG_PM_SLEEP
int snd_soc_suspend(struct device *dev);
int snd_soc_resume(struct device *dev);
@@ -450,7 +444,7 @@ int snd_soc_register_component(struct device *dev,
int devm_snd_soc_register_component(struct device *dev,
const struct snd_soc_component_driver *component_driver,
struct snd_soc_dai_driver *dai_drv, int num_dai);
void snd_soc_unregister_component(struct device *dev);
#define snd_soc_unregister_component(dev) snd_soc_unregister_component_by_driver(dev, NULL)
void snd_soc_unregister_component_by_driver(struct device *dev,
const struct snd_soc_component_driver *component_driver);
struct snd_soc_component *snd_soc_lookup_component_nolocked(struct device *dev,
@@ -468,8 +462,6 @@ static inline int snd_soc_new_compress(struct snd_soc_pcm_runtime *rtd)
}
#endif
void snd_soc_disconnect_sync(struct device *dev);
struct snd_soc_pcm_runtime *snd_soc_get_pcm_runtime(struct snd_soc_card *card,
struct snd_soc_dai_link *dai_link);
@@ -935,7 +927,7 @@ snd_soc_link_to_platform(struct snd_soc_dai_link *link, int n) {
extern struct snd_soc_dai_link_component null_dailink_component[0];
extern struct snd_soc_dai_link_component snd_soc_dummy_dlc;
int snd_soc_dlc_is_dummy(struct snd_soc_dai_link_component *dlc);
struct snd_soc_codec_conf {
/*
@@ -1087,6 +1079,7 @@ struct snd_soc_card {
unsigned int fully_routed:1;
unsigned int probed:1;
unsigned int component_chaining:1;
struct device *devres_dev;
void *drvdata;
};

View File

@@ -159,9 +159,8 @@ void asoc_sdw_init_dai_link(struct device *dev, struct snd_soc_dai_link *dai_lin
int asoc_sdw_init_simple_dai_link(struct device *dev, struct snd_soc_dai_link *dai_links,
int *be_id, char *name, int playback, int capture,
const char *cpu_dai_name, const char *platform_comp_name,
int num_platforms, const char *codec_name,
const char *codec_dai_name, int no_pcm,
int (*init)(struct snd_soc_pcm_runtime *rtd),
const char *codec_name, const char *codec_dai_name,
int no_pcm, int (*init)(struct snd_soc_pcm_runtime *rtd),
const struct snd_soc_ops *ops);
int asoc_sdw_count_sdw_endpoints(struct snd_soc_card *card, int *num_devs, int *num_ends);

View File

@@ -106,6 +106,7 @@ struct snd_sof_pdata {
const char *fw_filename;
const char *tplg_filename_prefix;
const char *tplg_filename;
bool disable_function_topology;
/* loadable external libraries available under this directory */
const char *fw_lib_prefix;

View File

@@ -0,0 +1,37 @@
/* SPDX-License-Identifier: GPL-2.0 */
//
// ALSA SoC Texas Instruments TAS2563/TAS2781 Audio Smart Amplifier
//
// Copyright (C) 2025 Texas Instruments Incorporated
// https://www.ti.com
//
// The TAS2563/TAS2781 driver implements a flexible and configurable
// algo coefficient setting for one, two, or even multiple
// TAS2563/TAS2781 chips.
//
// Author: Shenghao Ding <shenghao-ding@ti.com>
//
#ifndef __TAS2781_COMLIB_I2C_H__
#define __TAS2781_COMLIB_I2C_H__
void tasdevice_reset(struct tasdevice_priv *tas_dev);
int tascodec_init(struct tasdevice_priv *tas_priv, void *codec,
struct module *module,
void (*cont)(const struct firmware *fw, void *context));
struct tasdevice_priv *tasdevice_kzalloc(struct i2c_client *i2c);
int tasdevice_init(struct tasdevice_priv *tas_priv);
int tasdev_chn_switch(struct tasdevice_priv *tas_priv,
unsigned short chn);
int tasdevice_dev_update_bits(
struct tasdevice_priv *tasdevice, unsigned short chn,
unsigned int reg, unsigned int mask, unsigned int value);
int tasdevice_amp_putvol(struct tasdevice_priv *tas_priv,
struct snd_ctl_elem_value *ucontrol, struct soc_mixer_control *mc);
int tasdevice_amp_getvol(struct tasdevice_priv *tas_priv,
struct snd_ctl_elem_value *ucontrol, struct soc_mixer_control *mc);
int tasdevice_digital_getvol(struct tasdevice_priv *tas_priv,
struct snd_ctl_elem_value *ucontrol, struct soc_mixer_control *mc);
int tasdevice_digital_putvol(struct tasdevice_priv *tas_priv,
struct snd_ctl_elem_value *ucontrol, struct soc_mixer_control *mc);
#endif /* __TAS2781_COMLIB_I2C_H__ */

View File

@@ -32,6 +32,8 @@
SNDRV_PCM_FMTBIT_S24_LE | \
SNDRV_PCM_FMTBIT_S32_LE)
#define TASDEVICE_CRC8_POLYNOMIAL 0x4d
/* PAGE Control Register (available in page0 of each book) */
#define TASDEVICE_PAGE_SELECT 0x00
#define TASDEVICE_BOOKCTL_PAGE 0x00
@@ -47,7 +49,7 @@
#define TASDEVICE_REG_SWRESET TASDEVICE_REG(0x0, 0x0, 0x01)
#define TASDEVICE_REG_SWRESET_RESET BIT(0)
/* I2C Checksum */
/* Checksum */
#define TASDEVICE_CHECKSUM_REG TASDEVICE_REG(0x0, 0x0, 0x7e)
/* XM_340 */
@@ -103,11 +105,6 @@
#define TAS2781_RUNTIME_RE_REG_TF TASDEVICE_REG(0x64, 0x62, 0x48)
#define TAS2781_RUNTIME_RE_REG TASDEVICE_REG(0x64, 0x63, 0x44)
#define TASDEVICE_CMD_SING_W 0x1
#define TASDEVICE_CMD_BURST 0x2
#define TASDEVICE_CMD_DELAY 0x3
#define TASDEVICE_CMD_FIELD_W 0x4
enum audio_device {
TAS2563,
TAS2781,
@@ -119,11 +116,6 @@ enum dspbin_type {
TASDEV_BETA,
};
enum device_catlog_id {
LENOVO = 0,
OTHERS
};
struct bulk_reg_val {
int reg;
unsigned char val[4];
@@ -159,10 +151,33 @@ struct calidata {
unsigned int cali_dat_sz_per_dev;
};
/*
* To enable CONFIG_SND_SOC_TAS2781_ACOUST_I2C will create a bridge to the
* acoustic tuning tool which can tune the chips' acoustic effect. Due to the
* whole directly exposing the registers, there exist some potential risks. So
* this define is invisible in Kconfig, anyone who wants to use acoustic tool
* have to edit the source manually.
*/
#ifdef CONFIG_SND_SOC_TAS2781_ACOUST_I2C
#define TASDEV_DATA_PAYLOAD_SIZE 128
struct acoustic_data {
unsigned char len;
unsigned char id;
unsigned char addr;
unsigned char book;
unsigned char page;
unsigned char reg;
unsigned char data[TASDEV_DATA_PAYLOAD_SIZE];
};
#endif
struct tasdevice_priv {
struct tasdevice tasdevice[TASDEVICE_MAX_CHANNELS];
struct tasdevice_rca rcabin;
struct calidata cali_data;
#ifdef CONFIG_SND_SOC_TAS2781_ACOUST_I2C
struct acoustic_data acou_data;
#endif
struct tasdevice_fw *fmw;
struct gpio_desc *speaker_id;
struct gpio_desc *reset;
@@ -170,7 +185,6 @@ struct tasdevice_priv {
struct regmap *regmap;
struct device *dev;
enum device_catlog_id catlog_id;
unsigned char cal_binaryname[TASDEVICE_MAX_CHANNELS][64];
unsigned char crc8_lkp_tbl[CRC8_TABLE_SIZE];
unsigned char coef_binaryname[64];
@@ -193,6 +207,7 @@ struct tasdevice_priv {
bool force_fwload_status;
bool playback_started;
bool isacpi;
bool isspi;
bool is_user_space_calidata;
unsigned int global_addr;
@@ -210,41 +225,27 @@ struct tasdevice_priv {
int (*tasdevice_load_block)(struct tasdevice_priv *tas_priv,
struct tasdev_blk *block);
int (*save_calibration)(struct tasdevice_priv *tas_priv);
void (*apply_calibration)(struct tasdevice_priv *tas_priv);
int (*change_chn_book)(struct tasdevice_priv *tas_priv,
unsigned short chn, int book);
int (*update_bits)(struct tasdevice_priv *tas_priv,
unsigned short chn, unsigned int reg, unsigned int mask,
unsigned int value);
int (*dev_read)(struct tasdevice_priv *tas_priv,
unsigned short chn, unsigned int reg, unsigned int *value);
int (*dev_bulk_read)(struct tasdevice_priv *tas_priv,
unsigned short chn, unsigned int reg, unsigned char *p_data,
unsigned int n_length);
};
void tasdevice_reset(struct tasdevice_priv *tas_dev);
int tascodec_init(struct tasdevice_priv *tas_priv, void *codec,
struct module *module,
void (*cont)(const struct firmware *fw, void *context));
struct tasdevice_priv *tasdevice_kzalloc(struct i2c_client *i2c);
int tasdevice_init(struct tasdevice_priv *tas_priv);
void tasdevice_remove(struct tasdevice_priv *tas_priv);
int tasdevice_save_calibration(struct tasdevice_priv *tas_priv);
void tasdevice_apply_calibration(struct tasdevice_priv *tas_priv);
int tasdev_chn_switch(struct tasdevice_priv *tas_priv,
unsigned short chn);
int tasdevice_dev_read(struct tasdevice_priv *tas_priv,
unsigned short chn, unsigned int reg, unsigned int *value);
int tasdevice_dev_bulk_read(struct tasdevice_priv *tas_priv,
unsigned short chn, unsigned int reg, unsigned char *p_data,
unsigned int n_length);
int tasdevice_dev_write(struct tasdevice_priv *tas_priv,
unsigned short chn, unsigned int reg, unsigned int value);
int tasdevice_dev_bulk_write(
struct tasdevice_priv *tas_priv, unsigned short chn,
unsigned int reg, unsigned char *p_data, unsigned int n_length);
int tasdevice_dev_bulk_read(struct tasdevice_priv *tas_priv,
unsigned short chn, unsigned int reg, unsigned char *p_data,
unsigned int n_length);
int tasdevice_dev_update_bits(
struct tasdevice_priv *tasdevice, unsigned short chn,
unsigned int reg, unsigned int mask, unsigned int value);
int tasdevice_amp_putvol(struct tasdevice_priv *tas_priv,
struct snd_ctl_elem_value *ucontrol, struct soc_mixer_control *mc);
int tasdevice_amp_getvol(struct tasdevice_priv *tas_priv,
struct snd_ctl_elem_value *ucontrol, struct soc_mixer_control *mc);
int tasdevice_digital_putvol(struct tasdevice_priv *tas_priv,
struct snd_ctl_elem_value *ucontrol, struct soc_mixer_control *mc);
int tasdevice_digital_getvol(struct tasdevice_priv *tas_priv,
struct snd_ctl_elem_value *ucontrol, struct soc_mixer_control *mc);
void tasdevice_remove(struct tasdevice_priv *tas_priv);
#endif /* __TAS2781_H__ */

View File

@@ -1,17 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* TPA6130A2 driver platform header
*
* Copyright (C) Nokia Corporation
*
* Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
*/
#ifndef TPA6130A2_PLAT_H
#define TPA6130A2_PLAT_H
struct tpa6130a2_platform_data {
int power_gpio;
};
#endif

View File

@@ -138,6 +138,25 @@ int string_get_size(u64 size, u64 blk_size, const enum string_size_units units,
}
EXPORT_SYMBOL(string_get_size);
int parse_int_array(const char *buf, size_t count, int **array)
{
int *ints, nints;
get_options(buf, 0, &nints);
if (!nints)
return -ENOENT;
ints = kcalloc(nints + 1, sizeof(*ints), GFP_KERNEL);
if (!ints)
return -ENOMEM;
get_options(buf, nints + 1, ints);
*array = ints;
return 0;
}
EXPORT_SYMBOL(parse_int_array);
/**
* parse_int_array_user - Split string into a sequence of integers
* @from: The user space buffer to read from
@@ -153,30 +172,14 @@ EXPORT_SYMBOL(string_get_size);
*/
int parse_int_array_user(const char __user *from, size_t count, int **array)
{
int *ints, nints;
char *buf;
int ret = 0;
int ret;
buf = memdup_user_nul(from, count);
if (IS_ERR(buf))
return PTR_ERR(buf);
get_options(buf, 0, &nints);
if (!nints) {
ret = -ENOENT;
goto free_buf;
}
ints = kcalloc(nints + 1, sizeof(*ints), GFP_KERNEL);
if (!ints) {
ret = -ENOMEM;
goto free_buf;
}
get_options(buf, nints + 1, ints);
*array = ints;
free_buf:
ret = parse_int_array(buf, count, array);
kfree(buf);
return ret;
}

View File

@@ -16,6 +16,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/io.h>
@@ -589,7 +590,7 @@ static int atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
pcm->private_data = chip;
pcm->info_flags = 0;
strcpy(pcm->name, chip->card->shortname);
strscpy(pcm->name, chip->card->shortname);
chip->pcm = pcm;
return 0;
@@ -748,9 +749,9 @@ static int atmel_ac97c_probe(struct platform_device *pdev)
spin_lock_init(&chip->lock);
strcpy(card->driver, "Atmel AC97C");
strcpy(card->shortname, "Atmel AC97C");
sprintf(card->longname, "Atmel AC97 controller");
strscpy(card->driver, "Atmel AC97C");
strscpy(card->shortname, "Atmel AC97C");
strscpy(card->longname, "Atmel AC97 controller");
chip->card = card;
chip->pclk = pclk;

View File

@@ -1405,7 +1405,7 @@ static bool check_user_elem_overflow(struct snd_card *card, ssize_t add)
static int snd_ctl_elem_user_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct user_element *ue = kcontrol->private_data;
struct user_element *ue = snd_kcontrol_chip(kcontrol);
unsigned int offset;
offset = snd_ctl_get_ioff(kcontrol, &uinfo->id);
@@ -1418,7 +1418,7 @@ static int snd_ctl_elem_user_info(struct snd_kcontrol *kcontrol,
static int snd_ctl_elem_user_enum_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
struct user_element *ue = kcontrol->private_data;
struct user_element *ue = snd_kcontrol_chip(kcontrol);
const char *names;
unsigned int item;
unsigned int offset;
@@ -1443,7 +1443,7 @@ static int snd_ctl_elem_user_enum_info(struct snd_kcontrol *kcontrol,
static int snd_ctl_elem_user_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct user_element *ue = kcontrol->private_data;
struct user_element *ue = snd_kcontrol_chip(kcontrol);
unsigned int size = ue->elem_data_size;
char *src = ue->elem_data +
snd_ctl_get_ioff(kcontrol, &ucontrol->id) * size;
@@ -1456,7 +1456,7 @@ static int snd_ctl_elem_user_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
int err, change;
struct user_element *ue = kcontrol->private_data;
struct user_element *ue = snd_kcontrol_chip(kcontrol);
unsigned int size = ue->elem_data_size;
char *dst = ue->elem_data +
snd_ctl_get_ioff(kcontrol, &ucontrol->id) * size;
@@ -1475,7 +1475,7 @@ static int snd_ctl_elem_user_put(struct snd_kcontrol *kcontrol,
static int replace_user_tlv(struct snd_kcontrol *kctl, unsigned int __user *buf,
unsigned int size)
{
struct user_element *ue = kctl->private_data;
struct user_element *ue = snd_kcontrol_chip(kctl);
unsigned int *container;
unsigned int mask = 0;
int i;
@@ -1528,7 +1528,7 @@ static int replace_user_tlv(struct snd_kcontrol *kctl, unsigned int __user *buf,
static int read_user_tlv(struct snd_kcontrol *kctl, unsigned int __user *buf,
unsigned int size)
{
struct user_element *ue = kctl->private_data;
struct user_element *ue = snd_kcontrol_chip(kctl);
if (ue->tlv_data_size == 0 || ue->tlv_data == NULL)
return -ENXIO;
@@ -1598,7 +1598,7 @@ static size_t compute_user_elem_size(size_t size, unsigned int count)
static void snd_ctl_elem_user_free(struct snd_kcontrol *kcontrol)
{
struct user_element *ue = kcontrol->private_data;
struct user_element *ue = snd_kcontrol_chip(kcontrol);
// decrement the allocation size.
ue->card->user_ctl_alloc_size -= compute_user_elem_size(ue->elem_data_size, kcontrol->count);

View File

@@ -237,26 +237,3 @@ void snd_device_free_all(struct snd_card *card)
list_for_each_entry_safe_reverse(dev, next, &card->devices, list)
__snd_device_free(dev);
}
/**
* snd_device_get_state - Get the current state of the given device
* @card: the card instance
* @device_data: the data pointer to release
*
* Returns the current state of the given device object. For the valid
* device, either @SNDRV_DEV_BUILD, @SNDRV_DEV_REGISTERED or
* @SNDRV_DEV_DISCONNECTED is returned.
* Or for a non-existing device, -1 is returned as an error.
*
* Return: the current state, or -1 if not found
*/
int snd_device_get_state(struct snd_card *card, void *device_data)
{
struct snd_device *dev;
dev = look_for_dev(card, device_data);
if (dev)
return dev->state;
return -1;
}
EXPORT_SYMBOL_GPL(snd_device_get_state);

View File

@@ -574,25 +574,6 @@ int snd_jack_new(struct snd_card *card, const char *id, int type,
EXPORT_SYMBOL(snd_jack_new);
#ifdef CONFIG_SND_JACK_INPUT_DEV
/**
* snd_jack_set_parent - Set the parent device for a jack
*
* @jack: The jack to configure
* @parent: The device to set as parent for the jack.
*
* Set the parent for the jack devices in the device tree. This
* function is only valid prior to registration of the jack. If no
* parent is configured then the parent device will be the sound card.
*/
void snd_jack_set_parent(struct snd_jack *jack, struct device *parent)
{
WARN_ON(jack->registered);
guard(mutex)(&jack->input_dev_lock);
if (jack->input_dev)
jack->input_dev->dev.parent = parent;
}
EXPORT_SYMBOL(snd_jack_set_parent);
/**
* snd_jack_set_key - Set a key mapping on a jack
*

View File

@@ -328,27 +328,6 @@ int snd_dmaengine_pcm_open(struct snd_pcm_substream *substream,
}
EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_open);
/**
* snd_dmaengine_pcm_open_request_chan - Open a dmaengine based PCM substream and request channel
* @substream: PCM substream
* @filter_fn: Filter function used to request the DMA channel
* @filter_data: Data passed to the DMA filter function
*
* This function will request a DMA channel using the passed filter function and
* data. The function should usually be called from the pcm open callback. Note
* that this function will use private_data field of the substream's runtime. So
* it is not available to your pcm driver implementation.
*
* Return: 0 on success, a negative error code otherwise
*/
int snd_dmaengine_pcm_open_request_chan(struct snd_pcm_substream *substream,
dma_filter_fn filter_fn, void *filter_data)
{
return snd_dmaengine_pcm_open(substream,
snd_dmaengine_pcm_request_channel(filter_fn, filter_data));
}
EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_open_request_chan);
int snd_dmaengine_pcm_sync_stop(struct snd_pcm_substream *substream)
{
struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);

View File

@@ -458,7 +458,7 @@ int snd_pcm_lib_malloc_pages(struct snd_pcm_substream *substream, size_t size)
substream->stream,
size, dmab) < 0) {
kfree(dmab);
pr_debug("ALSA pcmC%dD%d%c,%d:%s: cannot preallocate for size %zu\n",
pr_debug("ALSA pcmC%dD%d%c,%d:%s: cannot allocate for size %zu\n",
substream->pcm->card->number, substream->pcm->device,
substream->stream ? 'c' : 'p', substream->number,
substream->pcm->name, size);

View File

@@ -586,33 +586,3 @@ unsigned int snd_pcm_rate_mask_intersect(unsigned int rates_a,
return rates_a & rates_b;
}
EXPORT_SYMBOL_GPL(snd_pcm_rate_mask_intersect);
/**
* snd_pcm_rate_range_to_bits - converts rate range to SNDRV_PCM_RATE_xxx bit
* @rate_min: the minimum sample rate
* @rate_max: the maximum sample rate
*
* This function has an implicit assumption: the rates in the given range have
* only the pre-defined rates like 44100 or 16000.
*
* Return: The SNDRV_PCM_RATE_xxx flag that corresponds to the given rate range,
* or SNDRV_PCM_RATE_KNOT for an unknown range.
*/
unsigned int snd_pcm_rate_range_to_bits(unsigned int rate_min,
unsigned int rate_max)
{
unsigned int rates = 0;
int i;
for (i = 0; i < snd_pcm_known_rates.count; i++) {
if (snd_pcm_known_rates.list[i] >= rate_min
&& snd_pcm_known_rates.list[i] <= rate_max)
rates |= 1 << i;
}
if (!rates)
rates = SNDRV_PCM_RATE_KNOT;
return rates;
}
EXPORT_SYMBOL_GPL(snd_pcm_rate_range_to_bits);

View File

@@ -564,22 +564,6 @@ void snd_seq_queue_client_leave(int client)
/*----------------------------------------------------------------*/
/* remove cells from all queues */
void snd_seq_queue_client_leave_cells(int client)
{
int i;
struct snd_seq_queue *q;
for (i = 0; i < SNDRV_SEQ_MAX_QUEUES; i++) {
q = queueptr(i);
if (!q)
continue;
snd_seq_prioq_leave(q->tickq, client, 0);
snd_seq_prioq_leave(q->timeq, client, 0);
queuefree(q);
}
}
/* remove cells based on flush criteria */
void snd_seq_queue_remove_cells(int client, struct snd_seq_remove_events *info)
{

View File

@@ -66,7 +66,6 @@ void snd_seq_queue_client_leave(int client);
int snd_seq_enqueue_event(struct snd_seq_event_cell *cell, int atomic, int hop);
/* Remove events */
void snd_seq_queue_client_leave_cells(int client);
void snd_seq_queue_remove_cells(int client, struct snd_seq_remove_events *info);
/* return pointer to queue structure for specified id */

View File

@@ -43,7 +43,7 @@ MODULE_LICENSE("GPL");
static int snd_seq_bus_match(struct device *dev, const struct device_driver *drv)
{
struct snd_seq_device *sdev = to_seq_dev(dev);
struct snd_seq_driver *sdrv = to_seq_drv(drv);
const struct snd_seq_driver *sdrv = to_seq_drv(drv);
return strcmp(sdrv->id, sdev->id) == 0 &&
sdrv->argsize == sdev->argsize;

View File

@@ -9,6 +9,7 @@
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*/
#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <sound/hda_register.h>
@@ -81,6 +82,7 @@ int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_bus *bus)
int idx;
u32 link_count;
struct hdac_ext_link *hlink;
u32 leptr;
link_count = readl(bus->mlcap + AZX_REG_ML_MLCD) + 1;
@@ -96,6 +98,12 @@ int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_bus *bus)
(AZX_ML_INTERVAL * idx);
hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
hlink->slcount = FIELD_GET(AZX_ML_HDA_LCAP_SLCOUNT, hlink->lcaps) + 1;
if (hdac_ext_link_alt(hlink)) {
leptr = readl(hlink->ml_addr + AZX_REG_ML_LEPTR);
hlink->id = FIELD_GET(AZX_REG_ML_LEPTR_ID, leptr);
}
/* since link in On, update the ref */
hlink->ref_count = 1;
@@ -125,6 +133,17 @@ void snd_hdac_ext_link_free_all(struct hdac_bus *bus)
}
EXPORT_SYMBOL_GPL(snd_hdac_ext_link_free_all);
struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_id(struct hdac_bus *bus, u32 id)
{
struct hdac_ext_link *hlink;
list_for_each_entry(hlink, &bus->hlink_list, list)
if (hdac_ext_link_alt(hlink) && hlink->id == id)
return hlink;
return NULL;
}
EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_hlink_by_id);
/**
* snd_hdac_ext_bus_get_hlink_by_addr - get hlink at specified address
* @bus: hlink's parent bus device

View File

@@ -21,7 +21,7 @@ MODULE_LICENSE("GPL");
* driver id_table and returns the matching device id entry.
*/
const struct hda_device_id *
hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv)
hdac_get_device_id(struct hdac_device *hdev, const struct hdac_driver *drv)
{
if (drv->id_table) {
const struct hda_device_id *id = drv->id_table;
@@ -38,7 +38,7 @@ hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv)
}
EXPORT_SYMBOL_GPL(hdac_get_device_id);
static int hdac_codec_match(struct hdac_device *dev, struct hdac_driver *drv)
static int hdac_codec_match(struct hdac_device *dev, const struct hdac_driver *drv)
{
if (hdac_get_device_id(dev, drv))
return 1;
@@ -49,7 +49,7 @@ static int hdac_codec_match(struct hdac_device *dev, struct hdac_driver *drv)
static int hda_bus_match(struct device *dev, const struct device_driver *drv)
{
struct hdac_device *hdev = dev_to_hdac_dev(dev);
struct hdac_driver *hdrv = drv_to_hdac_driver(drv);
const struct hdac_driver *hdrv = drv_to_hdac_driver(drv);
if (hdev->type != hdrv->type)
return 0;

View File

@@ -801,7 +801,7 @@ unsigned int snd_hdac_stream_format(unsigned int channels, unsigned int bits, un
if (!rate_bits[i].hz)
return 0;
if (channels == 0 || channels > 8)
if (channels == 0 || channels > 16)
return 0;
val |= channels - 1;

View File

@@ -825,25 +825,6 @@ int snd_hdac_stream_set_spib(struct hdac_bus *bus,
}
EXPORT_SYMBOL_GPL(snd_hdac_stream_set_spib);
/**
* snd_hdac_stream_get_spbmaxfifo - gets the spib value of a stream
* @bus: HD-audio core bus
* @azx_dev: hdac_stream
*
* Return maxfifo for the stream
*/
int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus,
struct hdac_stream *azx_dev)
{
if (!bus->spbcap) {
dev_err(bus->dev, "Address of SPB capability is NULL\n");
return -EINVAL;
}
return readl(azx_dev->fifo_addr);
}
EXPORT_SYMBOL_GPL(snd_hdac_stream_get_spbmaxfifo);
/**
* snd_hdac_stream_drsm_enable - enable DMA resume for a stream
* @bus: HD-audio core bus

View File

@@ -112,6 +112,10 @@ static const struct config_entry config_table[] = {
.flags = FLAG_SST,
.device = PCI_DEVICE_ID_INTEL_HDA_RPL_M,
},
{
.flags = FLAG_SST,
.device = PCI_DEVICE_ID_INTEL_HDA_FCL,
},
#endif
#if IS_ENABLED(CONFIG_SND_SOC_SOF_APOLLOLAKE)
{
@@ -537,7 +541,7 @@ static const struct config_entry config_table[] = {
},
#endif
/* Panther Lake */
/* Panther Lake, Wildcat Lake */
#if IS_ENABLED(CONFIG_SND_SOC_SOF_PANTHERLAKE)
{
.flags = FLAG_SOF | FLAG_SOF_ONLY_IF_DMIC_OR_SOUNDWIRE,
@@ -547,6 +551,10 @@ static const struct config_entry config_table[] = {
.flags = FLAG_SOF | FLAG_SOF_ONLY_IF_DMIC_OR_SOUNDWIRE,
.device = PCI_DEVICE_ID_INTEL_HDA_PTL_H,
},
{
.flags = FLAG_SOF | FLAG_SOF_ONLY_IF_DMIC_OR_SOUNDWIRE,
.device = PCI_DEVICE_ID_INTEL_HDA_WCL,
},
#endif

View File

@@ -350,8 +350,11 @@ int intel_nhlt_ssp_device_type(struct device *dev, struct nhlt_acpi_table *nhlt,
struct nhlt_endpoint *epnt;
int i;
if (!nhlt)
if (!nhlt) {
dev_err(dev, "%s: NHLT table is missing (query for SSP%d)\n",
__func__, virtual_bus_id);
return -EINVAL;
}
epnt = (struct nhlt_endpoint *)nhlt->desc;
for (i = 0; i < nhlt->endpoint_count; i++) {
@@ -366,6 +369,20 @@ int intel_nhlt_ssp_device_type(struct device *dev, struct nhlt_acpi_table *nhlt,
epnt = (struct nhlt_endpoint *)((u8 *)epnt + epnt->length);
}
dev_err(dev, "%s: No match for SSP%d in NHLT table\n", __func__,
virtual_bus_id);
dev_dbg(dev, "Available endpoints:\n");
epnt = (struct nhlt_endpoint *)nhlt->desc;
for (i = 0; i < nhlt->endpoint_count; i++) {
dev_dbg(dev,
"%d: link_type: %d, vbus_id: %d, dir: %d, dev_type: %d\n",
i, epnt->linktype, epnt->virtual_bus_id,
epnt->direction, epnt->device_type);
epnt = (struct nhlt_endpoint *)((u8 *)epnt + epnt->length);
}
return -EINVAL;
}
EXPORT_SYMBOL(intel_nhlt_ssp_device_type);

View File

@@ -80,7 +80,7 @@ static int pt2258_stereo_volume_info(struct snd_kcontrol *kcontrol,
static int pt2258_stereo_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_pt2258 *pt = kcontrol->private_data;
struct snd_pt2258 *pt = snd_kcontrol_chip(kcontrol);
int base = kcontrol->private_value;
/* chip does not support register reads */
@@ -92,7 +92,7 @@ static int pt2258_stereo_volume_get(struct snd_kcontrol *kcontrol,
static int pt2258_stereo_volume_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_pt2258 *pt = kcontrol->private_data;
struct snd_pt2258 *pt = snd_kcontrol_chip(kcontrol);
int base = kcontrol->private_value;
unsigned char bytes[2];
int val0, val1;
@@ -133,7 +133,7 @@ static int pt2258_stereo_volume_put(struct snd_kcontrol *kcontrol,
static int pt2258_switch_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_pt2258 *pt = kcontrol->private_data;
struct snd_pt2258 *pt = snd_kcontrol_chip(kcontrol);
ucontrol->value.integer.value[0] = !pt->mute;
return 0;
@@ -142,7 +142,7 @@ static int pt2258_switch_get(struct snd_kcontrol *kcontrol,
static int pt2258_switch_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_pt2258 *pt = kcontrol->private_data;
struct snd_pt2258 *pt = snd_kcontrol_chip(kcontrol);
unsigned char bytes[2];
int val;

View File

@@ -228,49 +228,6 @@ unsigned short snd_gf1_i_look16(struct snd_gus_card * gus, unsigned char reg)
return res;
}
#if 0
void snd_gf1_i_adlib_write(struct snd_gus_card * gus,
unsigned char reg,
unsigned char data)
{
unsigned long flags;
spin_lock_irqsave(&gus->reg_lock, flags);
__snd_gf1_adlib_write(gus, reg, data);
spin_unlock_irqrestore(&gus->reg_lock, flags);
}
void snd_gf1_i_write_addr(struct snd_gus_card * gus, unsigned char reg,
unsigned int addr, short w_16bit)
{
unsigned long flags;
spin_lock_irqsave(&gus->reg_lock, flags);
__snd_gf1_write_addr(gus, reg, addr, w_16bit);
spin_unlock_irqrestore(&gus->reg_lock, flags);
}
#endif /* 0 */
#ifdef CONFIG_SND_DEBUG
static unsigned int snd_gf1_i_read_addr(struct snd_gus_card * gus,
unsigned char reg, short w_16bit)
{
unsigned int res;
unsigned long flags;
spin_lock_irqsave(&gus->reg_lock, flags);
res = __snd_gf1_read_addr(gus, reg, w_16bit);
spin_unlock_irqrestore(&gus->reg_lock, flags);
return res;
}
#endif
/*
*/
void snd_gf1_dram_addr(struct snd_gus_card * gus, unsigned int addr)
{
outb(0x43, gus->gf1.reg_regsel);
@@ -418,189 +375,3 @@ void snd_gf1_select_active_voices(struct snd_gus_card * gus)
udelay(100);
}
}
#ifdef CONFIG_SND_DEBUG
void snd_gf1_print_voice_registers(struct snd_gus_card * gus)
{
unsigned char mode;
int voice, ctrl;
voice = gus->gf1.active_voice;
dev_info(gus->card->dev,
" -%i- GF1 voice ctrl, ramp ctrl = 0x%x, 0x%x\n",
voice, ctrl = snd_gf1_i_read8(gus, 0), snd_gf1_i_read8(gus, 0x0d));
dev_info(gus->card->dev,
" -%i- GF1 frequency = 0x%x\n",
voice, snd_gf1_i_read16(gus, 1));
dev_info(gus->card->dev,
" -%i- GF1 loop start, end = 0x%x (0x%x), 0x%x (0x%x)\n",
voice, snd_gf1_i_read_addr(gus, 2, ctrl & 4),
snd_gf1_i_read_addr(gus, 2, (ctrl & 4) ^ 4),
snd_gf1_i_read_addr(gus, 4, ctrl & 4),
snd_gf1_i_read_addr(gus, 4, (ctrl & 4) ^ 4));
dev_info(gus->card->dev,
" -%i- GF1 ramp start, end, rate = 0x%x, 0x%x, 0x%x\n",
voice, snd_gf1_i_read8(gus, 7), snd_gf1_i_read8(gus, 8),
snd_gf1_i_read8(gus, 6));
dev_info(gus->card->dev,
" -%i- GF1 volume = 0x%x\n",
voice, snd_gf1_i_read16(gus, 9));
dev_info(gus->card->dev,
" -%i- GF1 position = 0x%x (0x%x)\n",
voice, snd_gf1_i_read_addr(gus, 0x0a, ctrl & 4),
snd_gf1_i_read_addr(gus, 0x0a, (ctrl & 4) ^ 4));
if (gus->interwave && snd_gf1_i_read8(gus, 0x19) & 0x01) { /* enhanced mode */
mode = snd_gf1_i_read8(gus, 0x15);
dev_info(gus->card->dev,
" -%i- GFA1 mode = 0x%x\n",
voice, mode);
if (mode & 0x01) { /* Effect processor */
dev_info(gus->card->dev,
" -%i- GFA1 effect address = 0x%x\n",
voice, snd_gf1_i_read_addr(gus, 0x11, ctrl & 4));
dev_info(gus->card->dev,
" -%i- GFA1 effect volume = 0x%x\n",
voice, snd_gf1_i_read16(gus, 0x16));
dev_info(gus->card->dev,
" -%i- GFA1 effect volume final = 0x%x\n",
voice, snd_gf1_i_read16(gus, 0x1d));
dev_info(gus->card->dev,
" -%i- GFA1 effect accumulator = 0x%x\n",
voice, snd_gf1_i_read8(gus, 0x14));
}
if (mode & 0x20) {
dev_info(gus->card->dev,
" -%i- GFA1 left offset = 0x%x (%i)\n",
voice, snd_gf1_i_read16(gus, 0x13),
snd_gf1_i_read16(gus, 0x13) >> 4);
dev_info(gus->card->dev,
" -%i- GFA1 left offset final = 0x%x (%i)\n",
voice, snd_gf1_i_read16(gus, 0x1c),
snd_gf1_i_read16(gus, 0x1c) >> 4);
dev_info(gus->card->dev,
" -%i- GFA1 right offset = 0x%x (%i)\n",
voice, snd_gf1_i_read16(gus, 0x0c),
snd_gf1_i_read16(gus, 0x0c) >> 4);
dev_info(gus->card->dev,
" -%i- GFA1 right offset final = 0x%x (%i)\n",
voice, snd_gf1_i_read16(gus, 0x1b),
snd_gf1_i_read16(gus, 0x1b) >> 4);
} else
dev_info(gus->card->dev,
" -%i- GF1 pan = 0x%x\n",
voice, snd_gf1_i_read8(gus, 0x0c));
} else
dev_info(gus->card->dev,
" -%i- GF1 pan = 0x%x\n",
voice, snd_gf1_i_read8(gus, 0x0c));
}
#if 0
void snd_gf1_print_global_registers(struct snd_gus_card * gus)
{
unsigned char global_mode = 0x00;
dev_info(gus->card->dev,
" -G- GF1 active voices = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_ACTIVE_VOICES));
if (gus->interwave) {
global_mode = snd_gf1_i_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE);
dev_info(gus->card->dev,
" -G- GF1 global mode = 0x%x\n",
global_mode);
}
if (global_mode & 0x02) /* LFO enabled? */
dev_info(gus->card->dev,
" -G- GF1 LFO base = 0x%x\n",
snd_gf1_i_look16(gus, SNDRV_GF1_GW_LFO_BASE));
dev_info(gus->card->dev,
" -G- GF1 voices IRQ read = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_VOICES_IRQ_READ));
dev_info(gus->card->dev,
" -G- GF1 DRAM DMA control = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL));
dev_info(gus->card->dev,
" -G- GF1 DRAM DMA high/low = 0x%x/0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH),
snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW));
dev_info(gus->card->dev,
" -G- GF1 DRAM IO high/low = 0x%x/0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_IO_HIGH),
snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_IO_LOW));
if (!gus->interwave)
dev_info(gus->card->dev,
" -G- GF1 record DMA control = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_REC_DMA_CONTROL));
dev_info(gus->card->dev,
" -G- GF1 DRAM IO 16 = 0x%x\n",
snd_gf1_i_look16(gus, SNDRV_GF1_GW_DRAM_IO16));
if (gus->gf1.enh_mode) {
dev_info(gus->card->dev,
" -G- GFA1 memory config = 0x%x\n",
snd_gf1_i_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG));
dev_info(gus->card->dev,
" -G- GFA1 memory control = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_MEMORY_CONTROL));
dev_info(gus->card->dev,
" -G- GFA1 FIFO record base = 0x%x\n",
snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR));
dev_info(gus->card->dev,
" -G- GFA1 FIFO playback base = 0x%x\n",
snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR));
dev_info(gus->card->dev,
" -G- GFA1 interleave control = 0x%x\n",
snd_gf1_i_look16(gus, SNDRV_GF1_GW_INTERLEAVE));
}
}
void snd_gf1_print_setup_registers(struct snd_gus_card * gus)
{
dev_info(gus->card->dev,
" -S- mix control = 0x%x\n",
inb(GUSP(gus, MIXCNTRLREG)));
dev_info(gus->card->dev,
" -S- IRQ status = 0x%x\n",
inb(GUSP(gus, IRQSTAT)));
dev_info(gus->card->dev,
" -S- timer control = 0x%x\n",
inb(GUSP(gus, TIMERCNTRL)));
dev_info(gus->card->dev,
" -S- timer data = 0x%x\n",
inb(GUSP(gus, TIMERDATA)));
dev_info(gus->card->dev,
" -S- status read = 0x%x\n",
inb(GUSP(gus, REGCNTRLS)));
dev_info(gus->card->dev,
" -S- Sound Blaster control = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL));
dev_info(gus->card->dev,
" -S- AdLib timer 1/2 = 0x%x/0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1),
snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_2));
dev_info(gus->card->dev,
" -S- reset = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET));
if (gus->interwave) {
dev_info(gus->card->dev,
" -S- compatibility = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_COMPATIBILITY));
dev_info(gus->card->dev,
" -S- decode control = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_DECODE_CONTROL));
dev_info(gus->card->dev,
" -S- version number = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER));
dev_info(gus->card->dev,
" -S- MPU-401 emul. control A/B = 0x%x/0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A),
snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B));
dev_info(gus->card->dev,
" -S- emulation IRQ = 0x%x\n",
snd_gf1_i_look8(gus, SNDRV_GF1_GB_EMULATION_IRQ));
}
}
#endif /* 0 */
#endif

View File

@@ -22,18 +22,6 @@ MODULE_LICENSE("GPL");
static int snd_gus_init_dma_irq(struct snd_gus_card * gus, int latches);
int snd_gus_use_inc(struct snd_gus_card * gus)
{
if (!try_module_get(gus->card->module))
return 0;
return 1;
}
void snd_gus_use_dec(struct snd_gus_card * gus)
{
module_put(gus->card->module);
}
static int snd_gus_joystick_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
@@ -443,8 +431,6 @@ EXPORT_SYMBOL(snd_gf1_new_mixer);
/* gus_pcm.c */
EXPORT_SYMBOL(snd_gf1_pcm_new);
/* gus.c */
EXPORT_SYMBOL(snd_gus_use_inc);
EXPORT_SYMBOL(snd_gus_use_dec);
EXPORT_SYMBOL(snd_gus_create);
EXPORT_SYMBOL(snd_gus_initialize);
/* gus_irq.c */

View File

@@ -141,10 +141,6 @@ void snd_gf1_stop_voice(struct snd_gus_card * gus, unsigned short voice)
if (gus->gf1.enh_mode)
snd_gf1_write8(gus, SNDRV_GF1_VB_ACCUMULATOR, 0);
spin_unlock_irqrestore(&gus->reg_lock, flags);
#if 0
snd_gf1_lfo_shutdown(gus, voice, ULTRA_LFO_VIBRATO);
snd_gf1_lfo_shutdown(gus, voice, ULTRA_LFO_TREMOLO);
#endif
}
static void snd_gf1_clear_voices(struct snd_gus_card * gus, unsigned short v_min,
@@ -182,10 +178,6 @@ static void snd_gf1_clear_voices(struct snd_gus_card * gus, unsigned short v_min
snd_gf1_write16(gus, SNDRV_GF1_VW_EFFECT_VOLUME_FINAL, 0);
}
spin_unlock_irqrestore(&gus->reg_lock, flags);
#if 0
snd_gf1_lfo_shutdown(gus, i, ULTRA_LFO_VIBRATO);
snd_gf1_lfo_shutdown(gus, i, ULTRA_LFO_TREMOLO);
#endif
}
}
@@ -335,9 +327,7 @@ int snd_gf1_start(struct snd_gus_card * gus)
} else {
gus->gf1.sw_lfo = 1;
}
#if 0
snd_gf1_lfo_init(gus);
#endif
if (gus->gf1.memory > 0)
for (i = 0; i < 4; i++)
snd_gf1_poke(gus, gus->gf1.default_voice_address + i, 0);
@@ -391,8 +381,6 @@ int snd_gf1_stop(struct snd_gus_card * gus)
snd_gf1_i_write8(gus, SNDRV_GF1_GB_RESET, 1); /* disable IRQ & DAC */
snd_gf1_timers_done(gus);
snd_gf1_mem_done(gus);
#if 0
snd_gf1_lfo_done(gus);
#endif
return 0;
}

View File

@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
snd-msnd-lib-y := msnd.o msnd_midi.o msnd_pinnacle_mixer.o
snd-msnd-lib-y := msnd.o msnd_pinnacle_mixer.o
snd-msnd-pinnacle-y := msnd_pinnacle.o
snd-msnd-classic-y := msnd_classic.o

View File

@@ -216,7 +216,6 @@ struct snd_msnd {
int captureLimit;
int capturePeriods;
struct snd_card *card;
void *msndmidi_mpu;
struct snd_rawmidi *rmidi;
/* Hardware resources */
@@ -286,9 +285,6 @@ int snd_msnd_DAPQ(struct snd_msnd *chip, int start);
int snd_msnd_DARQ(struct snd_msnd *chip, int start);
int snd_msnd_pcm(struct snd_card *card, int device);
int snd_msndmidi_new(struct snd_card *card, int device);
void snd_msndmidi_input_read(void *mpu);
void snd_msndmix_setup(struct snd_msnd *chip);
int snd_msndmix_new(struct snd_card *card);
int snd_msndmix_force_recsrc(struct snd_msnd *chip, int recsrc);

View File

@@ -1,163 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
* Copyright (c) 2009 by Krzysztof Helt
* Routines for control of MPU-401 in UART mode
*
* MPU-401 supports UART mode which is not capable generate transmit
* interrupts thus output is done via polling. Also, if irq < 0, then
* input is done also via polling. Do not expect good performance.
*/
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/errno.h>
#include <linux/export.h>
#include <sound/core.h>
#include <sound/rawmidi.h>
#include "msnd.h"
#define MSNDMIDI_MODE_BIT_INPUT 0
#define MSNDMIDI_MODE_BIT_OUTPUT 1
#define MSNDMIDI_MODE_BIT_INPUT_TRIGGER 2
#define MSNDMIDI_MODE_BIT_OUTPUT_TRIGGER 3
struct snd_msndmidi {
struct snd_msnd *dev;
unsigned long mode; /* MSNDMIDI_MODE_XXXX */
struct snd_rawmidi_substream *substream_input;
spinlock_t input_lock;
};
/*
* input/output open/close - protected by open_mutex in rawmidi.c
*/
static int snd_msndmidi_input_open(struct snd_rawmidi_substream *substream)
{
struct snd_msndmidi *mpu;
mpu = substream->rmidi->private_data;
mpu->substream_input = substream;
snd_msnd_enable_irq(mpu->dev);
snd_msnd_send_dsp_cmd(mpu->dev, HDEX_MIDI_IN_START);
set_bit(MSNDMIDI_MODE_BIT_INPUT, &mpu->mode);
return 0;
}
static int snd_msndmidi_input_close(struct snd_rawmidi_substream *substream)
{
struct snd_msndmidi *mpu;
mpu = substream->rmidi->private_data;
snd_msnd_send_dsp_cmd(mpu->dev, HDEX_MIDI_IN_STOP);
clear_bit(MSNDMIDI_MODE_BIT_INPUT, &mpu->mode);
mpu->substream_input = NULL;
snd_msnd_disable_irq(mpu->dev);
return 0;
}
static void snd_msndmidi_input_drop(struct snd_msndmidi *mpu)
{
u16 tail;
tail = readw(mpu->dev->MIDQ + JQS_wTail);
writew(tail, mpu->dev->MIDQ + JQS_wHead);
}
/*
* trigger input
*/
static void snd_msndmidi_input_trigger(struct snd_rawmidi_substream *substream,
int up)
{
unsigned long flags;
struct snd_msndmidi *mpu;
mpu = substream->rmidi->private_data;
spin_lock_irqsave(&mpu->input_lock, flags);
if (up) {
if (!test_and_set_bit(MSNDMIDI_MODE_BIT_INPUT_TRIGGER,
&mpu->mode))
snd_msndmidi_input_drop(mpu);
} else {
clear_bit(MSNDMIDI_MODE_BIT_INPUT_TRIGGER, &mpu->mode);
}
spin_unlock_irqrestore(&mpu->input_lock, flags);
if (up)
snd_msndmidi_input_read(mpu);
}
void snd_msndmidi_input_read(void *mpuv)
{
unsigned long flags;
struct snd_msndmidi *mpu = mpuv;
void __iomem *pwMIDQData = mpu->dev->mappedbase + MIDQ_DATA_BUFF;
u16 head, tail, size;
spin_lock_irqsave(&mpu->input_lock, flags);
head = readw(mpu->dev->MIDQ + JQS_wHead);
tail = readw(mpu->dev->MIDQ + JQS_wTail);
size = readw(mpu->dev->MIDQ + JQS_wSize);
if (head > size || tail > size)
goto out;
while (head != tail) {
unsigned char val = readw(pwMIDQData + 2 * head);
if (test_bit(MSNDMIDI_MODE_BIT_INPUT_TRIGGER, &mpu->mode))
snd_rawmidi_receive(mpu->substream_input, &val, 1);
if (++head > size)
head = 0;
writew(head, mpu->dev->MIDQ + JQS_wHead);
}
out:
spin_unlock_irqrestore(&mpu->input_lock, flags);
}
EXPORT_SYMBOL(snd_msndmidi_input_read);
static const struct snd_rawmidi_ops snd_msndmidi_input = {
.open = snd_msndmidi_input_open,
.close = snd_msndmidi_input_close,
.trigger = snd_msndmidi_input_trigger,
};
static void snd_msndmidi_free(struct snd_rawmidi *rmidi)
{
struct snd_msndmidi *mpu = rmidi->private_data;
kfree(mpu);
}
int snd_msndmidi_new(struct snd_card *card, int device)
{
struct snd_msnd *chip = card->private_data;
struct snd_msndmidi *mpu;
struct snd_rawmidi *rmidi;
int err;
err = snd_rawmidi_new(card, "MSND-MIDI", device, 1, 1, &rmidi);
if (err < 0)
return err;
mpu = kzalloc(sizeof(*mpu), GFP_KERNEL);
if (mpu == NULL) {
snd_device_free(card, rmidi);
return -ENOMEM;
}
mpu->dev = chip;
chip->msndmidi_mpu = mpu;
rmidi->private_data = mpu;
rmidi->private_free = snd_msndmidi_free;
spin_lock_init(&mpu->input_lock);
strcpy(rmidi->name, "MSND MIDI");
snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
&snd_msndmidi_input);
rmidi->info_flags |= SNDRV_RAWMIDI_INFO_INPUT;
return 0;
}

View File

@@ -142,11 +142,6 @@ static void snd_msnd_eval_dsp_msg(struct snd_msnd *chip, u16 wMessage)
}
break;
case HIMT_MIDI_IN_UCHAR:
if (chip->msndmidi_mpu)
snd_msndmidi_input_read(chip->msndmidi_mpu);
break;
default:
dev_dbg(chip->card->dev, LOGNAME ": HIMT message %d 0x%02x\n",
HIBYTE(wMessage), HIBYTE(wMessage));

View File

@@ -14,6 +14,7 @@
#include <linux/export.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/string.h>
#include <sound/core.h>
#include <sound/emu8000.h>
#include <sound/emu8000_reg.h>
@@ -1096,7 +1097,7 @@ snd_emu8000_new(struct snd_card *card, int index, long port, int seq_ports,
#if IS_ENABLED(CONFIG_SND_SEQUENCER)
if (snd_seq_device_new(card, index, SNDRV_SEQ_DEV_ID_EMU8000,
sizeof(struct snd_emu8000*), &awe) >= 0) {
strcpy(awe->name, "EMU-8000");
strscpy(awe->name, "EMU-8000");
*(struct snd_emu8000 **)SNDRV_SEQ_DEVICE_ARGPTR(awe) = hw;
}
#else

View File

@@ -15,6 +15,7 @@
#include <linux/module.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <asm/dma.h>
#include <linux/isa.h>
#include <sound/core.h>
@@ -286,8 +287,8 @@ static int snd_jazz16_probe(struct device *devptr, unsigned int dev)
jazz16->chip = chip;
strcpy(card->driver, "jazz16");
strcpy(card->shortname, "Media Vision Jazz16");
strscpy(card->driver, "jazz16");
strscpy(card->shortname, "Media Vision Jazz16");
sprintf(card->longname,
"Media Vision Jazz16 at 0x%lx, irq %d, dma8 %d, dma16 %d",
port[dev], xirq, xdma8, xdma16);

View File

@@ -10,6 +10,7 @@
#include <linux/err.h>
#include <linux/isa.h>
#include <linux/module.h>
#include <linux/string.h>
#include <sound/core.h>
#include <sound/sb.h>
#include <sound/sb16_csp.h>
@@ -337,12 +338,12 @@ static int snd_sb16_probe(struct snd_card *card, int dev)
if (err < 0)
return err;
strcpy(card->driver,
strscpy(card->driver,
#ifdef SNDRV_SBAWE_EMU8000
awe_port[dev] > 0 ? "SB AWE" :
#endif
"SB16");
strcpy(card->shortname, chip->name);
strscpy(card->shortname, chip->name);
sprintf(card->longname, "%s at 0x%lx, irq %i, dma ",
chip->name,
chip->port,

View File

@@ -9,6 +9,7 @@
#include <linux/isa.h>
#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/string.h>
#include <sound/core.h>
#include <sound/sb.h>
#include <sound/opl3.h>
@@ -162,8 +163,8 @@ static int snd_sb8_probe(struct device *pdev, unsigned int dev)
if (err < 0)
return err;
strcpy(card->driver, chip->hardware == SB_HW_PRO ? "SB Pro" : "SB8");
strcpy(card->shortname, chip->name);
strscpy(card->driver, chip->hardware == SB_HW_PRO ? "SB Pro" : "SB8");
strscpy(card->shortname, chip->name);
sprintf(card->longname, "%s at 0x%lx, irq %d, dma %d",
chip->name,
chip->port,

View File

@@ -14,6 +14,7 @@
*/
#include <linux/io.h>
#include <linux/string.h>
#include <linux/time.h>
#include <sound/core.h>
#include <sound/sb.h>
@@ -254,7 +255,7 @@ int snd_sb8dsp_midi(struct snd_sb *chip, int device)
err = snd_rawmidi_new(chip->card, "SB8 MIDI", device, 1, 1, &rmidi);
if (err < 0)
return err;
strcpy(rmidi->name, "SB8 MIDI");
strscpy(rmidi->name, "SB8 MIDI");
snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_sb8dsp_midi_output);
snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_sb8dsp_midi_input);
rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT;

View File

@@ -6,6 +6,7 @@
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/time.h>
#include <sound/core.h>
#include <sound/sb.h>
@@ -718,7 +719,7 @@ static int snd_sbmixer_init(struct snd_sb *chip,
return err;
}
snd_component_add(card, name);
strcpy(card->mixername, name);
strscpy(card->mixername, name);
return 0;
}
@@ -799,7 +800,7 @@ int snd_sbmixer_new(struct snd_sb *chip)
return err;
break;
default:
strcpy(card->mixername, "???");
strscpy(card->mixername, "???");
}
return 0;
}

View File

@@ -13,6 +13,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/string.h>
#include <sound/control.h>
#include <sound/core.h>
@@ -327,14 +328,14 @@ static int __init n64audio_probe(struct platform_device *pdev)
goto fail_dma_alloc;
pcm->private_data = priv;
strcpy(pcm->name, "N64 Audio");
strscpy(pcm->name, "N64 Audio");
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &n64audio_pcm_ops);
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_VMALLOC, card->dev, 0, 0);
strcpy(card->driver, "N64 Audio");
strcpy(card->shortname, "N64 Audio");
strcpy(card->longname, "N64 Audio");
strscpy(card->driver, "N64 Audio");
strscpy(card->shortname, "N64 Audio");
strscpy(card->longname, "N64 Audio");
irq = platform_get_irq(pdev, 0);
if (irq < 0) {

View File

@@ -810,12 +810,11 @@ snd_ad1889_create(struct snd_card *card, struct pci_dev *pci)
chip->irq = -1;
/* (1) PCI resource allocation */
err = pcim_iomap_regions(pci, 1 << 0, card->driver);
if (err < 0)
return err;
chip->iobase = pcim_iomap_region(pci, 0, card->driver);
if (IS_ERR(chip->iobase))
return PTR_ERR(chip->iobase);
chip->bar = pci_resource_start(pci, 0);
chip->iobase = pcim_iomap_table(pci)[0];
pci_set_master(pci);

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