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ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified property

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The L2 cache controller on the Armada 370 and Armada XP SoCs is a
unified cache. Moreover, the Aurora cache controller is compatible
with the L2x0 cache controller: the "cache-unified" property is
required by its binding.

This patch fixes the Aurora L2 cache node for the Armada 370 and
Armada XP SoCs by adding this property.

Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Gregory CLEMENT
2014-10-06 11:37:56 +02:00
committed by Jason Cooper
parent f114040e3e
commit a9ce1afb35
2 changed files with 2 additions and 0 deletions
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1
arch/arm/boot/dts/armada-370.dtsi
View File

@@ -95,6 +95,7 @@ L2: l2-cache {
compatible = "marvell,aurora-outer-cache";
reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
cache-unified;
wt-override;
};

1
arch/arm/boot/dts/armada-xp.dtsi
View File

@@ -39,6 +39,7 @@ L2: l2-cache {
compatible = "marvell,aurora-system-cache";
reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
cache-unified;
wt-override;
};