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pinctrl: airoha: fix mdio bitfield names

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Fix misprint in mdio bitfield name of GPIO_2ND_I2C_MODE register.

While at it also fix an7583 mdio. It should use an7583 specific
mdio bitfield.

Fixes: 1c8ace2d07 ("pinctrl: airoha: Add support for EN7581 SoC")
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Mikhail Kshevetskiy
2026-08-07 01:05:41 +03:00
committed by Linus Walleij
parent 282f2cee8a
commit a8454680a6
1 changed files with 6 additions and 5 deletions
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11
drivers/pinctrl/airoha/pinctrl-airoha.c
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@@ -49,7 +49,7 @@
/* MUX */
#define REG_GPIO_2ND_I2C_MODE 0x0214
#define GPIO_MDC_IO_MASTER_MODE_MODE BIT(14)
#define GPIO_MDC_IO_MASTER_MODE_MASK BIT(14)
#define GPIO_I2C_MASTER_MODE_MODE BIT(13)
#define GPIO_I2S_MODE_MASK BIT(12)
#define GPIO_I2C_SLAVE_MODE_MODE BIT(11)
@@ -66,6 +66,7 @@
#define GPIO_2ND_I2C_MODE_MASK BIT(0)
#define REG_GPIO_SPI_CS1_MODE 0x0218
#define AN7583_GPIO_MDC_IO_MASTER_MODE_MASK BIT(22)
#define GPIO_PCM_SPI_CS4_MODE_MASK BIT(21)
#define GPIO_PCM_SPI_CS3_MODE_MASK BIT(20)
#define GPIO_PCM_SPI_CS2_MODE_P156_MASK BIT(19)
@@ -1026,8 +1027,8 @@ static const struct airoha_pinctrl_func_group mdio_func_group[] = {
.regmap[0] = {
AIROHA_FUNC_MUX,
REG_GPIO_2ND_I2C_MODE,
GPIO_MDC_IO_MASTER_MODE_MODE,
GPIO_MDC_IO_MASTER_MODE_MODE
GPIO_MDC_IO_MASTER_MODE_MASK,
GPIO_MDC_IO_MASTER_MODE_MASK
},
.regmap[1] = {
AIROHA_FUNC_MUX,
@@ -1051,8 +1052,8 @@ static const struct airoha_pinctrl_func_group an7583_mdio_func_group[] = {
.regmap[1] = {
AIROHA_FUNC_MUX,
REG_GPIO_SPI_CS1_MODE,
GPIO_MDC_IO_MASTER_MODE_MODE,
GPIO_MDC_IO_MASTER_MODE_MODE
AN7583_GPIO_MDC_IO_MASTER_MODE_MASK,
AN7583_GPIO_MDC_IO_MASTER_MODE_MASK
},
.regmap_size = 2,
},