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arm64: dts: renesas: condor: add SCIF0 pins

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Add the (previously omitted) SCIF0 pin data to the Condor board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Sergei Shtylyov
2018-03-09 15:07:51 +03:00
committed by Simon Horman
parent cef26946f2
commit a824e63cfc
1 changed files with 15 additions and 0 deletions
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15
arch/arm64/boot/dts/renesas/r8a77980-condor.dts
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@@ -49,7 +49,22 @@ &extalr_clk {
clock-frequency = <32768>;
};
&pfc {
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
};
scif_clk_pins: scif_clk {
groups = "scif_clk_b";
function = "scif_clk";
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
pinctrl-names = "default";
status = "okay";
};