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drm/nouveau/fifo: private mutex

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nvkm_subdev.mutex is going away.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs
2020-12-03 10:42:43 +10:00
parent bfa7f6a6df
commit a641936065
10 changed files with 30 additions and 28 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
View File

@@ -40,6 +40,7 @@ struct nvkm_fifo {
int nr;
struct list_head chan;
spinlock_t lock;
struct mutex mutex;
struct nvkm_event uevent; /* async user trigger */
struct nvkm_event cevent; /* channel creation event */

2
drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
View File

@@ -334,6 +334,7 @@ nvkm_fifo_dtor(struct nvkm_engine *engine)
nvkm_event_fini(&fifo->kevent);
nvkm_event_fini(&fifo->cevent);
nvkm_event_fini(&fifo->uevent);
mutex_destroy(&fifo->mutex);
return data;
}
@@ -358,6 +359,7 @@ nvkm_fifo_ctor(const struct nvkm_fifo_func *func, struct nvkm_device *device,
fifo->func = func;
INIT_LIST_HEAD(&fifo->chan);
spin_lock_init(&fifo->lock);
mutex_init(&fifo->mutex);
if (WARN_ON(fifo->nr > NVKM_FIFO_CHID_NR))
fifo->nr = NVKM_FIFO_CHID_NR;

8
drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c
View File

@@ -38,9 +38,9 @@ nv04_fifo_dma_object_dtor(struct nvkm_fifo_chan *base, int cookie)
struct nv04_fifo_chan *chan = nv04_fifo_chan(base);
struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem;
mutex_lock(&chan->fifo->base.engine.subdev.mutex);
mutex_lock(&chan->fifo->base.mutex);
nvkm_ramht_remove(imem->ramht, cookie);
mutex_unlock(&chan->fifo->base.engine.subdev.mutex);
mutex_unlock(&chan->fifo->base.mutex);
}
static int
@@ -63,10 +63,10 @@ nv04_fifo_dma_object_ctor(struct nvkm_fifo_chan *base,
return -EINVAL;
}
mutex_lock(&chan->fifo->base.engine.subdev.mutex);
mutex_lock(&chan->fifo->base.mutex);
hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4,
handle, context);
mutex_unlock(&chan->fifo->base.engine.subdev.mutex);
mutex_unlock(&chan->fifo->base.mutex);
return hash;
}

4
drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c
View File

@@ -159,10 +159,10 @@ nv40_fifo_dma_object_ctor(struct nvkm_fifo_chan *base,
return -EINVAL;
}
mutex_lock(&chan->fifo->base.engine.subdev.mutex);
mutex_lock(&chan->fifo->base.mutex);
hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4,
handle, context);
mutex_unlock(&chan->fifo->base.engine.subdev.mutex);
mutex_unlock(&chan->fifo->base.mutex);
return hash;
}

14
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
View File

@@ -57,7 +57,7 @@ gf100_fifo_runlist_commit(struct gf100_fifo *fifo)
int nr = 0;
int target;
mutex_lock(&subdev->mutex);
mutex_lock(&fifo->base.mutex);
cur = fifo->runlist.mem[fifo->runlist.active];
fifo->runlist.active = !fifo->runlist.active;
@@ -73,7 +73,7 @@ gf100_fifo_runlist_commit(struct gf100_fifo *fifo)
case NVKM_MEM_TARGET_VRAM: target = 0; break;
case NVKM_MEM_TARGET_NCOH: target = 3; break;
default:
mutex_unlock(&subdev->mutex);
mutex_unlock(&fifo->base.mutex);
WARN_ON(1);
return;
}
@@ -86,23 +86,23 @@ gf100_fifo_runlist_commit(struct gf100_fifo *fifo)
!(nvkm_rd32(device, 0x00227c) & 0x00100000),
msecs_to_jiffies(2000)) == 0)
nvkm_error(subdev, "runlist update timeout\n");
mutex_unlock(&subdev->mutex);
mutex_unlock(&fifo->base.mutex);
}
void
gf100_fifo_runlist_remove(struct gf100_fifo *fifo, struct gf100_fifo_chan *chan)
{
mutex_lock(&fifo->base.engine.subdev.mutex);
mutex_lock(&fifo->base.mutex);
list_del_init(&chan->head);
mutex_unlock(&fifo->base.engine.subdev.mutex);
mutex_unlock(&fifo->base.mutex);
}
void
gf100_fifo_runlist_insert(struct gf100_fifo *fifo, struct gf100_fifo_chan *chan)
{
mutex_lock(&fifo->base.engine.subdev.mutex);
mutex_lock(&fifo->base.mutex);
list_add_tail(&chan->head, &fifo->chan);
mutex_unlock(&fifo->base.engine.subdev.mutex);
mutex_unlock(&fifo->base.mutex);
}
static inline int

13
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
View File

@@ -168,12 +168,11 @@ gk104_fifo_runlist_update(struct gk104_fifo *fifo, int runl)
{
const struct gk104_fifo_runlist_func *func = fifo->func->runlist;
struct gk104_fifo_chan *chan;
struct nvkm_subdev *subdev = &fifo->base.engine.subdev;
struct nvkm_memory *mem;
struct nvkm_fifo_cgrp *cgrp;
int nr = 0;
mutex_lock(&subdev->mutex);
mutex_lock(&fifo->base.mutex);
mem = fifo->runlist[runl].mem[fifo->runlist[runl].next];
fifo->runlist[runl].next = !fifo->runlist[runl].next;
@@ -191,27 +190,27 @@ gk104_fifo_runlist_update(struct gk104_fifo *fifo, int runl)
nvkm_done(mem);
func->commit(fifo, runl, mem, nr);
mutex_unlock(&subdev->mutex);
mutex_unlock(&fifo->base.mutex);
}
void
gk104_fifo_runlist_remove(struct gk104_fifo *fifo, struct gk104_fifo_chan *chan)
{
struct nvkm_fifo_cgrp *cgrp = chan->cgrp;
mutex_lock(&fifo->base.engine.subdev.mutex);
mutex_lock(&fifo->base.mutex);
if (!list_empty(&chan->head)) {
list_del_init(&chan->head);
if (cgrp && !--cgrp->chan_nr)
list_del_init(&cgrp->head);
}
mutex_unlock(&fifo->base.engine.subdev.mutex);
mutex_unlock(&fifo->base.mutex);
}
void
gk104_fifo_runlist_insert(struct gk104_fifo *fifo, struct gk104_fifo_chan *chan)
{
struct nvkm_fifo_cgrp *cgrp = chan->cgrp;
mutex_lock(&fifo->base.engine.subdev.mutex);
mutex_lock(&fifo->base.mutex);
if (cgrp) {
if (!cgrp->chan_nr++)
list_add_tail(&cgrp->head, &fifo->runlist[chan->runl].cgrp);
@@ -219,7 +218,7 @@ gk104_fifo_runlist_insert(struct gk104_fifo *fifo, struct gk104_fifo_chan *chan)
} else {
list_add_tail(&chan->head, &fifo->runlist[chan->runl].chan);
}
mutex_unlock(&fifo->base.engine.subdev.mutex);
mutex_unlock(&fifo->base.mutex);
}
void

4
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c
View File

@@ -77,7 +77,7 @@ gf100_fifo_gpfifo_engine_fini(struct nvkm_fifo_chan *base,
struct nvkm_gpuobj *inst = chan->base.inst;
int ret = 0;
mutex_lock(&subdev->mutex);
mutex_lock(&chan->fifo->base.mutex);
nvkm_wr32(device, 0x002634, chan->base.chid);
if (nvkm_msec(device, 2000,
if (nvkm_rd32(device, 0x002634) == chan->base.chid)
@@ -87,7 +87,7 @@ gf100_fifo_gpfifo_engine_fini(struct nvkm_fifo_chan *base,
chan->base.chid, chan->base.object.client->name);
ret = -ETIMEDOUT;
}
mutex_unlock(&subdev->mutex);
mutex_unlock(&chan->fifo->base.mutex);
if (ret && suspend)
return ret;

4
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c
View File

@@ -65,9 +65,9 @@ int
gk104_fifo_gpfifo_kick(struct gk104_fifo_chan *chan)
{
int ret;
mutex_lock(&chan->base.fifo->engine.subdev.mutex);
mutex_lock(&chan->base.fifo->mutex);
ret = gk104_fifo_gpfifo_kick_locked(chan);
mutex_unlock(&chan->base.fifo->engine.subdev.mutex);
mutex_unlock(&chan->base.fifo->mutex);
return ret;
}

4
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c
View File

@@ -44,7 +44,7 @@ gv100_fifo_gpfifo_engine_valid(struct gk104_fifo_chan *chan, bool ce, bool valid
int ret;
/* Block runlist to prevent the channel from being rescheduled. */
mutex_lock(&subdev->mutex);
mutex_lock(&chan->fifo->base.mutex);
nvkm_mask(device, 0x002630, BIT(chan->runl), BIT(chan->runl));
/* Preempt the channel. */
@@ -58,7 +58,7 @@ gv100_fifo_gpfifo_engine_valid(struct gk104_fifo_chan *chan, bool ce, bool valid
/* Resume runlist. */
nvkm_mask(device, 0x002630, BIT(chan->runl), 0);
mutex_unlock(&subdev->mutex);
mutex_unlock(&chan->fifo->base.mutex);
return ret;
}

4
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
View File

@@ -51,9 +51,9 @@ nv50_fifo_runlist_update_locked(struct nv50_fifo *fifo)
void
nv50_fifo_runlist_update(struct nv50_fifo *fifo)
{
mutex_lock(&fifo->base.engine.subdev.mutex);
mutex_lock(&fifo->base.mutex);
nv50_fifo_runlist_update_locked(fifo);
mutex_unlock(&fifo->base.engine.subdev.mutex);
mutex_unlock(&fifo->base.mutex);
}
int