mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-09 14:56:54 -04:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: imx8qm-ss-hsio: fix PCI and SATA clock indices

Browse Source 
The first argument of lpcg should indices, instead of index. Fix it by
use predefined macro.

Fixes: 9f7053f67c ("arm64: dts: imx8-ss-hsio: Add PCIe and SATA support")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Frank Li
2024-10-25 18:08:10 -04:00
committed by Shawn Guo
parent 1247f837ad
commit a630179088
1 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
View File

@@ -24,9 +24,9 @@ pciea: pcie@5f000000 {
interrupt-names = "msi";
#address-cells = <3>;
#size-cells = <2>;
clocks = <&pciea_lpcg 2>,
<&pciea_lpcg 0>,
<&pciea_lpcg 1>;
clocks = <&pciea_lpcg IMX_LPCG_CLK_6>,
<&pciea_lpcg IMX_LPCG_CLK_4>,
<&pciea_lpcg IMX_LPCG_CLK_5>;
clock-names = "dbi", "mstr", "slv";
bus-range = <0x00 0xff>;
device_type = "pci";
@@ -54,9 +54,9 @@ pcieb: pcie@5f010000 {
interrupt-names = "msi";
#address-cells = <3>;
#size-cells = <2>;
clocks = <&pcieb_lpcg 2>,
<&pcieb_lpcg 0>,
<&pcieb_lpcg 1>;
clocks = <&pcieb_lpcg IMX_LPCG_CLK_6>,
<&pcieb_lpcg IMX_LPCG_CLK_4>,
<&pcieb_lpcg IMX_LPCG_CLK_5>;
clock-names = "dbi", "mstr", "slv";
bus-range = <0x00 0xff>;
device_type = "pci";
@@ -76,8 +76,8 @@ sata: sata@5f020000 {
compatible = "fsl,imx8qm-ahci";
reg = <0x5f020000 0x10000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sata_lpcg 0>,
<&sata_crr4_lpcg 0>;
clocks = <&sata_lpcg IMX_LPCG_CLK_4>,
<&sata_crr4_lpcg IMX_LPCG_CLK_4>;
clock-names = "sata", "sata_ref";
phy-names = "sata-phy", "cali-phy0", "cali-phy1";
power-domains = <&pd IMX_SC_R_SATA_0>;