Merge tag 'memory-controller-drv-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

Memory controller drivers for v6.4

1. STM32 FMC2: allow using driver on all STM32MP SoCs.
2. Cleanups:
   - Atmel EBI: use preferred of_property_present() API.
   - Tegra210 MC: drop redundant variable initialization.
   - Drop redundant quotes in Devicetree bindings.
   - Remove MODULE_LICENSE in non-modules (several drivers).

* tag 'memory-controller-drv-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  dt-bindings: memory-controller: Drop unneeded quotes
  memory: stm32-fmc2-ebi: depends on ARCH_STM32 instead of MACH_STM32MP157
  memory: tegra: remove redundant variable initialization
  memory: atmel-ebi: Use of_property_present() for testing DT property presence
  memory: remove MODULE_LICENSE in non-modules
  memory: tegra: remove MODULE_LICENSE in non-modules

Link: https://lore.kernel.org/r/20230403161427.328128-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2023-04-04 16:08:43 +02:00
12 changed files with 8 additions and 16 deletions

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@@ -1,8 +1,8 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas DDR Bus Controllers

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@@ -20,7 +20,7 @@ description: |
- if it contains "cfi-flash", then HyperFlash is used.
allOf:
- $ref: "/schemas/spi/spi-controller.yaml#"
- $ref: /schemas/spi/spi-controller.yaml#
properties:
compatible:

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@@ -42,7 +42,7 @@ properties:
maxItems: 8
devfreq-events:
$ref: '/schemas/types.yaml#/definitions/phandle-array'
$ref: /schemas/types.yaml#/definitions/phandle-array
minItems: 1
maxItems: 16
items:
@@ -50,7 +50,7 @@ properties:
description: phandles of the PPMU events used by the controller.
device-handle:
$ref: '/schemas/types.yaml#/definitions/phandle'
$ref: /schemas/types.yaml#/definitions/phandle
description: |
phandle of the connected DRAM memory device. For more information please
refer to jedec,lpddr3.yaml.
@@ -73,7 +73,7 @@ properties:
- description: registers of DREX1
samsung,syscon-clk:
$ref: '/schemas/types.yaml#/definitions/phandle'
$ref: /schemas/types.yaml#/definitions/phandle
description: |
Phandle of the clock register set used by the controller, these registers
are used for enabling a 'pause' feature and are not exposed by clock

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@@ -228,7 +228,7 @@ config RENESAS_RPCIF
config STM32_FMC2_EBI
tristate "Support for FMC2 External Bus Interface on STM32MP SoCs"
depends on MACH_STM32MP157 || COMPILE_TEST
depends on ARCH_STM32 || COMPILE_TEST
select MFD_SYSCON
help
Select this option to enable the STM32 FMC2 External Bus Interface

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@@ -598,7 +598,7 @@ static int atmel_ebi_probe(struct platform_device *pdev)
reg_cells += val;
for_each_available_child_of_node(np, child) {
if (!of_find_property(child, "reg", NULL))
if (!of_property_present(child, "reg"))
continue;
ret = atmel_ebi_dev_setup(ebi, child, reg_cells);

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@@ -321,4 +321,3 @@ module_platform_driver(l2_ctl_driver);
MODULE_AUTHOR("Serge Semin <Sergey.Semin@baikalelectronics.ru>");
MODULE_DESCRIPTION("Baikal-T1 L2-cache driver");
MODULE_LICENSE("GPL v2");

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@@ -164,4 +164,3 @@ module_platform_driver(da8xx_ddrctl_driver);
MODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>");
MODULE_DESCRIPTION("TI da8xx DDR2/mDDR controller driver");
MODULE_LICENSE("GPL v2");

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@@ -327,6 +327,5 @@ static int __init fsl_ifc_init(void)
}
subsys_initcall(fsl_ifc_init);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Freescale Semiconductor");
MODULE_DESCRIPTION("Freescale Integrated Flash Controller driver");

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@@ -341,6 +341,5 @@ static int __init mvebu_devbus_init(void)
}
module_init(mvebu_devbus_init);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Ezequiel Garcia <ezequiel.garcia@free-electrons.com>");
MODULE_DESCRIPTION("Marvell EBU SoC Device Bus controller");

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@@ -985,4 +985,3 @@ arch_initcall(tegra_mc_init);
MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
MODULE_DESCRIPTION("NVIDIA Tegra Memory Controller driver");
MODULE_LICENSE("GPL v2");

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@@ -280,4 +280,3 @@ module_platform_driver(tegra186_emc_driver);
MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
MODULE_DESCRIPTION("NVIDIA Tegra186 External Memory Controller driver");
MODULE_LICENSE("GPL v2");

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@@ -22,8 +22,6 @@ static int tegra210_emc_table_device_init(struct reserved_mem *rmem,
return -ENOMEM;
}
count = 0;
for (i = 0; i < TEGRA_EMC_MAX_FREQS; i++) {
if (timings[i].revision == 0)
break;