drm/amd: Move dynamic PCIe switching quirks to X86_MATCH_* macros

Use the X86_MATCH_VENDOR_FAM() and X86_MATCH_VENDOR_FAM_MODEL() macros
to make the quirks for dynamic speed switching more scalable.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patch.msgid.link/20260713172431.1599801-1-mario.limonciello@amd.com
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mario Limonciello
2026-07-13 12:24:31 -05:00
committed by Alex Deucher
parent 1fff2e07b6
commit a57c68224d

View File

@@ -1203,37 +1203,44 @@ bool amdgpu_device_seamless_boot_supported(struct amdgpu_device *adev)
return amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0);
}
/*
* Intel hosts such as Rocket Lake, Alder Lake, Raptor Lake and Sapphire Rapids
* don't support dynamic speed switching. Until we have confirmation from Intel
* that a specific host supports it, it's safer that we keep it disabled for all.
*
* https://edc.intel.com/content/www/us/en/design/products/platforms/details/raptor-lake-s/13th-generation-core-processors-datasheet-volume-1-of-2/005/pci-express-support/
* https://gitlab.freedesktop.org/drm/amd/-/issues/2663
*/
static bool amdgpu_device_pcie_dynamic_switching_supported(struct amdgpu_device *adev)
{
#if IS_ENABLED(CONFIG_X86)
struct cpuinfo_x86 *c = &cpu_data(0);
/* eGPU change speeds based on USB4 fabric conditions */
if (dev_is_removable(adev->dev))
return true;
if (c->x86_vendor == X86_VENDOR_INTEL)
return false;
static const struct x86_cpu_id amdgpu_pcie_dynamic_switching_quirks[] = {
/*
* Intel hosts such as Rocket Lake, Alder Lake, Raptor Lake and Sapphire Rapids
* don't support dynamic speed switching. Until we have confirmation from Intel
* that a specific host supports it, it's safer that we keep it disabled for all.
*
* https://edc.intel.com/content/www/us/en/design/products/platforms/details/raptor-lake-s/13th-generation-core-processors-datasheet-volume-1-of-2/005/pci-express-support/
* https://gitlab.freedesktop.org/drm/amd/-/issues/2663
*/
X86_MATCH_VENDOR_FAM(INTEL, X86_FAMILY_ANY, NULL),
/*
* AMD Ryzen Pinnacle Ridge (Zen+, family 0x17 model 0x08) CPUs don't
* support PCIe dynamic speed switching.
* https://gitlab.freedesktop.org/drm/amd/-/work_items/5436
*/
if (c->x86_vendor == X86_VENDOR_AMD && c->x86 == 0x17 &&
c->x86_model == 0x08)
X86_MATCH_VENDOR_FAM_MODEL(AMD, 0x17, 0x08, NULL),
{}
};
static bool amdgpu_device_pcie_dynamic_switching_supported(struct amdgpu_device *adev)
{
/* eGPU change speeds based on USB4 fabric conditions */
if (dev_is_removable(adev->dev))
return true;
/* Hosts have problems with dynamic speed switching */
if (x86_match_cpu(amdgpu_pcie_dynamic_switching_quirks))
return false;
#endif
return true;
}
#else
static inline bool amdgpu_device_pcie_dynamic_switching_supported(struct amdgpu_device *adev)
{
return true;
}
#endif
static bool amdgpu_device_aspm_support_quirk(struct amdgpu_device *adev)
{