xlnx: dt-bindings: Convert to json-schema

Merge series from Vincenzo Frascino <vincenzo.frascino@arm.com>:

This series converts the folling Xilinx device tree binding documentation:
 - xlnx,i2s
 - xlnx,audio-formatter
 - xlnx,spdif
to json-schema.

Note: These bindings are required for future work on the ARM Morello
Platforms device tree.
This commit is contained in:
Mark Brown
2025-02-26 20:05:48 +00:00
7 changed files with 222 additions and 85 deletions

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@@ -1,29 +0,0 @@
Device-Tree bindings for Xilinx PL audio formatter
The IP core supports DMA, data formatting(AES<->PCM conversion)
of audio samples.
Required properties:
- compatible: "xlnx,audio-formatter-1.0"
- interrupt-names: Names specified to list of interrupts in same
order mentioned under "interrupts".
List of supported interrupt names are:
"irq_mm2s" : interrupt from MM2S block
"irq_s2mm" : interrupt from S2MM block
- interrupts-parent: Phandle for interrupt controller.
- interrupts: List of Interrupt numbers.
- reg: Base address and size of the IP core instance.
- clock-names: List of input clocks.
Required elements: "s_axi_lite_aclk", "aud_mclk"
- clocks: Input clock specifier. Refer to common clock bindings.
Example:
audio_ss_0_audio_formatter_0: audio_formatter@80010000 {
compatible = "xlnx,audio-formatter-1.0";
interrupt-names = "irq_mm2s", "irq_s2mm";
interrupt-parent = <&gic>;
interrupts = <0 104 4>, <0 105 4>;
reg = <0x0 0x80010000 0x0 0x1000>;
clock-names = "s_axi_lite_aclk", "aud_mclk";
clocks = <&clk 71>, <&clk_wiz_1 0>;
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/xlnx,audio-formatter.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx PL audio formatter
description:
The IP core supports DMA, data formatting(AES<->PCM conversion)
of audio samples.
maintainers:
- Vincenzo Frascino <vincenzo.frascino@arm.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- xlnx,audio-formatter-1.0
reg:
maxItems: 1
interrupt-names:
minItems: 1
items:
- const: irq_mm2s
- const: irq_s2mm
interrupts:
minItems: 1
items:
- description: interrupt from MM2S block
- description: interrupt from S2MM block
clock-names:
minItems: 1
items:
- const: s_axi_lite_aclk
- const: aud_mclk
clocks:
minItems: 1
items:
- description: clock for the axi data stream
- description: clock for the MEMS microphone data stream
required:
- compatible
- reg
- interrupt-names
- interrupts
- clock-names
- clocks
additionalProperties: false
examples:
- |
audio_formatter@80010000 {
compatible = "xlnx,audio-formatter-1.0";
reg = <0x80010000 0x1000>;
interrupt-names = "irq_mm2s", "irq_s2mm";
interrupt-parent = <&gic>;
interrupts = <0 104 4>, <0 105 4>;
clock-names = "s_axi_lite_aclk", "aud_mclk";
clocks = <&clk 71>, <&clk_wiz_1 0>;
};
...

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@@ -1,28 +0,0 @@
Device-Tree bindings for Xilinx I2S PL block
The IP supports I2S based playback/capture audio
Required property:
- compatible: "xlnx,i2s-transmitter-1.0" for playback and
"xlnx,i2s-receiver-1.0" for capture
Required property common to both I2S playback and capture:
- reg: Base address and size of the IP core instance.
- xlnx,dwidth: sample data width. Can be any of 16, 24.
- xlnx,num-channels: Number of I2S streams. Can be any of 1, 2, 3, 4.
supported channels = 2 * xlnx,num-channels
Example:
i2s_receiver@a0080000 {
compatible = "xlnx,i2s-receiver-1.0";
reg = <0x0 0xa0080000 0x0 0x10000>;
xlnx,dwidth = <0x18>;
xlnx,num-channels = <1>;
};
i2s_transmitter@a0090000 {
compatible = "xlnx,i2s-transmitter-1.0";
reg = <0x0 0xa0090000 0x0 0x10000>;
xlnx,dwidth = <0x18>;
xlnx,num-channels = <1>;
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/xlnx,i2s.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx I2S PL block
description:
The IP supports I2S based playback/capture audio.
maintainers:
- Vincenzo Frascino <vincenzo.frascino@arm.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- xlnx,i2s-receiver-1.0
- xlnx,i2s-transmitter-1.0
reg:
maxItems: 1
xlnx,dwidth:
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 16
- 24
description: |
Sample data width.
xlnx,num-channels:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 4
description: |
Number of I2S streams.
required:
- compatible
- reg
- xlnx,dwidth
- xlnx,num-channels
additionalProperties: false
examples:
- |
i2s@a0080000 {
compatible = "xlnx,i2s-receiver-1.0";
reg = <0xa0080000 0x10000>;
xlnx,dwidth = <0x18>;
xlnx,num-channels = <1>;
};
i2s@a0090000 {
compatible = "xlnx,i2s-transmitter-1.0";
reg = <0xa0090000 0x10000>;
xlnx,dwidth = <0x18>;
xlnx,num-channels = <1>;
};
...

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@@ -1,28 +0,0 @@
Device-Tree bindings for Xilinx SPDIF IP
The IP supports playback and capture of SPDIF audio
Required properties:
- compatible: "xlnx,spdif-2.0"
- clock-names: List of input clocks.
Required elements: "s_axi_aclk", "aud_clk_i"
- clocks: Input clock specifier. Refer to common clock bindings.
- reg: Base address and address length of the IP core instance.
- interrupts-parent: Phandle for interrupt controller.
- interrupts: List of Interrupt numbers.
- xlnx,spdif-mode: 0 :- receiver mode
1 :- transmitter mode
- xlnx,aud_clk_i: input audio clock value.
Example:
spdif_0: spdif@80010000 {
clock-names = "aud_clk_i", "s_axi_aclk";
clocks = <&misc_clk_0>, <&clk 71>;
compatible = "xlnx,spdif-2.0";
interrupt-names = "spdif_interrupt";
interrupt-parent = <&gic>;
interrupts = <0 91 4>;
reg = <0x0 0x80010000 0x0 0x10000>;
xlnx,spdif-mode = <1>;
xlnx,aud_clk_i = <49152913>;
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/xlnx,spdif.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx SPDIF IP
description:
The IP supports playback and capture of SPDIF audio.
maintainers:
- Vincenzo Frascino <vincenzo.frascino@arm.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- xlnx,spdif-2.0
reg:
maxItems: 1
interrupts:
items:
- description: SPDIF audio interrupt
clock-names:
items:
- const: aud_clk_i
- const: s_axi_aclk
clocks:
minItems: 1
items:
- description: input audio clock
- description: clock for the AXI data stream
xlnx,spdif-mode:
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0
- 1
description: |
0 - receiver
1 - transmitter
xlnx,aud_clk_i:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Input audio clock frequency. It affects the sampling rate.
required:
- compatible
- reg
- interrupts
- clock-names
- clocks
additionalProperties: false
examples:
- |
spdif@80010000 {
compatible = "xlnx,spdif-2.0";
reg = <0x80010000 0x10000>;
clock-names = "aud_clk_i", "s_axi_aclk";
clocks = <&misc_clk_0>, <&clk 71>;
interrupt-parent = <&gic>;
interrupts = <0 91 4>;
xlnx,spdif-mode = <1>;
xlnx,aud_clk_i = <49152913>;
};
...

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@@ -26009,6 +26009,14 @@ S: Maintained
F: drivers/pwm/pwm-xilinx.c
F: include/clocksource/timer-xilinx.h
XILINX SOUND DRIVERS
M: Vincenzo Frascino <vincenzo.frascino@arm.com>
S: Maintained
F: Documentation/devicetree/bindings/sound/xlnx,i2s.yaml
F: Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml
F: Documentation/devicetree/bindings/sound/xlnx,spdif.yaml
F: sound/soc/xilinx/*
XILINX SD-FEC IP CORES
M: Derek Kiernan <derek.kiernan@amd.com>
M: Dragan Cvetic <dragan.cvetic@amd.com>