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staging: comedi: ni_stc.h: tidy up RTSI_Trig_Direction_Register and bits

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Rename the CamelCase and convert the enum and inline function into defines.
Use the BIT() macro to define the bits.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
2015-05-01 14:59:14 -07:00
committed by Greg Kroah-Hartman
parent e2bdb0d833
commit a4f18b1c40
2 changed files with 37 additions and 56 deletions
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67
drivers/staging/comedi/drivers/ni_mio_common.c
View File

@@ -60,7 +60,6 @@
/* A timeout count */
#define NI_TIMEOUT 1000
static const unsigned old_RTSI_clock_channel = 7;
/* Note: this table must match the ai_gain_* definitions */
static const short ni_gainlkup[][16] = {
@@ -354,7 +353,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
[NISTC_AO_UC_LOADB_REG] = { 0x164, 4 },
[NISTC_CLK_FOUT_REG] = { 0x170, 2 },
[NISTC_IO_BIDIR_PIN_REG] = { 0x172, 2 },
[RTSI_Trig_Direction_Register] = { 0x174, 2 },
[NISTC_RTSI_TRIG_DIR_REG] = { 0x174, 2 },
[Interrupt_Control_Register] = { 0x176, 2 },
[AI_Output_Control_Register] = { 0x178, 2 },
[Analog_Trigger_Etc_Register] = { 0x17a, 2 },
@@ -4680,9 +4679,9 @@ static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
__func__, min_period_ns, max_period_ns);
return -EINVAL;
}
devpriv->rtsi_trig_direction_reg &= ~Use_RTSI_Clock_Bit;
devpriv->rtsi_trig_direction_reg &= ~NISTC_RTSI_TRIG_USE_CLK;
ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg,
RTSI_Trig_Direction_Register);
NISTC_RTSI_TRIG_DIR_REG);
pll_control_bits = NI_M_PLL_CTRL_ENA | NI_M_PLL_CTRL_VCO_MODE_75_150MHZ;
devpriv->clock_and_fout2 |= NI_M_CLK_FOUT2_TIMEBASE1_PLL |
NI_M_CLK_FOUT2_TIMEBASE3_PLL;
@@ -4744,9 +4743,9 @@ static int ni_set_master_clock(struct comedi_device *dev,
struct ni_private *devpriv = dev->private;
if (source == NI_MIO_INTERNAL_CLOCK) {
devpriv->rtsi_trig_direction_reg &= ~Use_RTSI_Clock_Bit;
devpriv->rtsi_trig_direction_reg &= ~NISTC_RTSI_TRIG_USE_CLK;
ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg,
RTSI_Trig_Direction_Register);
NISTC_RTSI_TRIG_DIR_REG);
devpriv->clock_ns = TIMEBASE_1_NS;
if (devpriv->is_m_series) {
devpriv->clock_and_fout2 &=
@@ -4764,10 +4763,10 @@ static int ni_set_master_clock(struct comedi_device *dev,
} else {
if (source == NI_MIO_RTSI_CLOCK) {
devpriv->rtsi_trig_direction_reg |=
Use_RTSI_Clock_Bit;
NISTC_RTSI_TRIG_USE_CLK;
ni_stc_writew(dev,
devpriv->rtsi_trig_direction_reg,
RTSI_Trig_Direction_Register);
NISTC_RTSI_TRIG_DIR_REG);
if (period_ns == 0) {
dev_err(dev->class_dev,
"we don't handle an unspecified clock period correctly yet, returning error\n");
@@ -4783,26 +4782,19 @@ static int ni_set_master_clock(struct comedi_device *dev,
return 3;
}
static unsigned num_configurable_rtsi_channels(struct comedi_device *dev)
{
struct ni_private *devpriv = dev->private;
return (devpriv->is_m_series) ? 8 : 7;
}
static int ni_valid_rtsi_output_source(struct comedi_device *dev,
unsigned chan, unsigned source)
{
struct ni_private *devpriv = dev->private;
if (chan >= num_configurable_rtsi_channels(dev)) {
if (chan == old_RTSI_clock_channel) {
if (chan >= NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series)) {
if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) {
if (source == NI_RTSI_OUTPUT_RTSI_OSC)
return 1;
dev_err(dev->class_dev,
"%s: invalid source for channel=%i, channel %i is always the RTSI clock for pre-m-series boards\n",
__func__, chan, old_RTSI_clock_channel);
__func__, chan, NISTC_RTSI_TRIG_OLD_CLK_CHAN);
return 0;
}
return 0;
@@ -4855,11 +4847,11 @@ static unsigned ni_get_rtsi_routing(struct comedi_device *dev, unsigned chan)
if (chan < 4) {
return RTSI_Trig_Output_Source(chan,
devpriv->rtsi_trig_a_output_reg);
} else if (chan < num_configurable_rtsi_channels(dev)) {
} else if (chan < NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series)) {
return RTSI_Trig_Output_Source(chan,
devpriv->rtsi_trig_b_output_reg);
} else {
if (chan == old_RTSI_clock_channel)
if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN)
return NI_RTSI_OUTPUT_RTSI_OSC;
dev_err(dev->class_dev, "bug! should never get here?\n");
return 0;
@@ -4873,42 +4865,43 @@ static int ni_rtsi_insn_config(struct comedi_device *dev,
{
struct ni_private *devpriv = dev->private;
unsigned int chan = CR_CHAN(insn->chanspec);
unsigned int max_chan = NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series);
switch (data[0]) {
case INSN_CONFIG_DIO_OUTPUT:
if (chan < num_configurable_rtsi_channels(dev)) {
if (chan < max_chan) {
devpriv->rtsi_trig_direction_reg |=
RTSI_Output_Bit(chan, devpriv->is_m_series);
} else if (chan == old_RTSI_clock_channel) {
NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series);
} else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) {
devpriv->rtsi_trig_direction_reg |=
Drive_RTSI_Clock_Bit;
NISTC_RTSI_TRIG_DRV_CLK;
}
ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg,
RTSI_Trig_Direction_Register);
NISTC_RTSI_TRIG_DIR_REG);
break;
case INSN_CONFIG_DIO_INPUT:
if (chan < num_configurable_rtsi_channels(dev)) {
if (chan < max_chan) {
devpriv->rtsi_trig_direction_reg &=
~RTSI_Output_Bit(chan, devpriv->is_m_series);
} else if (chan == old_RTSI_clock_channel) {
~NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series);
} else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) {
devpriv->rtsi_trig_direction_reg &=
~Drive_RTSI_Clock_Bit;
~NISTC_RTSI_TRIG_DRV_CLK;
}
ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg,
RTSI_Trig_Direction_Register);
NISTC_RTSI_TRIG_DIR_REG);
break;
case INSN_CONFIG_DIO_QUERY:
if (chan < num_configurable_rtsi_channels(dev)) {
if (chan < max_chan) {
data[1] =
(devpriv->rtsi_trig_direction_reg &
RTSI_Output_Bit(chan, devpriv->is_m_series))
NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series))
? INSN_CONFIG_DIO_OUTPUT
: INSN_CONFIG_DIO_INPUT;
} else if (chan == old_RTSI_clock_channel) {
data[1] =
(devpriv->rtsi_trig_direction_reg &
Drive_RTSI_Clock_Bit)
? INSN_CONFIG_DIO_OUTPUT : INSN_CONFIG_DIO_INPUT;
} else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) {
data[1] = (devpriv->rtsi_trig_direction_reg &
NISTC_RTSI_TRIG_DRV_CLK)
? INSN_CONFIG_DIO_OUTPUT
: INSN_CONFIG_DIO_INPUT;
}
return 2;
case INSN_CONFIG_SET_CLOCK_SRC:

26
drivers/staging/comedi/drivers/ni_stc.h
View File

@@ -278,6 +278,13 @@
#define NISTC_IO_BIDIR_PIN_REG 57
#define NISTC_RTSI_TRIG_DIR_REG 58
#define NISTC_RTSI_TRIG_OLD_CLK_CHAN 7
#define NISTC_RTSI_TRIG_NUM_CHAN(_m) ((_m) ? 8 : 7)
#define NISTC_RTSI_TRIG_DIR(_c, _m) ((_m) ? BIT(8 + (_c)) : BIT(7 + (_c)))
#define NISTC_RTSI_TRIG_USE_CLK BIT(1)
#define NISTC_RTSI_TRIG_DRV_CLK BIT(0)
#define AI_Status_1_Register 2
#define Interrupt_A_St 0x8000
#define AI_FIFO_Full_St 0x4000
@@ -336,25 +343,6 @@ enum Joint_Status_2_Bits {
#define AO_BC_Save_Registers 18
#define AO_UC_Save_Registers 20
#define RTSI_Trig_Direction_Register 58
enum RTSI_Trig_Direction_Bits {
Drive_RTSI_Clock_Bit = 0x1,
Use_RTSI_Clock_Bit = 0x2,
};
static inline unsigned RTSI_Output_Bit(unsigned channel, int is_mseries)
{
unsigned max_channel;
unsigned base_bit_shift;
if (is_mseries) {
base_bit_shift = 8;
max_channel = 7;
} else {
base_bit_shift = 9;
max_channel = 6;
}
return 1 << (base_bit_shift + channel);
}
#define Interrupt_Control_Register 59
#define Interrupt_B_Enable _bit15
#define Interrupt_B_Output_Select(x) ((x)<<12)