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dt-bindings: PCI: xilinx-cpm: Fix overlapping of bridge register and 32-bit BAR addresses

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The current configuration had non-prefetchable memory overlapping with
bridge registers by 64KB from base address.

This patch fixes the 'ranges' property in the device tree by adjusting
the non-prefetchable memory addresses beyond the 64KB mark to prevent
conflicts.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20240624111022.133780-1-thippesw@amd.com
Signed-off-by: Thippeswamy Havalige <thippesw@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Thippeswamy Havalige
2024-06-24 16:40:22 +05:30
committed by Krzysztof Wilczyński
parent 743025b0e0
commit a3ec59e982
1 changed files with 1 additions and 1 deletions
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2
Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
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@@ -92,7 +92,7 @@ examples:
<0 0 0 3 &pcie_intc_0 2>,
<0 0 0 4 &pcie_intc_0 3>;
bus-range = <0x00 0xff>;
ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>,
<0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
msi-map = <0x0 &its_gic 0x0 0x10000>;
reg = <0x0 0xfca10000 0x0 0x1000>,