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net/mlx5e: Extract max_xsk_wqebbs into its own function

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Calculating max_xsk_wqebbs seems large enough to deserve its own
function. It will make upcoming changes easier.

This patch has no functional changes.

Signed-off-by: Dragos Tatulea <dtatulea@nvidia.com>
Reviewed-by: Cosmin Ratiu <cratiu@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260223204155.1783580-4-tariqt@nvidia.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Dragos Tatulea
2026-02-23 22:41:43 +02:00
committed by Paolo Abeni
parent d3a99b71a2
commit a2ff2f5f80
1 changed files with 54 additions and 44 deletions
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98
drivers/net/ethernet/mellanox/mlx5/core/en/params.c
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@@ -1116,6 +1116,59 @@ static u32 mlx5e_mpwrq_total_umr_wqebbs(struct mlx5_core_dev *mdev,
return umr_wqebbs * (1 << mlx5e_mpwqe_get_log_rq_size(mdev, params, xsk));
}
static u32 mlx5e_max_xsk_wqebbs(struct mlx5_core_dev *mdev,
struct mlx5e_params *params)
{
struct mlx5e_xsk_param xsk = {0};
u32 max_xsk_wqebbs = 0;
u8 frame_shift;
if (!params->xdp_prog)
return 0;
/* If XDP program is attached, XSK may be turned on at any time without
* restarting the channel. ICOSQ must be big enough to fit UMR WQEs of
* both regular RQ and XSK RQ.
*
* XSK uses different values of page_shift, and the total number of UMR
* WQEBBs depends on it. This dependency is complex and not monotonic,
* especially taking into consideration that some of the parameters come
* from capabilities. Hence, we have to try all valid values of XSK
* frame size (and page_shift) to find the maximum.
*/
for (frame_shift = XDP_UMEM_MIN_CHUNK_SHIFT;
frame_shift <= PAGE_SHIFT; frame_shift++) {
u32 total_wqebbs;
/* The headroom doesn't affect the calculations below. */
/* XSK aligned mode. */
xsk.chunk_size = 1 << frame_shift;
xsk.unaligned = false;
total_wqebbs = mlx5e_mpwrq_total_umr_wqebbs(mdev, params, &xsk);
max_xsk_wqebbs = max(max_xsk_wqebbs, total_wqebbs);
/* XSK unaligned mode, frame size is a power of two. */
xsk.unaligned = true;
total_wqebbs = mlx5e_mpwrq_total_umr_wqebbs(mdev, params, &xsk);
max_xsk_wqebbs = max(max_xsk_wqebbs, total_wqebbs);
/* XSK unaligned mode, frame size is not equal to stride
* size.
*/
xsk.chunk_size -= 1;
total_wqebbs = mlx5e_mpwrq_total_umr_wqebbs(mdev, params, &xsk);
max_xsk_wqebbs = max(max_xsk_wqebbs, total_wqebbs);
/* XSK unaligned mode, frame size is a triple power of two. */
xsk.chunk_size = (1 << frame_shift) / 4 * 3;
total_wqebbs = mlx5e_mpwrq_total_umr_wqebbs(mdev, params, &xsk);
max_xsk_wqebbs = max(max_xsk_wqebbs, total_wqebbs);
}
return max_xsk_wqebbs;
}
static u8 mlx5e_build_icosq_log_wq_sz(struct mlx5_core_dev *mdev,
struct mlx5e_params *params,
struct mlx5e_rq_param *rq_param)
@@ -1129,50 +1182,7 @@ static u8 mlx5e_build_icosq_log_wq_sz(struct mlx5_core_dev *mdev,
/* UMR WQEs for the regular RQ. */
wqebbs = mlx5e_mpwrq_total_umr_wqebbs(mdev, params, NULL);
/* If XDP program is attached, XSK may be turned on at any time without
* restarting the channel. ICOSQ must be big enough to fit UMR WQEs of
* both regular RQ and XSK RQ.
*
* XSK uses different values of page_shift, and the total number of UMR
* WQEBBs depends on it. This dependency is complex and not monotonic,
* especially taking into consideration that some of the parameters come
* from capabilities. Hence, we have to try all valid values of XSK
* frame size (and page_shift) to find the maximum.
*/
if (params->xdp_prog) {
u32 max_xsk_wqebbs = 0;
u8 frame_shift;
for (frame_shift = XDP_UMEM_MIN_CHUNK_SHIFT;
frame_shift <= PAGE_SHIFT; frame_shift++) {
/* The headroom doesn't affect the calculation. */
struct mlx5e_xsk_param xsk = {
.chunk_size = 1 << frame_shift,
.unaligned = false,
};
/* XSK aligned mode. */
max_xsk_wqebbs = max(max_xsk_wqebbs,
mlx5e_mpwrq_total_umr_wqebbs(mdev, params, &xsk));
/* XSK unaligned mode, frame size is a power of two. */
xsk.unaligned = true;
max_xsk_wqebbs = max(max_xsk_wqebbs,
mlx5e_mpwrq_total_umr_wqebbs(mdev, params, &xsk));
/* XSK unaligned mode, frame size is not equal to stride size. */
xsk.chunk_size -= 1;
max_xsk_wqebbs = max(max_xsk_wqebbs,
mlx5e_mpwrq_total_umr_wqebbs(mdev, params, &xsk));
/* XSK unaligned mode, frame size is a triple power of two. */
xsk.chunk_size = (1 << frame_shift) / 4 * 3;
max_xsk_wqebbs = max(max_xsk_wqebbs,
mlx5e_mpwrq_total_umr_wqebbs(mdev, params, &xsk));
}
wqebbs += max_xsk_wqebbs;
}
wqebbs += mlx5e_max_xsk_wqebbs(mdev, params);
/* UMR WQEs don't cross the page boundary, they are padded with NOPs.
* This padding is always smaller than the max WQE size. That gives us