mirrors/linux
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-04-16 00:47:03 -04:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: renesas: rzg2lc-smarc-pinfunction: Sort the nodes

Browse Source 
Sort the pinctrl nodes alphabetically.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das
2022-03-03 16:41:52 +00:00
committed by Geert Uytterhoeven
parent 1889f4798c
commit a2b642d89e
1 changed files with 12 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi
View File

@@ -12,11 +12,6 @@ &pinctrl {
pinctrl-0 = <&sound_clk_pins>;
pinctrl-names = "default";
scif0_pins: scif0 {
pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
<RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
};
#if SW_SCIF_CAN
/* SW8 should be at position 2->1 */
can1_pins: can1 {
@@ -25,13 +20,6 @@ can1_pins: can1 {
};
#endif
scif1_pins: scif1 {
pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
<RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
<RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */
<RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
};
#if SW_RSPI_CAN
/* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
can1-stb-hog {
@@ -47,6 +35,18 @@ can1_pins: can1 {
};
#endif
scif0_pins: scif0 {
pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
<RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
};
scif1_pins: scif1 {
pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
<RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
<RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */
<RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
};
sd1-pwr-en-hog {
gpio-hog;
gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;