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ARM: dts: suniv: F1C100: fix timer node

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The Allwinner F1C100s has three timer instances, each with their own
interrupt line.

Add the missing two interrupts to the DT node, to match the DT binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220317162349.739636-8-andre.przywara@arm.com
This commit is contained in:
Andre Przywara
2022-03-17 16:23:44 +00:00
committed by Jernej Skrabec
parent a6d9efb62a
commit a26123f355
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/suniv-f1c100s.dtsi
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@@ -105,7 +105,7 @@ uart0_pe_pins: uart0-pe-pins {
timer@1c20c00 {
compatible = "allwinner,suniv-f1c100s-timer";
reg = <0x01c20c00 0x90>;
interrupts = <13>;
interrupts = <13>, <14>, <15>;
clocks = <&osc24M>;
};