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dt-bindings: power: Add MT8365 power domains

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Add power domains dt-bindings for MT8365.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Tested-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20230918093751.1188668-2-msp@baylibre.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Fabien Parent
2023-09-18 11:37:45 +02:00
committed by Ulf Hansson
parent 0cd3f86ad5
commit a1571f1f33
2 changed files with 25 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
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@@ -31,6 +31,7 @@ properties:
- mediatek,mt8188-power-controller
- mediatek,mt8192-power-controller
- mediatek,mt8195-power-controller
- mediatek,mt8365-power-controller
'#power-domain-cells':
const: 1
@@ -88,6 +89,7 @@ $defs:
"include/dt-bindings/power/mediatek,mt8188-power.h" - for MT8188 type power domain.
"include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
"include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
"include/dt-bindings/power/mediatek,mt8365-power.h" - for MT8365 type power domain.
maxItems: 1
clocks:
@@ -115,6 +117,10 @@ $defs:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle to the device containing the INFRACFG register range.
mediatek,infracfg-nao:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle to the device containing the INFRACFG-NAO register range.
mediatek,smi:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle to the device containing the SMI register range.

19
include/dt-bindings/power/mediatek,mt8365-power.h Normal file
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@@ -0,0 +1,19 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
* Copyright (c) 2022 MediaTek Inc.
*/
#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H
#define _DT_BINDINGS_POWER_MT8365_POWER_H
#define MT8365_POWER_DOMAIN_MM 0
#define MT8365_POWER_DOMAIN_CONN 1
#define MT8365_POWER_DOMAIN_MFG 2
#define MT8365_POWER_DOMAIN_AUDIO 3
#define MT8365_POWER_DOMAIN_CAM 4
#define MT8365_POWER_DOMAIN_DSP 5
#define MT8365_POWER_DOMAIN_VDEC 6
#define MT8365_POWER_DOMAIN_VENC 7
#define MT8365_POWER_DOMAIN_APU 8
#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */