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Merge tag 'at91-dt-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

Browse Source 
AT91 device tree updates for 6.6

It contains:
- TCB timer nodes adition for at91-sama5d3_ksz9477_evb board
- device tee cleanups

* tag 'at91-dt-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: remove duplicated entries
  ARM: dts: microchip: split interrupts per cells
  ARM: dts: at91: ksz9477_evb: Add tx-internal-delay-ps property for port5
  ARM: dts: at91: ksz9477_evb: Add missing timer nodes
  ARM: dts: at91-vinco: Fix "status" values
  ARM: dts: microchip: add missing space before {
  ARM: dts: microchip: minor whitespace cleanup around '='

Link: https://lore.kernel.org/r/20230804044102.231448-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2023-08-12 10:41:37 +02:00
parent a3265be854 2ad41a9872
commit 9f8f26424e
16 changed files with 61 additions and 61 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
arch/arm/boot/dts/microchip/Makefile
View File

@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
# Enables support for device-tree overlays
DTC_FLAGS_at91-sam9x60_curiosity := -@
DTC_FLAGS_at91-sam9x60ek := -@
DTC_FLAGS_at91-sama5d27_som1_ek := -@
@@ -54,21 +55,9 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
at91sam9g35ek.dtb \
at91sam9x25ek.dtb \
at91sam9x35ek.dtb
# Enables support for device-tree overlays
DTC_FLAGS_at91-sam9x60_curiosity := -@
DTC_FLAGS_at91-sam9x60ek := -@
dtb-$(CONFIG_SOC_SAM9X60) += \
at91-sam9x60_curiosity.dtb \
at91-sam9x60ek.dtb
# Enables support for device-tree overlays
DTC_FLAGS_at91-sama5d27_som1_ek := -@
DTC_FLAGS_at91-sama5d27_wlsom1_ek := -@
DTC_FLAGS_at91-sama5d2_icp := -@
DTC_FLAGS_at91-sama5d2_ptc_ek := -@
DTC_FLAGS_at91-sama5d2_xplained := -@
DTC_FLAGS_at91-sama5d3_eds := -@
DTC_FLAGS_at91-sama5d3_xplained := -@
DTC_FLAGS_at91-sama5d4_xplained := -@
dtb-$(CONFIG_SOC_SAM_V7) += \
at91-kizbox2-2.dtb \
at91-kizbox3-hs.dtb \
@@ -95,8 +84,6 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
at91-sama5d4_xplained.dtb \
at91-sama5d4ek.dtb \
at91-vinco.dtb
# Enables support for device-tree overlays
DTC_FLAGS_at91-sama7g5ek := -@
dtb-$(CONFIG_SOC_SAMA7G5) += \
at91-sama7g5ek.dtb

13
arch/arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts
View File

@@ -152,6 +152,7 @@ port@5 {
label = "cpu";
ethernet = <&macb0>;
phy-mode = "rgmii-txid";
tx-internal-delay-ps = <2000>;
fixed-link {
speed = <1000>;
@@ -162,6 +163,18 @@ fixed-link {
};
};
&tcb0 {
timer0: timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer1: timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
&usb0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;

4
arch/arm/boot/dts/microchip/at91-vinco.dts
View File

@@ -159,7 +159,7 @@ usb0: gadget@400000 {
atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "disable";
status = "disabled";
};
usb1: ohci@500000 {
@@ -168,7 +168,7 @@ usb1: ohci@500000 {
&pioE 11 GPIO_ACTIVE_LOW
&pioE 12 GPIO_ACTIVE_LOW
>;
status = "disable";
status = "disabled";
};
usb2: ehci@600000 {

12
arch/arm/boot/dts/microchip/at91rm9200.dtsi
View File

@@ -135,9 +135,9 @@ tcb0: timer@fffa0000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffa0000 0x100>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0
19 IRQ_TYPE_LEVEL_HIGH 0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
<18 IRQ_TYPE_LEVEL_HIGH 0>,
<19 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
@@ -147,9 +147,9 @@ tcb1: timer@fffa4000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffa4000 0x100>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
21 IRQ_TYPE_LEVEL_HIGH 0
22 IRQ_TYPE_LEVEL_HIGH 0>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>,
<21 IRQ_TYPE_LEVEL_HIGH 0>,
<22 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&slow_xtal>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};

14
arch/arm/boot/dts/microchip/at91sam9260.dtsi
View File

@@ -65,7 +65,7 @@ main_xtal: main_xtal {
clock-frequency = <0>;
};
adc_op_clk: adc_op_clk{
adc_op_clk: adc_op_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <5000000>;
@@ -148,9 +148,9 @@ tcb0: timer@fffa0000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffa0000 0x100>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0
19 IRQ_TYPE_LEVEL_HIGH 0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
<18 IRQ_TYPE_LEVEL_HIGH 0>,
<19 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
@@ -160,9 +160,9 @@ tcb1: timer@fffdc000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffdc000 0x100>;
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
27 IRQ_TYPE_LEVEL_HIGH 0
28 IRQ_TYPE_LEVEL_HIGH 0>;
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>,
<27 IRQ_TYPE_LEVEL_HIGH 0>,
<28 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};

2
arch/arm/boot/dts/microchip/at91sam9261.dtsi
View File

@@ -205,7 +205,7 @@ usart1: serial@fffb4000 {
status = "disabled";
};
usart2: serial@fffb8000{
usart2: serial@fffb8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb8000 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;

2
arch/arm/boot/dts/microchip/at91sam9g20ek_2mmc.dts
View File

@@ -12,7 +12,7 @@ / {
compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9";
ahb {
apb{
apb {
mmc0: mmc@fffa8000 {
/* clk already mux wuth slot0 */
pinctrl-0 = <

2
arch/arm/boot/dts/microchip/at91sam9g45.dtsi
View File

@@ -70,7 +70,7 @@ main_xtal: main_xtal {
clock-frequency = <0>;
};
adc_op_clk: adc_op_clk{
adc_op_clk: adc_op_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <300000>;

2
arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts
View File

@@ -164,7 +164,7 @@ pinctrl_pwm_leds: pwm-led {
};
};
spi0: spi@fffa4000{
spi0: spi@fffa4000 {
status = "okay";
cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
flash@0 {

2
arch/arm/boot/dts/microchip/at91sam9rl.dtsi
View File

@@ -67,7 +67,7 @@ main_xtal: main_xtal {
clock-frequency = <0>;
};
adc_op_clk: adc_op_clk{
adc_op_clk: adc_op_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000>;

2
arch/arm/boot/dts/microchip/at91sam9x5.dtsi
View File

@@ -68,7 +68,7 @@ main_xtal: main_xtal {
clock-frequency = <0>;
};
adc_op_clk: adc_op_clk{
adc_op_clk: adc_op_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000>;

2
arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
View File

@@ -28,7 +28,7 @@ &aes {
&gpio {
miim_a_pins: mdio-pins {
/* MDC, MDIO */
pins = "GPIO_28", "GPIO_29";
pins = "GPIO_28", "GPIO_29";
function = "miim_a";
};

6
arch/arm/boot/dts/microchip/sama5d2.dtsi
View File

@@ -382,9 +382,9 @@ AT91_XDMAC_DT_PERID(21))>,
macb0: ethernet@f8008000 {
compatible = "atmel,sama5d2-gem";
reg = <0xf8008000 0x1000>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 0 */
66 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 1 */
67 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 2 */
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 0 */
<66 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 1 */
<67 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 2 */
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&pmc PMC_TYPE_PERIPHERAL 5>;
clock-names = "hclk", "pclk";
status = "disabled";

2
arch/arm/boot/dts/microchip/sama5d3.dtsi
View File

@@ -74,7 +74,7 @@ main_xtal: main_xtal {
clock-frequency = <0>;
};
adc_op_clk: adc_op_clk{
adc_op_clk: adc_op_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000>;

2
arch/arm/boot/dts/microchip/sama5d4.dtsi
View File

@@ -72,7 +72,7 @@ main_xtal: main_xtal {
clock-frequency = <0>;
};
adc_op_clk: adc_op_clk{
adc_op_clk: adc_op_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000>;

40
arch/arm/boot/dts/microchip/sama7g5.dtsi
View File

@@ -366,8 +366,8 @@ can0: can@e0828000 {
compatible = "bosch,m_can";
reg = <0xe0828000 0x100>, <0x100000 0x7800>;
reg-names = "m_can", "message_ram";
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>;
clock-names = "hclk", "cclk";
@@ -382,8 +382,8 @@ can1: can@e082c000 {
compatible = "bosch,m_can";
reg = <0xe082c000 0x100>, <0x100000 0xbc00>;
reg-names = "m_can", "message_ram";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>;
clock-names = "hclk", "cclk";
@@ -398,8 +398,8 @@ can2: can@e0830000 {
compatible = "bosch,m_can";
reg = <0xe0830000 0x100>, <0x100000 0x10000>;
reg-names = "m_can", "message_ram";
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 63>, <&pmc PMC_TYPE_GCK 63>;
clock-names = "hclk", "cclk";
@@ -414,8 +414,8 @@ can3: can@e0834000 {
compatible = "bosch,m_can";
reg = <0xe0834000 0x100>, <0x110000 0x4400>;
reg-names = "m_can", "message_ram";
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 64>, <&pmc PMC_TYPE_GCK 64>;
clock-names = "hclk", "cclk";
@@ -430,8 +430,8 @@ can4: can@e0838000 {
compatible = "bosch,m_can";
reg = <0xe0838000 0x100>, <0x110000 0x8800>;
reg-names = "m_can", "message_ram";
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 65>, <&pmc PMC_TYPE_GCK 65>;
clock-names = "hclk", "cclk";
@@ -446,8 +446,8 @@ can5: can@e083c000 {
compatible = "bosch,m_can";
reg = <0xe083c000 0x100>, <0x110000 0xcc00>;
reg-names = "m_can", "message_ram";
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>;
clock-names = "hclk", "cclk";
@@ -845,12 +845,12 @@ uart7: serial@200 {
gmac0: ethernet@e2800000 {
compatible = "microchip,sama7g5-gem";
reg = <0xe2800000 0x1000>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>, <&pmc PMC_TYPE_GCK 53>;
clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
@@ -861,8 +861,8 @@ GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH
gmac1: ethernet@e2804000 {
compatible = "microchip,sama7g5-emac";
reg = <0xe2804000 0x1000>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>;
clock-names = "pclk", "hclk";
status = "disabled";